- 29 Sep, 2022 39 commits
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Eric Bernstein authored
Remove assert that will hit during odm transition case, since this is a valid case. Signed-off-by:
Eric Bernstein <eric.bernstein@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Ian Chen authored
Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Acked-by:
Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by:
Ian Chen <ian.chen@amd.com> Tested-by:
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Alvin Lee authored
[Description] - Don't use MALL buffering of any kind when the surface is TMZ - Workaround for a HW bug Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
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Taimur Hassan authored
[Why & How] Some FIFO errors still occur due to reading wrong pixel rate divider. Fix typo to prevent FIFO error. Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
Taimur Hassan <Syed.Hassan@amd.com> Tested-by:
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Charlene Liu authored
[why] adding debug keys used for compliance test. Reviewed-by:
Chris Park <Chris.Park@amd.com> Acked-by:
Charlene Liu <Charlene.Liu@amd.com> Tested-by:
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Aric Cyr authored
Revert "dc: skip audio setup when audio stream is enabled" This reverts commit 65fbfb02 [why] We have minimal pipe split transition method to avoid pipe allocation outage.However, this method will invoke audio setup which cause audio output stuck once pipe reallocate. [how] skip audio setup for pipelines which audio stream has been enabled Reviewed-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
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Wenjing Liu authored
[why] There is a coding error for a missing null check for stream pointer when iterating through pipe_ctx. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[Why] We rely on DMCUB to do this when disabling the link but it should actually come before we disable the DP VID stream. If we don't then the FIFO can end up with underflow that persists the next time it's enabled. [How] Add a DCN314 specific blank sequence that will disable the DIG FIFO first. Reviewed-by:
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Nicholas Kazlauskas authored
[Why] The DIO FIFO will underflow if we turn off the OTG before we turn off the FIFO. Since this happens as part of the OTG workaround and we don't reset the FIFO afterwards we see the error persist. [How] Add disable FIFO before the disable CRTC and enable FIFO after enabling the CRTC. Reviewed-by:
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Brandon Syu authored
[Description] - Have option to exit idle opt on cursor updates for debug and optimizations purposes Reviewed-by:
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Ilya Bakoulin authored
[Why] Partially valid EDIDs on MST sinks are treated the same way as broken EDIDs or read failures and result in a fallback EDID being used instead. [How] If edid_status is EDID_PARTIAL_VALID, prefer to use the valid EDID blocks instead of using a fallback EDID. Reviewed-by:
Ilya Bakoulin <Ilya.Bakoulin@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[Why] Avoids a race condition where DIO FIFO can underflow due to no incoming data available. [How] Shift the FIFO enable below stream enable. Make sure fullness level is written before the DIO reset takes place and that we're not doing it twice. Reviewed-by:
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Aric Cyr authored
[why] Only a single VLINE interrupt is available so interface should not expose the second one which is used by DMU firmware. [how] Remove references to periodic_interrupt1 and VLINE1 from DC interfaces. Reviewed-by:
Jaehyun Chung <jaehyun.chung@amd.com> Acked-by:
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Alvin Lee authored
[Description] Update to new SR latencies for DCN32 Reviewed-by:
Nevenko Stupar <Nevenko.Stupar@amd.com> Reviewed-by:
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Taimur Hassan authored
[Why] Programming pixel rate divider when FIFO is enabled can cause FIFO error. [How] Skip divider programming when divider values are the same to prevent FIFO error. Reviewed-by:
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Graham Sider authored
Shader wave interrupts were getting dropped in event_interrupt_wq_v11 if the PRIV bit was set to 1. This would often lead to a hang. Until debugger logic is upstreamed, expand comment to stop early return. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Reviewed-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Graham Sider authored
Update mes_v11_api_def.h add_queue API with is_aql_queue parameter. Also re-use gds_size for the queue size (unused for KFD). MES requires the queue size in order to compute the actual wptr offset within the queue RB since it increases monotonically for AQL queues. v2: Make is_aql_queue assign clearer Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Graham Sider authored
Set remaining compute_static_thread_mgmt_se* accordingly. Signed-off-by:
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David Belanger authored
Enables support for software trap for MES >= 4. Adapted from implementation from Jay Cornwall. v2: Add IP version check in conditions. v3: Remove debugger code changes. Signed-off-by:
Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by:
David Belanger <david.belanger@amd.com> Reviewed-by:
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Tom St Denis authored
These are used by umr to sort the hive nodes since the kernel initializes the nodes in order of bus enumeration not XGMI hive enumeration. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Ruijing Dong authored
update VF_RB_SETUP_FLAG, add SMU_DPM_INTERFACE_FLAG, and corresponding change in VCN4. Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
Ruijing Dong <ruijing.dong@amd.com> Signed-off-by:
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Likun Gao authored
Use common function to init sdma v6 firmware ucode. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Likun Gao authored
Support SDMA firmware init on common function for sdma v2 struct. Signed-off-by:
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Likun Gao authored
Use common function to init sdma v5 firmware ucode. Signed-off-by:
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Likun Gao authored
Use common function to init sdma v4 firmware ucode. Signed-off-by:
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Likun Gao authored
Add an common function to init SDMA related microcode. Signed-off-by:
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Likun Gao authored
Use common function to init gfx v11 CP firmware ucode. Signed-off-by:
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Likun Gao authored
Use common function to init gfx v10 CP firmware ucode. Signed-off-by:
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Likun Gao authored
Use common function to init gfx v9 CP firmware ucode. Signed-off-by:
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Likun Gao authored
Add an common function to init CP related microcode. Signed-off-by:
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Evan Quan authored
It's vbios and pmfw instead of driver who decide whether some dpm features is supported or not. Driver just de-selects those features which are not permitted on user's request. Thus, we use adverse selects model. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Evan Quan authored
The feature is ready with latest 78.58.0 PMFW. Signed-off-by:
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Evan Quan authored
Make sure gfxoff is disabled before gfx register accessing. Signed-off-by:
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Li Zhong authored
amdgpu_bo_kmap() returns error when fails to map buffer object. Add the error check and propagate the error. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Li Zhong <floridsleeves@gmail.com> Signed-off-by:
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Lijo Lazar authored
Use the simpified API that calculates distance between two devices. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Lijo Lazar authored
Disable verbose while getting p2p distance. With verbose, it shows warning if ACS redirect is set between the devices. Adds noise to dmesg logs when a few GPU devices are on the same platform. Example log: amdgpu 0000:34:00.0: ACS redirect is set between the client and provider (0000:31:00.0) amdgpu 0000:34:00.0: to disable ACS redirect for this path, add the kernel parameter: pci=disable_acs_redir=0000:30:00.0;0000:2e:00.0;0000:33:00.0;0000:2e:10.0 Signed-off-by:
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YiPeng Chai authored
For the asic using smu v13_0_2, there is the following warning when uninstalling amdgpu: amdgpu: ras disable gfx failed poison:1 ret:-22. [Why]: For the asic using smu v13_0_2, the psp .suspend and mode1reset is called before amdgpu_ras_pre_fini during amdgpu uninstall, it has disabled all ras features and reset the psp. Since the psp is reset, calling amdgpu_ras_disable_all_features in amdgpu_ras_pre_fini to disable ras features will fail. [How]: If all ras features are disabled, amdgpu_ras_disable_all_features will not be called to disable all ras features again. Signed-off-by:
YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by:
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Hawking Zhang authored
switch to common helper to initialize rlc firmware for gfx11 Signed-off-by:
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Hawking Zhang authored
switch to common helper to initialize rlc firmware for gfx10 v2: squash in size validation fix (Alex) Signed-off-by:
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- 27 Sep, 2022 1 commit
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Hawking Zhang authored
switch to common helper to initialize rlc firmware for gfx9 Signed-off-by:
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