1. 16 Apr, 2021 1 commit
  2. 15 Apr, 2021 3 commits
    • Richard Weinberger's avatar
      Merge tag 'nand/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next · ef4ed780
      Richard Weinberger authored
      MTD core:
      * Handle possible -EPROBE_DEFER from parse_mtd_partitions()
      
      NAND core:
      * Fix error handling in nand_prog_page_op() (x2)
      * Add a helper to retrieve the number of ECC bytes per step
      * Add a helper to retrieve the number of ECC steps
      * Let ECC engines advertize the exact number of steps
      * ECC Hamming:
        - Populate the public nsteps field
        - Use the public nsteps field
      * ECC BCH:
        - Populate the public nsteps field
        - Use the public nsteps field
      
      Raw NAND core:
      * Add support for secure regions in NAND memory
      * Try not to use the ECC private structures
      * Remove duplicate include in rawnand.h
      * BBT:
        - Skip bad blocks when searching for the BBT in NAND
      
      Raw NAND controller drivers:
      * Qcom:
        - Convert bindings to YAML
        - Use dma_mapping_error() for error check
        - Add missing nand_cleanup() in error path
        - Return actual error code instead of -ENODEV
        - Update last code word register
        - Add helper to configure location register
        - Rename parameter name in macro
        - Add helper to check last code word
        - Convert nandc to chip in Read/Write helper
        - Update register macro name for 0x2c offset
      * GPMI:
        - Fix a double free in gpmi_nand_init
      * Rockchip:
        - Use flexible-array member instead of zero-length array
      * Atmel:
        - Update ecc_stats.corrected counter
      * MXC:
        - Remove unneeded of_match_ptr()
      * R852:
        - replace spin_lock_irqsave by spin_lock in hard IRQ
      * Brcmnand:
        - Move to polling in pio mode on oops write
        - Read/write oob during EDU transfer
        - Fix OOB R/W with Hamming ECC
      * FSMC:
        - Fix error code in fsmc_nand_probe()
      * OMAP:
        - Use ECC information from the generic structures
      
      SPI-NAND core:
      * Add missing MODULE_DEVICE_TABLE()
      
      SPI-NAND drivers:
      * gigadevice: Support GD5F1GQ5UExxG
      ef4ed780
    • Richard Weinberger's avatar
      Merge tag 'spi-nor/for-5.13' of... · 256437eb
      Richard Weinberger authored
      Merge tag 'spi-nor/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
      
      SPI NOR core changes:
      - Add OTP support
      - Fix module unload while an op in progress
      - Add various cleanup patches
      
      SPI NOR controller drivers changes:
      - intel-spi: Move platform data header to x86 subfolder
      256437eb
    • Richard Weinberger's avatar
      Merge tag 'cfi/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next · 203ba0f6
      Richard Weinberger authored
      CFI changes
      
      Just a couple of fixes for v5.13-rc1
      * Disable broken buffered writes for CFI chips within ID 0x2201
      * Address a Coverity report for unused value
      203ba0f6
  3. 11 Apr, 2021 2 commits
  4. 07 Apr, 2021 8 commits
  5. 02 Apr, 2021 3 commits
    • Michael Walle's avatar
      mtd: spi-nor: winbond: add OTP support to w25q32fw/jw · b206b82d
      Michael Walle authored
      With all the helper functions in place, add OTP support for the Winbond
      W25Q32JW and W25Q32FW.
      
      Both were tested on a LS1028A SoC with a NXP FSPI controller.
      Signed-off-by: default avatarMichael Walle <michael@walle.cc>
      Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
      Link: https://lore.kernel.org/r/20210321235140.8308-4-michael@walle.cc
      b206b82d
    • Michael Walle's avatar
      mtd: spi-nor: implement OTP support for Winbond and similar flashes · cad3193f
      Michael Walle authored
      Use the new OTP ops to implement OTP access on Winbond flashes. Most
      Winbond flashes provides up to four different OTP regions ("Security
      Registers").
      
      Winbond devices use a special opcode to read and write to the OTP
      regions, just like the RDSFDP opcode. In fact, it seems that the
      (undocumented) first OTP area of the newer flashes is the actual SFDP
      table.
      
      On a side note, Winbond devices also allow erasing the OTP regions as
      long as the area isn't locked down.
      Signed-off-by: default avatarMichael Walle <michael@walle.cc>
      Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
      Link: https://lore.kernel.org/r/20210321235140.8308-3-michael@walle.cc
      cad3193f
    • Michael Walle's avatar
      mtd: spi-nor: add OTP support · 069089ac
      Michael Walle authored
      SPI flashes sometimes have a special OTP area, which can (and is) used to
      store immutable properties like board serial number or vendor assigned
      network hardware addresses.
      
      The MTD subsystem already supports accessing such areas and some (non
      SPI NOR) flashes already implement support for it. It differentiates
      between user and factory areas. User areas can be written by the user and
      factory ones are pre-programmed and locked down by the vendor, usually
      containing an "electrical serial number". This patch will only add support
      for the user areas.
      
      Lay the foundation and implement the MTD callbacks for the SPI NOR and add
      necessary parameters to the flash_info structure. If a flash supports OTP
      it can be added by the convenience macro OTP_INFO(). Sometimes there are
      individual regions, which might have individual offsets. Therefore, it is
      possible to specify the starting address of the first regions as well as
      the distance between two regions (e.g. Winbond devices uses this method).
      
      Additionally, the regions might be locked down. Once locked, no further
      write access is possible.
      
      For SPI NOR flashes the OTP area is accessed like the normal memory, e.g.
      by offset addressing; except that you either have to use special read/write
      commands (Winbond) or you have to enter (and exit) a specific OTP mode
      (Macronix, Micron).
      
      Thus we introduce four operations to which the MTD callbacks will be
      mapped: .read(), .write(), .lock() and .is_locked(). The read and the write
      ops will be given an address offset to operate on while the locking ops use
      regions because locking always affects a whole region. It is up to the
      flash driver to implement these ops.
      Signed-off-by: default avatarMichael Walle <michael@walle.cc>
      [ta: use div64_u64(), IS_ALIGNED, params->otp.org. unsigned int region,
      drop comment, add rlen local variable in spi_nor_mtd_otp_lock()]
      Signed-off-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
      Link: https://lore.kernel.org/r/20210321235140.8308-2-michael@walle.cc
      069089ac
  6. 31 Mar, 2021 2 commits
  7. 28 Mar, 2021 17 commits
  8. 15 Mar, 2021 4 commits