- 16 Apr, 2021 1 commit
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Tudor Ambarus authored
The write buffer comes from user and should be const. Constify write buffer in mtd core and across all _write_user_prot_reg() users. cfi_cmdset_{0001, 0002} and onenand_base will pay the cost of an explicit cast to discard the const qualifier since the beginning, since they are using an otp_op_t function prototype that is used for both reads and writes. mtd_dataflash and SPI NOR will benefit of the const buffer because they are using different paths for writes and reads. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210403060931.7119-1-tudor.ambarus@microchip.com
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- 15 Apr, 2021 3 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linuxRichard Weinberger authored
MTD core: * Handle possible -EPROBE_DEFER from parse_mtd_partitions() NAND core: * Fix error handling in nand_prog_page_op() (x2) * Add a helper to retrieve the number of ECC bytes per step * Add a helper to retrieve the number of ECC steps * Let ECC engines advertize the exact number of steps * ECC Hamming: - Populate the public nsteps field - Use the public nsteps field * ECC BCH: - Populate the public nsteps field - Use the public nsteps field Raw NAND core: * Add support for secure regions in NAND memory * Try not to use the ECC private structures * Remove duplicate include in rawnand.h * BBT: - Skip bad blocks when searching for the BBT in NAND Raw NAND controller drivers: * Qcom: - Convert bindings to YAML - Use dma_mapping_error() for error check - Add missing nand_cleanup() in error path - Return actual error code instead of -ENODEV - Update last code word register - Add helper to configure location register - Rename parameter name in macro - Add helper to check last code word - Convert nandc to chip in Read/Write helper - Update register macro name for 0x2c offset * GPMI: - Fix a double free in gpmi_nand_init * Rockchip: - Use flexible-array member instead of zero-length array * Atmel: - Update ecc_stats.corrected counter * MXC: - Remove unneeded of_match_ptr() * R852: - replace spin_lock_irqsave by spin_lock in hard IRQ * Brcmnand: - Move to polling in pio mode on oops write - Read/write oob during EDU transfer - Fix OOB R/W with Hamming ECC * FSMC: - Fix error code in fsmc_nand_probe() * OMAP: - Use ECC information from the generic structures SPI-NAND core: * Add missing MODULE_DEVICE_TABLE() SPI-NAND drivers: * gigadevice: Support GD5F1GQ5UExxG
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Richard Weinberger authored
Merge tag 'spi-nor/for-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next SPI NOR core changes: - Add OTP support - Fix module unload while an op in progress - Add various cleanup patches SPI NOR controller drivers changes: - intel-spi: Move platform data header to x86 subfolder
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git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linuxRichard Weinberger authored
CFI changes Just a couple of fixes for v5.13-rc1 * Disable broken buffered writes for CFI chips within ID 0x2201 * Address a Coverity report for unused value
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- 11 Apr, 2021 2 commits
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Tudor Ambarus authored
This reverts commit 04b8edad. mx25l51245g and mx66l51235l have the same flash ID. The flash detection returns the first entry in the flash_info array that matches the flash ID that was read, thus for the 0xc2201a ID, mx25l51245g was always hit, introducing a regression for mx66l51235l. If one wants to differentiate the flash names, a better fix would be to differentiate between the two at run-time, depending on SFDP, and choose the correct name from a list of flash names, depending on the SFDP differentiator. Fixes: 04b8edad ("mtd: spi-nor: macronix: Add support for mx25l51245g") Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by:
Pratyush Yadav <p.yadav@ti.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210402082031.19055-2-tudor.ambarus@microchip.com
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Xiang Chen authored
If rmmod the driver during read or write, the driver will release the resources which are used during read or write, so it is possible to refer to NULL pointer. Use the testcase "mtd_debug read /dev/mtd0 0xc00000 0x400000 dest_file & sleep 0.5;rmmod spi_hisi_sfc_v3xx.ko", the issue can be reproduced in hisi_sfc_v3xx driver. To avoid the issue, fill the interface _get_device and _put_device of mtd_info to grab the reference to the spi controller driver module, so the request of rmmod the driver is rejected before read/write is finished. Fixes: b199489d ("mtd: spi-nor: add the framework for SPI NOR") Signed-off-by:
Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by:
Yicong Yang <yangyicong@hisilicon.com> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by:
Michael Walle <michael@walle.cc> Tested-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Michael Walle <michael@walle.cc> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1617262486-4223-1-git-send-email-yangyicong@hisilicon.com
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- 07 Apr, 2021 8 commits
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Colin Ian King authored
The variable timeo is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20210325174514.486272-1-colin.king@canonical.com Addresses-Coverity: ("Unused value")
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Mauri Sandberg authored
Buffer writes do not work with AMD chip 0x2201. The chip in question is a AMD/Spansion/Cypress Semiconductor S29GL256N and datasheet [1] talks about writing buffers being possible. While waiting for a neater solution resort to writing word-sized chunks only. Without the patch kernel logs will be flooded with entries like below: jffs2_scan_eraseblock(): End of filesystem marker found at 0x0 jffs2_build_filesystem(): unlocking the mtd device... done. jffs2_build_filesystem(): erasing all blocks after the end marker... MTD do_write_buffer_wait(): software timeout, address:0x01ec000a. jffs2: Write clean marker to block at 0x01920000 failed: -5 MTD do_write_buffer_wait(): software timeout, address:0x01e2000a. jffs2: Write clean marker to block at 0x01880000 failed: -5 MTD do_write_buffer_wait(): software timeout, address:0x01e0000a. jffs2: Write clean marker to block at 0x01860000 failed: -5 MTD do_write_buffer_wait(): software timeout, address:0x01dc000a. jffs2: Write clean marker to block at 0x01820000 failed: -5 MTD do_write_buffer_wait(): software timeout, address:0x01da000a. jffs2: Write clean marker to block at 0x01800000 failed: -5 ... Tested on a Buffalo wzr-hp-g300nh running kernel 5.10.16. [1] https://www.cypress.com/file/219941/download or https://datasheetspdf.com/pdf-file/565708/SPANSION/S29GL256N/1Signed-off-by:
Mauri Sandberg <sandberg@mailfence.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20210309174859.362060-1-sandberg@mailfence.com
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Manivannan Sadhasivam authored
dma_mapping_error() should be used for checking the error value of dma_map_resource() API. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210405050912.115591-1-manivannan.sadhasivam@linaro.org
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Lv Yunlong authored
If the callee gpmi_alloc_dma_buffer() failed to alloc memory for this->raw_buffer, gpmi_free_dma_buffer() will be called to free this->auxiliary_virt. But this->auxiliary_virt is still a non-NULL and valid ptr. Then gpmi_alloc_dma_buffer() returns err and gpmi_free_dma_buffer() is called again to free this->auxiliary_virt in err_out. This causes a double free. As gpmi_free_dma_buffer() has already called in gpmi_alloc_dma_buffer's error path, so it should return err directly instead of releasing the dma buffer again. Fixes: 4d02423e ("mtd: nand: gpmi: Fix gpmi_nand_init() error path") Signed-off-by:
Lv Yunlong <lyl2019@mail.ustc.edu.cn> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210403060905.5251-1-lyl2019@mail.ustc.edu.cn
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Manivannan Sadhasivam authored
Add missing nand_cleanup() in the alloc_bam_transaction() error path to cleanup the resources properly. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-5-manivannan.sadhasivam@linaro.org
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Manivannan Sadhasivam authored
On a typical end product, a vendor may choose to secure some regions in the NAND memory which are supposed to stay intact between FW upgrades. The access to those regions will be blocked by a secure element like Trustzone. So the normal world software like Linux kernel should not touch these regions (including reading). The regions are declared using a NAND chip DT property, "secure-regions". So let's make use of this property in the raw NAND core and skip access to the secure regions present in a system. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-4-manivannan.sadhasivam@linaro.org
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Manivannan Sadhasivam authored
On a typical end product, a vendor may choose to secure some regions in the NAND memory which are supposed to stay intact between FW upgrades. The access to those regions will be blocked by a secure element like Trustzone. So the normal world software like Linux kernel should not touch these regions (including reading). So let's add a property for declaring such secure regions so that the drivers can skip touching them. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-3-manivannan.sadhasivam@linaro.org
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Manivannan Sadhasivam authored
Convert Qcom NANDc devicetree binding to YAML. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210402150128.29128-2-manivannan.sadhasivam@linaro.org
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- 02 Apr, 2021 3 commits
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Michael Walle authored
With all the helper functions in place, add OTP support for the Winbond W25Q32JW and W25Q32FW. Both were tested on a LS1028A SoC with a NXP FSPI controller. Signed-off-by:
Michael Walle <michael@walle.cc> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210321235140.8308-4-michael@walle.cc
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Michael Walle authored
Use the new OTP ops to implement OTP access on Winbond flashes. Most Winbond flashes provides up to four different OTP regions ("Security Registers"). Winbond devices use a special opcode to read and write to the OTP regions, just like the RDSFDP opcode. In fact, it seems that the (undocumented) first OTP area of the newer flashes is the actual SFDP table. On a side note, Winbond devices also allow erasing the OTP regions as long as the area isn't locked down. Signed-off-by:
Michael Walle <michael@walle.cc> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210321235140.8308-3-michael@walle.cc
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Michael Walle authored
SPI flashes sometimes have a special OTP area, which can (and is) used to store immutable properties like board serial number or vendor assigned network hardware addresses. The MTD subsystem already supports accessing such areas and some (non SPI NOR) flashes already implement support for it. It differentiates between user and factory areas. User areas can be written by the user and factory ones are pre-programmed and locked down by the vendor, usually containing an "electrical serial number". This patch will only add support for the user areas. Lay the foundation and implement the MTD callbacks for the SPI NOR and add necessary parameters to the flash_info structure. If a flash supports OTP it can be added by the convenience macro OTP_INFO(). Sometimes there are individual regions, which might have individual offsets. Therefore, it is possible to specify the starting address of the first regions as well as the distance between two regions (e.g. Winbond devices uses this method). Additionally, the regions might be locked down. Once locked, no further write access is possible. For SPI NOR flashes the OTP area is accessed like the normal memory, e.g. by offset addressing; except that you either have to use special read/write commands (Winbond) or you have to enter (and exit) a specific OTP mode (Macronix, Micron). Thus we introduce four operations to which the MTD callbacks will be mapped: .read(), .write(), .lock() and .is_locked(). The read and the write ops will be given an address offset to operate on while the locking ops use regions because locking always affects a whole region. It is up to the flash driver to implement these ops. Signed-off-by:
Michael Walle <michael@walle.cc> [ta: use div64_u64(), IS_ALIGNED, params->otp.org. unsigned int region, drop comment, add rlen local variable in spi_nor_mtd_otp_lock()] Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210321235140.8308-2-michael@walle.cc
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- 31 Mar, 2021 2 commits
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Tudor Ambarus authored
- bool return value for spi_nor_check_lock_status_sr(), gets rid of the return 1, - introduce temporary variables for better readability. Suggested-by:
Joe Perches <joe@perches.com> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Reviewed-by:
Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20210322075131.45093-3-tudor.ambarus@microchip.com
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Tudor Ambarus authored
It makes the core file a bit smaller and provides better separation between the Software Write Protection features and the core logic. All the next generic software write protection features (e.g. Individual Block Protection) will reside in swp.c. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Michael Walle <michael@walle.cc> Acked-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210322075131.45093-2-tudor.ambarus@microchip.com
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- 28 Mar, 2021 17 commits
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Stefan Riedmueller authored
The blocks containing the bad block table can become bad as well. So make sure to skip any blocks that are marked bad when searching for the bad block table. Otherwise in very rare cases where two BBT blocks wear out it might happen that an obsolete BBT is used instead of a newer available version. Signed-off-by:
Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210325102337.481172-1-s.riedmueller@phytec.de
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Wan Jiabing authored
linux/mtd/nand.h has been included at line 17. So we remove the duplicate one at line 21. Signed-off-by:
Wan Jiabing <wanjiabing@vivo.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210323031737.259365-1-wanjiabing@vivo.com
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Rafał Miłecki authored
This allows extending ofpart parser with support for Linksys Northstar devices. That support uses recently added quirks mechanism. Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-2-zajec5@gmail.com
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Rafał Miłecki authored
Linksys on Broadcom Northstar devices uses fixed flash layout with multiple firmware partitions. Signed-off-by:
Rafał Miłecki <rafal@milecki.pl> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210312134919.7767-1-zajec5@gmail.com
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Ansuel Smith authored
Document nvmem-cells compatible used to treat mtd partitions as a nvmem provider. Signed-off-by:
Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-3-ansuelsmth@gmail.com
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Ansuel Smith authored
Drop $nodename restriction as now mtd partition can also be used as nvmem provider. Signed-off-by:
Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-2-ansuelsmth@gmail.com
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Ansuel Smith authored
Partitions that contains the nvmem-cells compatible will register their direct subonodes as nvmem cells and the node will be treated as a nvmem provider. Signed-off-by:
Ansuel Smith <ansuelsmth@gmail.com> Tested-by:
Rafał Miłecki <rafal@milecki.pl> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210312062830.20548-1-ansuelsmth@gmail.com
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Michael Walle authored
This may sound like a contradiction but some SPI-NOR flashes really support erasing their OTP region until it is finally locked. Having the possibility to erase an OTP region might come in handy during development. The ioctl argument follows the OTPLOCK style. Signed-off-by:
Michael Walle <michael@walle.cc> Acked-by:
Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210303201819.2752-1-michael@walle.cc
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Michael Walle authored
MEMLOCK, MEMUNLOCK and OTPLOCK modify protection bits. Thus require write permission. Depending on the hardware MEMLOCK might even be write-once, e.g. for SPI-NOR flashes with their WP# tied to GND. OTPLOCK is always write-once. MEMSETBADBLOCK modifies the bad block table. Fixes: f7e6b19b ("mtd: properly check all write ioctls for permissions") Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by:
Rafał Miłecki <rafal@milecki.pl> Acked-by:
Richard Weinberger <richard@nod.at> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210303155735.25887-1-michael@walle.cc
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Alexander Lobakin authored
The module misses MODULE_DEVICE_TABLE() for both SPI and OF ID tables and thus never autoloads on ID matches. Add the missing declarations. Present since day-0 of spinand framework introduction. Fixes: 7529df46 ("mtd: nand: Add core infrastructure to support SPI NANDs") Cc: stable@vger.kernel.org # 4.19+ Signed-off-by:
Alexander Lobakin <alobakin@pm.me> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210323173714.317884-1-alobakin@pm.me
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Zou Wei authored
Suppresses the following coccinelle warning: drivers/mtd/nand/raw/rockchip-nand-controller.c:162:4-8: WARNING use flexible-array member instead Signed-off-by:
Zou Wei <zou_wei@huawei.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210323131137.45552-1-zou_wei@huawei.com
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Kai Stuhlemmer (ebee Engineering) authored
Update MTD ECC statistics with the number of corrected bits. Fixes: f88fc122 ("mtd: nand: Cleanup/rework the atmel_nand driver") Cc: stable@vger.kernel.org Signed-off-by:
Kai Stuhlemmer (ebee Engineering) <kai.stuhlemmer@ebee.de> Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210322150714.101585-1-tudor.ambarus@microchip.com
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Fabio Estevam authored
i.MX is a DT-only platform, so of_match_ptr() can be safely removed. Remove the unneeded of_match_ptr(). Signed-off-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210316000042.200392-1-festevam@gmail.com
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Tian Tao authored
The code has been in a irq-disabled context since it is hard IRQ. There is no necessity to do it again. Signed-off-by:
Tian Tao <tiantao6@hisilicon.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1615770495-31939-1-git-send-email-tiantao6@hisilicon.com
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Zhang Yunkai authored
'linux/mtd/nand.h' included in 'rawnand.h' is duplicated. It is also included in the 17th line. Signed-off-by:
Zhang Yunkai <zhang.yunkai@zte.com.cn> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210313105702.365878-1-zhang.yunkai@zte.com.cn
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Kamal Dasu authored
This change makes sure that Broadcom NAND driver moves to interrupt polling on the first brcmnand_write() call. Signed-off-by:
Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210311170909.9031-2-kdasu.kdev@gmail.com
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Kamal Dasu authored
Added support to read/write oob during EDU transfers. Signed-off-by:
Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210311170909.9031-1-kdasu.kdev@gmail.com
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- 15 Mar, 2021 4 commits
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Tudor Ambarus authored
s/legacy/default. spi_nor_info_init_params initializes some default flash parameters and settings that can be overwritten when parsing SFDP, or by fixup hooks. There's nothing legacy about them, they are just some default settings, if not otherwise discovered or specified. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210315055634.17332-1-tudor.ambarus@microchip.com
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Tudor Ambarus authored
spi_nor_parse_sfdp(nor, nor->params); passes for the second argument a member within the first argument. Drop the second argument and obtain it directly from the first, and do it across all the children functions. This is a follow up for 'commit 69a8eed5 ("mtd: spi-nor: Don't copy self-pointing struct around")' Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210306095002.22983-4-tudor.ambarus@microchip.com
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Tudor Ambarus authored
Useful when debugging non-uniform erase. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210306095002.22983-3-tudor.ambarus@microchip.com
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Tudor Ambarus authored
addr and len were gratuitously updated even when spi_nor_wait_till_ready() failed. Wait for the erase cmd to complete and then advance the erase. Signed-off-by:
Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by:
Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20210306095002.22983-2-tudor.ambarus@microchip.com
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