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  1. 21 Feb, 2022 1 commit
  2. 31 Jan, 2022 1 commit
  3. 04 Jan, 2022 1 commit
    • Sudeep Holla's avatar
      ACPI: PCC: Implement OperationRegion handler for the PCC Type 3 subtype · 77e2a047
      Sudeep Holla authored
      PCC OpRegion provides a mechanism to communicate with the platform
      directly from the AML. PCCT provides the list of PCC channel available
      in the platform, a subset or all of them can be used in PCC Opregion.
      
      This patch registers the PCC OpRegion handler before ACPI tables are
      loaded. This relies on the special context data passed to identify and
      set up the PCC channel before the OpRegion handler is executed for the
      first time.
      
      Typical PCC Opregion declaration looks like this:
      
      OperationRegion (PFRM, PCC, 2, 0x74)
      Field (PFRM, ByteAcc, NoLock, Preserve)
      {
          SIGN,   32,
          FLGS,   32,
          LEN,    32,
          CMD,    32,
          DATA,   800
      }
      
      It contains four named double words followed by 100 bytes of buffer
      names DATA.
      
      ASL can fill out the buffer something like:
      
          /* Create global or local buffer */
          Name (BUFF, Buffer (0x0C){})
          /* Create double word fields over the buffer */
          CreateDWordField (BUFF, 0x0, WD0)
          CreateDWordField (BUFF, 0x04, WD1)
          CreateDWordField (BUFF, 0x08, WD2)
      
          /* Fill the named fields */
          WD0 = 0x50434300
          SIGN = BUFF
          WD0 = 1
          FLGS = BUFF
          WD0 = 0x10
          LEN = BUFF
      
          /* Fill the payload in the DATA buffer */
          WD0 = 0
          WD1 = 0x08
          WD2 = 0
          DATA = BUFF
      
          /* Write to CMD field to trigger handler */
          WD0 = 0x4404
          CMD = BUFF
      
      This buffer is received by acpi_pcc_opregion_space_handler. This
      handler will fetch the complete buffer via internal_pcc_buffer.
      
      The setup handler will receive the special PCC context data which will
      contain the PCC channel index which used to set up the channel. The
      buffer pointer and length is saved in region context which is then used
      in the handler.
      
      (kernel test robot: Build failure with CONFIG_ACPI_DEBUGGER)
      Link: https://lore.kernel.org/r/202201041539.feAV0l27-lkp@intel.comReported-by: default avatarkernel test robot <lkp@intel.com>
      Signed-off-by: default avatarSudeep Holla <sudeep.holla@arm.com>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      77e2a047
  4. 27 Dec, 2021 2 commits
    • Chen Yu's avatar
      ACPI: Introduce Platform Firmware Runtime Telemetry driver · b0013e03
      Chen Yu authored
      This driver allows user space to fetch telemetry data from the
      firmware with the help of the Platform Firmware Runtime Telemetry
      interface.
      
      Both PFRU and PFRT are based on ACPI _DSM interfaces located under
      special device objects in the ACPI Namespace, but these interfaces
      are different from each other, so it is better to provide a separate
      driver from each of them, even though they share some common
      definitions and naming conventions.
      Tested-by: default avatarHongyu Ning <hongyu.ning@intel.com>
      Signed-off-by: default avatarChen Yu <yu.c.chen@intel.com>
      [ rjw: Subject and changelog edits ]
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      b0013e03
    • Chen Yu's avatar
      ACPI: Introduce Platform Firmware Runtime Update device driver · 0db89fa2
      Chen Yu authored
      Introduce the pfr_update driver which can be used for Platform Firmware
      Runtime code injection and driver update [1].
      
      The user is expected to provide the EFI capsule, and pass it to the
      driver by writing the capsule to a device special file. The capsule
      is transferred by the driver to the platform firmware with the help
      of an ACPI _DSM method under the special ACPI Platform Firmware
      Runtime Update device (INTC1080), and the actual firmware update is
      carried out by the low-level Management Mode code in the platform
      firmware.
      
      This change allows certain pieces of the platform firmware to be
      updated on the fly while the system is running (runtime) without the
      need to restart it, which is key in the cases when the system needs to
      be available 100% of the time and it cannot afford the downtime related
      to restarting it, or when the work carried out by the system is
      particularly important, so it cannot be interrupted, and it is not
      practical to wait until it is complete.
      
      Link: https://uefi.org/sites/default/files/resources/Intel_MM_OS_Interface_Spec_Rev100.pdf # [1]
      Tested-by: default avatarHongyu Ning <hongyu.ning@intel.com>
      Signed-off-by: default avatarChen Yu <yu.c.chen@intel.com>
      [ rjw: Subject and changelog edits ]
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      0db89fa2
  5. 15 Nov, 2021 1 commit
  6. 24 Sep, 2021 1 commit
  7. 19 Jul, 2021 1 commit
  8. 16 Jul, 2021 1 commit
  9. 01 Jul, 2021 1 commit
  10. 25 Jun, 2021 1 commit
  11. 10 Jun, 2021 1 commit
    • Erik Kaneda's avatar
      ACPI: PRM: implement OperationRegion handler for the PlatformRtMechanism subtype · cefc7ca4
      Erik Kaneda authored
      Platform Runtime Mechanism (PRM) is a firmware interface that exposes
      a set of binary executables that can either be called from the AML
      interpreter or device drivers by bypassing the AML interpreter.
      This change implements the AML interpreter path.
      
      According to the specification [1], PRM services are listed in an
      ACPI table called the PRMT. This patch parses module and handler
      information listed in the PRMT and registers the PlatformRtMechanism
      OpRegion handler before ACPI tables are loaded.
      
      Each service is defined by a 16-byte GUID and called from writing a
      26-byte ASL buffer containing the identifier to a FieldUnit object
      defined inside a PlatformRtMechanism OperationRegion.
      
          OperationRegion (PRMR, PlatformRtMechanism, 0, 26)
          Field (PRMR, BufferAcc, NoLock, Preserve)
          {
              PRMF, 208 // Write to this field to invoke the OperationRegion Handler
          }
      
      The 26-byte ASL buffer is defined as the following:
      
      Byte Offset   Byte Length    Description
      =============================================================
           0             1         PRM OperationRegion handler status
           1             8         PRM service status
           9             1         PRM command
          10            16         PRM handler GUID
      
      The ASL caller fills out a 26-byte buffer containing the PRM command
      and the PRM handler GUID like so:
      
          /* Local0 is the PRM data buffer */
          Local0 = buffer (26){}
      
          /* Create byte fields over the buffer */
          CreateByteField (Local0, 0x9, CMD)
          CreateField (Local0, 0x50, 0x80, GUID)
      
          /* Fill in the command and data fields of the data buffer */
          CMD = 0 // run command
          GUID = ToUUID("xxxx-xx-xxx-xxxx")
      
          /*
           * Invoke PRM service with an ID that matches GUID and save the
           * result.
           */
          Local0 = (\_SB.PRMT.PRMF = Local0)
      
      Byte offset 0 - 8 are written by the handler as a status passed back to AML
      and used by ASL like so:
      
          /* Create byte fields over the buffer */
          CreateByteField (Local0, 0x0, PSTA)
          CreateQWordField (Local0, 0x1, USTA)
      
      In this ASL code, PSTA contains a status from the OperationRegion and
      USTA contains a status from the PRM service.
      
      The 26-byte buffer is recieved by acpi_platformrt_space_handler. This
      handler will look at the command value and the handler guid and take
      the approperiate actions.
      
      Command value    Action
      =====================================================================
          0            Run the PRM service indicated by the PRM handler
                       GUID (bytes 10-26)
      
          1            Prevent PRM runtime updates from happening to the
                       service's parent module
      
          2            Allow PRM updates from happening to the service's parent module
      
      This patch enables command value 0.
      
      Link: https://uefi.org/sites/default/files/resources/Platform%20Runtime%20Mechanism%20-%20with%20legal%20notice.pdf # [1]
      Signed-off-by: default avatarErik Kaneda <erik.kaneda@intel.com>
      [ rjw: Subject and changelog edits ]
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      cefc7ca4
  12. 24 Feb, 2021 1 commit
  13. 29 Jan, 2021 1 commit
  14. 07 Jan, 2021 1 commit
  15. 30 Dec, 2020 1 commit
  16. 15 Sep, 2020 2 commits
  17. 27 Jul, 2020 2 commits
  18. 22 Jun, 2020 1 commit
  19. 13 Feb, 2020 1 commit
  20. 27 Dec, 2019 1 commit
  21. 29 Nov, 2019 1 commit
  22. 07 Nov, 2019 1 commit
  23. 25 Oct, 2019 2 commits
    • Hans de Goede's avatar
      ACPI / PMIC: Add Cherry Trail Crystal Cove PMIC OpRegion driver · cefe6aac
      Hans de Goede authored
      We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
      code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
      Cove Plus" PMIC and talks about Cherry Trail, so presuambly that one
      could be used to get register info for the regulators if we need to
      implement regulator support in the future.
      
      For now the sole purpose of this driver is to make
      intel_soc_pmic_exec_mipi_pmic_seq_element work on devices with a
      CHT Crystal Cove PMIC.
      
      Specifically this fixes the following MIPI PMIC sequence related errors
      on e.g. an Asus T100HA:
      
      [  178.211801] intel_soc_pmic_exec_mipi_pmic_seq_element: No PMIC registered
      [  178.211897] [drm:intel_dsi_dcs_init_backlight_funcs [i915]] *ERROR* mipi_exec_pmic failed, error: -6
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      cefe6aac
    • Hans de Goede's avatar
      ACPI / PMIC: Add byt prefix to Crystal Cove PMIC OpRegion driver · ed852cde
      Hans de Goede authored
      Our current Crystal Cove OpRegion driver is only valid for the
      Crystal Cove PMIC variant found on Bay Trail (BYT) boards,
      Cherry Trail (CHT) based boards use another variant.
      
      At least the regulator registers are different on CHT and these registers
      are one of the things controlled by the custom PMIC OpRegion.
      
      Commit 4d9ed62a ("mfd: intel_soc_pmic: Export separate mfd-cell
      configs for BYT and CHT") has disabled the intel_pmic_crc.c code for CHT
      devices by removing the "crystal_cove_pmic" MFD cell on CHT devices.
      
      This commit renames the intel_pmic_crc.c driver and the cell to be
      prefixed with "byt" to indicate that this code is for BYT devices only.
      
      This is a preparation patch for adding a separate PMIC OpRegion
      driver for the CHT variant of the Crystal Cove PMIC (sometimes called
      Crystal Cove Plus in Android kernel sources).
      Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      ed852cde
  24. 16 Aug, 2019 2 commits
  25. 22 Jun, 2019 1 commit
  26. 08 Jun, 2019 1 commit
  27. 04 Apr, 2019 1 commit
  28. 14 Jan, 2019 1 commit
  29. 02 Jan, 2019 1 commit
    • Sinan Kaya's avatar
      ACPI: Fix build failure when CONFIG_NLS is set to 'n' · 2e61069b
      Sinan Kaya authored
      Observing link failure as follows when CONFIG_ACPI is set but
      both CONFIG_NLS and CONFIG_PCI are no set:
      
      drivers/acpi/device_sysfs.o: In function `description_show':
      device_sysfs.c:(.text+0x48a): undefined reference to `utf16s_to_utf8s'
      
      This issue was previously addressed implicitly by commit 8a226e00
      (PCI: pci-label: Fix build failure when CONFIG_NLS is set to 'm' by
      allmodconfig) causing PCI_LABEL to be selected when ACPI was set
      which caused NLS to be selected too in that case.
      
      However, after commit 5d32a665 (PCI/ACPI: Allow ACPI to be built
      without CONFIG_PCI set) it is possible to build ACPI support without
      PCI, so make ACPI select NLS directly to cover that case.
      
      Fixes: 5d32a665 (PCI/ACPI: Allow ACPI to be built without CONFIG_PCI set)
      Signed-off-by: default avatarSinan Kaya <okaya@kernel.org>
      [ rjw: Changelog ]
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      2e61069b
  30. 20 Dec, 2018 2 commits
  31. 13 Dec, 2018 1 commit
  32. 08 Nov, 2018 1 commit
    • Arnd Bergmann's avatar
      ACPI / PMIC: xpower: fix IOSF_MBI dependency · 017ce359
      Arnd Bergmann authored
      We still get a link failure with IOSF_MBI=m when the xpower driver
      is built-in:
      
      drivers/acpi/pmic/intel_pmic_xpower.o: In function `intel_xpower_pmic_update_power':
      intel_pmic_xpower.c:(.text+0x4f2): undefined reference to `iosf_mbi_block_punit_i2c_access'
      intel_pmic_xpower.c:(.text+0x5e2): undefined reference to `iosf_mbi_unblock_punit_i2c_access'
      
      This makes the dependency stronger, so we can only build when IOSF_MBI
      is built-in.
      
      Fixes: 6a9b593d (ACPI / PMIC: xpower: Add depends on IOSF_MBI to Kconfig entry)
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
      017ce359
  33. 25 Oct, 2018 1 commit
  34. 16 Oct, 2018 1 commit