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  1. 24 Jun, 2013 1 commit
  3. 30 Apr, 2013 1 commit
  5. 15 Apr, 2013 2 commits
    • Andy Shevchenko's avatar
      dma: acpi-dma: introduce ACPI DMA helpers · 1b2e98bc
      Andy Shevchenko authored 
      There is a new generic API to get a DMA channel for a slave device (commit
9a6cecc8 "dmaengine: add helper function to request a slave DMA channel"). In
similar fashion to the DT case (commit aa3da644 "of: Add generic device tree
DMA helpers") we introduce helpers to the DMAC drivers which are enumerated by
ACPI.

The proposed extension provides the following API calls:
	acpi_dma_controller_register(), devm_acpi_dma_controller_register()
	acpi_dma_controller_free(), devm_acpi_dma_controller_free()
	acpi_dma_simple_xlate()
	acpi_dma_request_slave_chan_by_index()
	acpi_dma_request_slave_chan_by_name()

The first two should be used, for example, at probe() and remove() of the
corresponding DMAC driver. At the register stage the DMAC driver supplies a
custom xlate() function to translate a struct dma_spec into struct dma_chan.

Accordingly to the ACPI Fixed DMA resource specification the only two pieces of
information the slave device has are the channel id and the request line (slave
id). Those two are represented by struct dma_spec. The
acpi_dma_request_slave_chan_by_index() provides access to the specifix FixedDMA
resource by its index. Whereas dma_request_slave_channel() takes a string
parameter to identify the DMA resources required by the slave device. To make a
slave device driver work with both DeviceTree and ACPI enumeration a simple
convention is established: "tx" corresponds to the index 0 and "rx" to the
index 1. In case of robust configuration the slave device driver unfortunately
needs to call acpi_dma_request_slave_chan_by_index() directly.

Additionally the patch provides "managed" version of the register/free pair
i.e. devm_acpi_dma_controller_register() and devm_acpi_dma_controller_free().
Usually, the driver uses only devm_acpi_dma_controller_register().
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      1b2e98bc
    • Dave Jiang's avatar
      ioatdma: Removing PQ val disable for cb3.3 · 3f09ede4
      Dave Jiang authored 
      The PQ Val ops work on the newer hardware so we should actually provide support
for it and remove the disabling bits.
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Acked-by: default avatarDan Williams <djbw@fb.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      3f09ede4
  7. 21 Mar, 2013 1 commit
  9. 13 Feb, 2013 1 commit
  11. 08 Jan, 2013 2 commits
  13. 07 Jan, 2013 1 commit
  15. 03 Jan, 2013 1 commit
  17. 25 Oct, 2012 1 commit
  19. 14 Sep, 2012 1 commit
    • Zhangfei Gao's avatar
      dmaengine: mmp-pdma support · c8acd6aa
      Zhangfei Gao authored 
      1. virtual channel vs. physical channel
Virtual channel is managed by dmaengine
Physical channel handling resource, such as irq
Physical channel is alloced dynamically as descending priority,
freed immediately when irq done.
The availble highest priority physically channel will alwayes be alloced

Issue pending list -> alloc highest dma physically channel available -> dma done -> free physically channel

2. list: running list & pending list
submit: desc list -> pending list
issue_pending_list: if (IDLE) pending list -> running list; free pending list (RUN)
irq: free running list (IDLE)
     check pendlist -> pending list -> running list; free pending list (RUN)

3. irq:
Each list generate one irq, calling callback
One list may contain several desc chain, in such case, make sure only the last desc list generate irq.

4. async
Submit will add desc chain to pending list, which can be multi-called
If multi desc chain is submitted, only the last desc would generate irq -> call back
If IDLE, issue_pending_list start pending_list, transforming pendlist to running list
If RUN, irq will start pending list

5. test
5.1 pxa3xx_nand on pxa910
5.2 insmod dmatest.ko (threads_per_chan=y)
By default drivers/dma/dmatest.c test every channel and test memcpy with 1 threads per channel
Signed-off-by: default avatarZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarVinod Koul <vinod.koul@linux.intel.com>
      c8acd6aa
  21. 01 Sep, 2012 1 commit
  23. 31 Jul, 2012 1 commit
  25. 01 Jul, 2012 2 commits
  27. 23 Jun, 2012 1 commit
  29. 20 Jun, 2012 1 commit
  31. 08 Jun, 2012 1 commit
  33. 07 Jun, 2012 1 commit
  35. 12 May, 2012 1 commit
  37. 17 Apr, 2012 1 commit
  39. 27 Mar, 2012 1 commit
  41. 26 Mar, 2012 1 commit
  43. 08 Mar, 2012 1 commit
  45. 07 Mar, 2012 1 commit
    • Russell King's avatar
      DMA: sa11x0: add SA-11x0 DMA driver · 6365bead
      Russell King authored 
      Add support for the SA-11x0 DMA driver, which replaces the private
API version in arch/arm/mach-sa1100/dma.c.

We model this as a set of virtual DMA channels, one for each request
signal, and assign the virtual DMA channel to a physical DMA channel
when there is work to be done.  This allows DMA users to claim their
channels, and hold them while not in use, without affecting the
availability of the physical channels.

Another advantage over this approach, compared to the private version,
is that a channel can be reconfigured on the fly without having to
release and re-request it - which for the IrDA driver, allows us to
use DMA for SIR mode transmit without eating up three physical
channels.  As IrDA is half-duplex, we actually only need one physical
channel, and this architecture allows us to achieve that.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      6365bead
  47. 19 Dec, 2011 1 commit
  49. 18 Nov, 2011 1 commit
  51. 17 Nov, 2011 3 commits
  53. 14 Sep, 2011 1 commit
  55. 08 Jun, 2011 1 commit
  57. 06 Jun, 2011 1 commit
  59. 09 May, 2011 1 commit
  61. 22 Mar, 2011 1 commit
  63. 06 Mar, 2011 1 commit
  65. 02 Mar, 2011 1 commit
    • Shawn Guo's avatar
      dmaengine: mxs-dma: add dma support for i.MX23/28 · a580b8c5
      Shawn Guo authored 
      This patch adds dma support for Freescale MXS-based SoC i.MX23/28,
including apbh-dma and apbx-dma.

* apbh-dma and apbx-dma are supported in the driver as two mxs-dma
  instances.

* apbh-dma is different between mx23 and mx28, hardware version
  register is used to differentiate.

* mxs-dma supports pio function besides data transfer.  The driver
  uses dma_data_direction DMA_NONE to identify the pio mode, and
  steals sgl and sg_len to get pio words and numbers from clients.

* mxs dmaengine has some very specific features, like sense function
  and the special NAND support (nand_lock, nand_wait4ready).  These
  are too specific to implemented in generic dmaengine driver.

* The driver refers to imx-sdma and only a single descriptor is
  statically assigned to each channel.
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
      a580b8c5
  67. 15 Jan, 2011 1 commit
  69. 30 Dec, 2010 1 commit
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