- 10 Mar, 2016 40 commits
-
-
Jes Sorensen authored
Implement additional init sequence code for the 8723bu. Signed-off-by:
Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by:
Kalle Valo <kvalo@codeaurora.org>
-
Jes Sorensen authored
Remove an unused variable to make the compiler happy. Signed-off-by:
-
Jes Sorensen authored
This should initialize the antennas on the 8723bu, but so far I am still not receiving anything :( More work is needed. Signed-off-by:
-
Jes Sorensen authored
This is a first stab of implementing rtl8723bu_config_channel(). For now this will only do 20MHz channels. Signed-off-by:
-
Jakub Sitnicki authored
TX power values are laid out differently in EFUSE found in RTL8192EU & RTL8188EU devices. TX power indices and differences for each RF path are not interleaved (A, B, A, B), as in other chips, but follow one another (A, B, C, D). Signed-off-by:
Jakub Sitnicki <jsitnicki@gmail.com> Signed-off-by:
-
Jes Sorensen authored
This was inspired by the vendor driver, but in the end never used for anything. Signed-off-by:
-
Jes Sorensen authored
This matches the flow of the vendor driver for newer hardware, and doesn't seem to cause issues for the older parts. Signed-off-by:
-
Jes Sorensen authored
Newer chips (8723bu/8192eu) has S0S1 settings which needs to be dealt with during LC calibration. Signed-off-by:
-
Jes Sorensen authored
The 8723bu also has it's own IQK calibration process. This is similar in flow, but still different enough to warrent it's own implementation, at least for now. Signed-off-by:
-
Jes Sorensen authored
This adds some additional register definitions for 8723bu, as well as a bit define for USB RXDMA aggregation in REG_RXDMA_AGG_PG_TH. Signed-off-by:
-
Jes Sorensen authored
rtl8192cu/rtl8188cu/rtl8723au use the same values, but 8723bu and 8192eu have their own. Signed-off-by:
-
Jes Sorensen authored
Usual gcc i386 issue reported by kbuildbot Signed-off-by:
-
Jes Sorensen authored
Fix a silly bug where the debug level was overwritten rather than amended for untested chips. Signed-off-by:
-
Jes Sorensen authored
Newer generation chips require the firmware be notified before we start the IQK calibration. Signed-off-by:
-
Jes Sorensen authored
The firmware command API differs slightly between new and old devices. The new generation requires the size since there is no extension bit encoded into the command number. Signed-off-by:
-
Jes Sorensen authored
Likewise for 8723bu, use a pointer to the efuse. Signed-off-by:
-
Jes Sorensen authored
Make the code easier to read and less error prone by using a pointer to the efuse. Signed-off-by:
-
Jakub Sitnicki authored
Signed-off-by:
-
Jakub Sitnicki authored
Signed-off-by:
-
Jakub Sitnicki authored
Avoid a negative conditional and an extra level of indentation in the bigger part of the loop body. Signed-off-by:
-
Jakub Sitnicki authored
It is enough to check for either illegal offset or illegal map address because map address is a value derived from an offset: map_addr = offset * 8 EFUSE_MAP_LEN = EFUSE_MAX_SECTION_8723A * 8 Leave just the check for an illegal map address because its upper bound (EFUSE_MAP_LEN) is used also in a couple other places. Signed-off-by:
-
Jes Sorensen authored
The larger mailboxes also use a different set of mailbox commands. This provides a list of the 64 bit commands. Signed-off-by:
-
Jes Sorensen authored
In addition do not apply fixups for 8188/8191/8192 A-cut UMC parts. Signed-off-by:
-
Jes Sorensen authored
This introduces additional register definitions for newer generation chips. Signed-off-by:
-
Jes Sorensen authored
Gen1 chips use a 16 bit mailbox extension register, for upto 48 bit mailbox commands. The newer generation chips use a 32 bit mailbox extension register instead, for upto 64 bit mailbox commands. Handle writing the larger mailboxes. Signed-off-by:
-
Jes Sorensen authored
The different RF module seems to require a different AGC table as well Signed-off-by:
-
Jes Sorensen authored
Newer chips seem to have some different mac registers, requiring a different init table. Signed-off-by:
-
Jes Sorensen authored
So far this is just for 8723BU. It includes writing to a number of registers I have seen no description for so far. 0x0064 0x0930 0x0944 Signed-off-by:
-
Jes Sorensen authored
Add 8723bu 1T radio init table. The vendor driver indicates that some registers need special treatment for TFBGA90, TFBGA80, and TFBGA79 packaging. However the vendor driver never actually checks the package type, so just stick to default values here. Signed-off-by:
-
Jes Sorensen authored
This adds the 8723bu PHY 1T init table. Signed-off-by:
-
Jes Sorensen authored
Only 1st generation chips do provide USB interrupts, so do not try to setup interrupts for newer chips (8192eu and 8723bu). Signed-off-by:
-
Jes Sorensen authored
The 8723bu, like the 8192eu, can also handle 1024 byte block writes. Signed-off-by:
-
Jes Sorensen authored
Implement first stab at parsing the 8723bu's efuse. Signed-off-by:
-
Jes Sorensen authored
This provides initial detection of 8723bu devices, and selects the correct firmware image to load. Signed-off-by:
-
Jes Sorensen authored
The newer generation chips have different interrupt registers. Initialize this correct registers on 8192eu. Signed-off-by:
-
Jes Sorensen authored
The 8192eu (and some other parts) will report an incorrect USB OUT EP. This tells the chip to drop it - as per the vendor driver. Signed-off-by:
-
Jes Sorensen authored
The logic for testing auto load failure in rtl8xxxu_auto_llt_table() was inverted. Signed-off-by:
-
Jes Sorensen authored
To match the flow of the vendor driver, move the LLT init to after the firmware is started. Signed-off-by:
-
Jes Sorensen authored
This reorganizes the device initialization to init page boundaries before starting the firmware. This matches the flow in the 8192eu vendor driver. Signed-off-by:
-
Jes Sorensen authored
Newer chips can auto load the LLT table, it is no longer necessary to build it manually in the driver. Signed-off-by:
-
