1. 16 Jul, 2024 11 commits
    • Sean Christopherson's avatar
      KVM: x86/mmu: Bug the VM if KVM tries to split a !hugepage SPTE · 3d4415ed
      Sean Christopherson authored
      Bug the VM instead of simply warning if KVM tries to split a SPTE that is
      non-present or not-huge.  KVM is guaranteed to end up in a broken state as
      the callers fully expect a valid SPTE, e.g. the shadow MMU will add an
      rmap entry, and all MMUs will account the expected small page.  Returning
      '0' is also technically wrong now that SHADOW_NONPRESENT_VALUE exists,
      i.e. would cause KVM to create a potential #VE SPTE.
      
      While it would be possible to have the callers gracefully handle failure,
      doing so would provide no practical value as the scenario really should be
      impossible, while the error handling would add a non-trivial amount of
      noise.
      
      Fixes: a3fe5dbd ("KVM: x86/mmu: Split huge pages mapped by the TDP MMU when dirty logging is enabled")
      Cc: David Matlack <dmatlack@google.com>
      Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
      Message-ID: <20240712151335.1242633-2-seanjc@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      3d4415ed
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-vmx-6.11' of https://github.com/kvm-x86/linux into HEAD · 208a352a
      Paolo Bonzini authored
      KVM VMX changes for 6.11
      
       - Remove an unnecessary EPT TLB flush when enabling hardware.
      
       - Fix a series of bugs that cause KVM to fail to detect nested pending posted
         interrupts as valid wake eents for a vCPU executing HLT in L2 (with
         HLT-exiting disable by L1).
      
       - Misc cleanups
      208a352a
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-svm-6.11' of https://github.com/kvm-x86/linux into HEAD · 1229cbef
      Paolo Bonzini authored
      KVM SVM changes for 6.11
      
       - Make per-CPU save_area allocations NUMA-aware.
      
       - Force sev_es_host_save_area() to be inlined to avoid calling into an
         instrumentable function from noinstr code.
      1229cbef
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-selftests-6.11' of https://github.com/kvm-x86/linux into HEAD · dbfd50cb
      Paolo Bonzini authored
      KVM selftests for 6.11
      
       - Remove dead code in the memslot modification stress test.
      
       - Treat "branch instructions retired" as supported on all AMD Family 17h+ CPUs.
      
       - Print the guest pseudo-RNG seed only when it changes, to avoid spamming the
         log for tests that create lots of VMs.
      
       - Make the PMU counters test less flaky when counting LLC cache misses by
         doing CLFLUSH{OPT} in every loop iteration.
      dbfd50cb
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-pmu-6.11' of https://github.com/kvm-x86/linux into HEAD · cda231cd
      Paolo Bonzini authored
      KVM x86/pmu changes for 6.11
      
       - Don't advertise IA32_PERF_GLOBAL_OVF_CTRL as an MSR-to-be-saved, as it reads
         '0' and writes from userspace are ignored.
      
       - Update to the newfangled Intel CPU FMS infrastructure.
      
       - Use macros instead of open-coded literals to clean up KVM's manipulation of
         FIXED_CTR_CTRL MSRs.
      cda231cd
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-mtrrs-6.11' of https://github.com/kvm-x86/linux into HEAD · 5c5ddf71
      Paolo Bonzini authored
      KVM x86 MTRR virtualization removal
      
      Remove support for virtualizing MTRRs on Intel CPUs, along with a nasty CR0.CD
      hack, and instead always honor guest PAT on CPUs that support self-snoop.
      5c5ddf71
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-mmu-6.11' of https://github.com/kvm-x86/linux into HEAD · 34b69ede
      Paolo Bonzini authored
      KVM x86 MMU changes for 6.11
      
       - Don't allocate kvm_mmu_page.shadowed_translation for shadow pages that can't
         hold leafs SPTEs.
      
       - Unconditionally drop mmu_lock when allocating TDP MMU page tables for eager
         page splitting to avoid stalling vCPUs when splitting huge pages.
      
       - Misc cleanups
      34b69ede
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-misc-6.11' of https://github.com/kvm-x86/linux into HEAD · 5dcc1e76
      Paolo Bonzini authored
      KVM x86 misc changes for 6.11
      
       - Add a global struct to consolidate tracking of host values, e.g. EFER, and
         move "shadow_phys_bits" into the structure as "maxphyaddr".
      
       - Add KVM_CAP_X86_APIC_BUS_CYCLES_NS to allow configuring the effective APIC
         bus frequency, because TDX.
      
       - Print the name of the APICv/AVIC inhibits in the relevant tracepoint.
      
       - Clean up KVM's handling of vendor specific emulation to consistently act on
         "compatible with Intel/AMD", versus checking for a specific vendor.
      
       - Misc cleanups
      5dcc1e76
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-generic-6.11' of https://github.com/kvm-x86/linux into HEAD · 86014c1e
      Paolo Bonzini authored
      KVM generic changes for 6.11
      
       - Enable halt poll shrinking by default, as Intel found it to be a clear win.
      
       - Setup empty IRQ routing when creating a VM to avoid having to synchronize
         SRCU when creating a split IRQCHIP on x86.
      
       - Rework the sched_in/out() paths to replace kvm_arch_sched_in() with a flag
         that arch code can use for hooking both sched_in() and sched_out().
      
       - Take the vCPU @id as an "unsigned long" instead of "u32" to avoid
         truncating a bogus value from userspace, e.g. to help userspace detect bugs.
      
       - Mark a vCPU as preempted if and only if it's scheduled out while in the
         KVM_RUN loop, e.g. to avoid marking it preempted and thus writing guest
         memory when retrieving guest state during live migration blackout.
      
       - A few minor cleanups
      86014c1e
    • Paolo Bonzini's avatar
      Merge tag 'kvm-x86-fixes-6.10-11' of https://github.com/kvm-x86/linux into HEAD · f4501e8b
      Paolo Bonzini authored
      KVM Xen:
      
      Fix a bug where KVM fails to check the validity of an incoming userspace
      virtual address and tries to activate a gfn_to_pfn_cache with a kernel address.
      f4501e8b
    • Paolo Bonzini's avatar
      Merge tag 'kvmarm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD · 1c5a0b55
      Paolo Bonzini authored
      KVM/arm64 changes for 6.11
      
       - Initial infrastructure for shadow stage-2 MMUs, as part of nested
         virtualization enablement
      
       - Support for userspace changes to the guest CTR_EL0 value, enabling
         (in part) migration of VMs between heterogenous hardware
      
       - Fixes + improvements to pKVM's FF-A proxy, adding support for v1.1 of
         the protocol
      
       - FPSIMD/SVE support for nested, including merged trap configuration
         and exception routing
      
       - New command-line parameter to control the WFx trap behavior under KVM
      
       - Introduce kCFI hardening in the EL2 hypervisor
      
       - Fixes + cleanups for handling presence/absence of FEAT_TCRX
      
       - Miscellaneous fixes + documentation updates
      1c5a0b55
  2. 14 Jul, 2024 8 commits
    • Oliver Upton's avatar
      Merge branch kvm-arm64/docs into kvmarm/next · bb032b23
      Oliver Upton authored
      * kvm-arm64/docs:
        : KVM Documentation fixes, courtesy of Changyuan Lyu
        :
        : Small set of typo fixes / corrections to the KVM API documentation
        : relating to MSIs and arm64 VGIC UAPI.
        MAINTAINERS: Include documentation in KVM/arm64 entry
        KVM: Documentation: Correct the VGIC V2 CPU interface addr space size
        KVM: Documentation: Enumerate allowed value macros of `irq_type`
        KVM: Documentation: Fix typo `BFD`
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bb032b23
    • Oliver Upton's avatar
      Merge branch kvm-arm64/nv-tcr2 into kvmarm/next · bc2e3253
      Oliver Upton authored
      * kvm-arm64/nv-tcr2:
        : Fixes to the handling of TCR_EL1, courtesy of Marc Zyngier
        :
        : Series addresses a couple gaps that are present in KVM (from cover
        : letter):
        :
        :   - VM configuration: HCRX_EL2.TCR2En is forced to 1, and we blindly
        :     save/restore stuff.
        :
        :   - trap bit description and routing: none, obviously, since we make a
        :     point in not trapping.
        KVM: arm64: Honor trap routing for TCR2_EL1
        KVM: arm64: Make PIR{,E0}_EL1 save/restore conditional on FEAT_TCRX
        KVM: arm64: Make TCR2_EL1 save/restore dependent on the VM features
        KVM: arm64: Get rid of HCRX_GUEST_FLAGS
        KVM: arm64: Correctly honor the presence of FEAT_TCRX
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bc2e3253
    • Oliver Upton's avatar
      Merge branch kvm-arm64/nv-sve into kvmarm/next · 8c2899e7
      Oliver Upton authored
      * kvm-arm64/nv-sve:
        : CPTR_EL2, FPSIMD/SVE support for nested
        :
        : This series brings support for honoring the guest hypervisor's CPTR_EL2
        : trap configuration when running a nested guest, along with support for
        : FPSIMD/SVE usage at L1 and L2.
        KVM: arm64: Allow the use of SVE+NV
        KVM: arm64: nv: Add additional trap setup for CPTR_EL2
        KVM: arm64: nv: Add trap description for CPTR_EL2
        KVM: arm64: nv: Add TCPAC/TTA to CPTR->CPACR conversion helper
        KVM: arm64: nv: Honor guest hypervisor's FP/SVE traps in CPTR_EL2
        KVM: arm64: nv: Load guest FP state for ZCR_EL2 trap
        KVM: arm64: nv: Handle CPACR_EL1 traps
        KVM: arm64: Spin off helper for programming CPTR traps
        KVM: arm64: nv: Ensure correct VL is loaded before saving SVE state
        KVM: arm64: nv: Use guest hypervisor's max VL when running nested guest
        KVM: arm64: nv: Save guest's ZCR_EL2 when in hyp context
        KVM: arm64: nv: Load guest hyp's ZCR into EL1 state
        KVM: arm64: nv: Handle ZCR_EL2 traps
        KVM: arm64: nv: Forward SVE traps to guest hypervisor
        KVM: arm64: nv: Forward FP/ASIMD traps to guest hypervisor
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      8c2899e7
    • Oliver Upton's avatar
      Merge branch kvm-arm64/el2-kcfi into kvmarm/next · 1270dad3
      Oliver Upton authored
      * kvm-arm64/el2-kcfi:
        : kCFI support in the EL2 hypervisor, courtesy of Pierre-Clément Tosi
        :
        : Enable the usage fo CONFIG_CFI_CLANG (kCFI) for hardening indirect
        : branches in the EL2 hypervisor. Unlike kernel support for the feature,
        : CFI failures at EL2 are always fatal.
        KVM: arm64: nVHE: Support CONFIG_CFI_CLANG at EL2
        KVM: arm64: Introduce print_nvhe_hyp_panic helper
        arm64: Introduce esr_brk_comment, esr_is_cfi_brk
        KVM: arm64: VHE: Mark __hyp_call_panic __noreturn
        KVM: arm64: nVHE: gen-hyprel: Skip R_AARCH64_ABS32
        KVM: arm64: nVHE: Simplify invalid_host_el2_vect
        KVM: arm64: Fix __pkvm_init_switch_pgd call ABI
        KVM: arm64: Fix clobbered ELR in sync abort/SError
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      1270dad3
    • Oliver Upton's avatar
      Merge branch kvm-arm64/ctr-el0 into kvmarm/next · 377d0e5d
      Oliver Upton authored
      * kvm-arm64/ctr-el0:
        : Support for user changes to CTR_EL0, courtesy of Sebastian Ott
        :
        : Allow userspace to change the guest-visible value of CTR_EL0 for a VM,
        : so long as the requested value represents a subset of features supported
        : by hardware. In other words, prevent the VMM from over-promising the
        : capabilities of hardware.
        :
        : Make this happen by fitting CTR_EL0 into the existing infrastructure for
        : feature ID registers.
        KVM: selftests: Assert that MPIDR_EL1 is unchanged across vCPU reset
        KVM: arm64: nv: Unfudge ID_AA64PFR0_EL1 masking
        KVM: selftests: arm64: Test writes to CTR_EL0
        KVM: arm64: rename functions for invariant sys regs
        KVM: arm64: show writable masks for feature registers
        KVM: arm64: Treat CTR_EL0 as a VM feature ID register
        KVM: arm64: unify code to prepare traps
        KVM: arm64: nv: Use accessors for modifying ID registers
        KVM: arm64: Add helper for writing ID regs
        KVM: arm64: Use read-only helper for reading VM ID registers
        KVM: arm64: Make idregs debugfs iterator search sysreg table directly
        KVM: arm64: Get sys_reg encoding from descriptor in idregs_debug_show()
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      377d0e5d
    • Oliver Upton's avatar
      Merge branch kvm-arm64/shadow-mmu into kvmarm/next · 435a9f60
      Oliver Upton authored
      * kvm-arm64/shadow-mmu:
        : Shadow stage-2 MMU support for NV, courtesy of Marc Zyngier
        :
        : Initial implementation of shadow stage-2 page tables to support a guest
        : hypervisor. In the author's words:
        :
        :   So here's the 10000m (approximately 30000ft for those of you stuck
        :   with the wrong units) view of what this is doing:
        :
        :     - for each {VMID,VTTBR,VTCR} tuple the guest uses, we use a
        :       separate shadow s2_mmu context. This context has its own "real"
        :       VMID and a set of page tables that are the combination of the
        :       guest's S2 and the host S2, built dynamically one fault at a time.
        :
        :     - these shadow S2 contexts are ephemeral, and behave exactly as
        :       TLBs. For all intent and purposes, they *are* TLBs, and we discard
        :       them pretty often.
        :
        :     - TLB invalidation takes three possible paths:
        :
        :       * either this is an EL2 S1 invalidation, and we directly emulate
        :         it as early as possible
        :
        :       * or this is an EL1 S1 invalidation, and we need to apply it to
        :         the shadow S2s (plural!) that match the VMID set by the L1 guest
        :
        :       * or finally, this is affecting S2, and we need to teardown the
        :         corresponding part of the shadow S2s, which invalidates the TLBs
        KVM: arm64: nv: Truely enable nXS TLBI operations
        KVM: arm64: nv: Add handling of NXS-flavoured TLBI operations
        KVM: arm64: nv: Add handling of range-based TLBI operations
        KVM: arm64: nv: Add handling of outer-shareable TLBI operations
        KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information
        KVM: arm64: nv: Tag shadow S2 entries with guest's leaf S2 level
        KVM: arm64: nv: Handle FEAT_TTL hinted TLB operations
        KVM: arm64: nv: Handle TLBI IPAS2E1{,IS} operations
        KVM: arm64: nv: Handle TLBI ALLE1{,IS} operations
        KVM: arm64: nv: Handle TLBI VMALLS12E1{,IS} operations
        KVM: arm64: nv: Handle TLB invalidation targeting L2 stage-1
        KVM: arm64: nv: Handle EL2 Stage-1 TLB invalidation
        KVM: arm64: nv: Add Stage-1 EL2 invalidation primitives
        KVM: arm64: nv: Unmap/flush shadow stage 2 page tables
        KVM: arm64: nv: Handle shadow stage 2 page faults
        KVM: arm64: nv: Implement nested Stage-2 page table walk logic
        KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      435a9f60
    • Oliver Upton's avatar
      Merge branch kvm-arm64/ffa-1p1 into kvmarm/next · a35d5b20
      Oliver Upton authored
      * kvm-arm64/ffa-1p1:
        : Improvements to the pKVM FF-A Proxy, courtesy of Sebastian Ene
        :
        : Various minor improvements to how host FF-A calls are proxied with the
        : TEE, along with support for v1.1 of the protocol.
        KVM: arm64: Use FF-A 1.1 with pKVM
        KVM: arm64: Update the identification range for the FF-A smcs
        KVM: arm64: Add support for FFA_PARTITION_INFO_GET
        KVM: arm64: Trap FFA_VERSION host call in pKVM
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      a35d5b20
    • Oliver Upton's avatar
      Merge branch kvm-arm64/misc into kvmarm/next · bd2e9513
      Oliver Upton authored
      * kvm-arm64/misc:
        : Miscellaneous updates
        :
        :  - Provide a command-line parameter to statically control the WFx trap
        :    selection in KVM
        :
        :  - Make sysreg masks allocation accounted
        Revert "KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative polarity"
        KVM: arm64: nv: Use GFP_KERNEL_ACCOUNT for sysreg_masks allocation
        KVM: arm64: nv: Fix RESx behaviour of disabled FGTs with negative polarity
        KVM: arm64: Add early_param to control WFx trapping
      Signed-off-by: default avatarOliver Upton <oliver.upton@linux.dev>
      bd2e9513
  3. 12 Jul, 2024 13 commits
  4. 10 Jul, 2024 1 commit
    • Bibo Mao's avatar
      perf kvm: Add kvm-stat for loongarch64 · 492ac37f
      Bibo Mao authored
      Add support for 'perf kvm stat' on loongarch64 platform, now only kvm
      exit event is supported.
      
      Here is example output about "perf kvm --host stat report" command
      
         Event name   Samples   Sample%     Time (ns)   Time%   Mean Time (ns)
          Mem Store     83969    51.00%     625697070   8.00%             7451
           Mem Read     37641    22.00%     112485730   1.00%             2988
          Interrupt     15542     9.00%      20620190   0.00%             1326
              IOCSR     15207     9.00%      94296190   1.00%             6200
          Hypercall      4873     2.00%      12265280   0.00%             2516
               Idle      3713     2.00%    6322055860  87.00%          1702681
                FPU      1819     1.00%       2750300   0.00%             1511
         Inst Fetch       502     0.00%       1341740   0.00%             2672
         Mem Modify       324     0.00%        602240   0.00%             1858
             CPUCFG        55     0.00%         77610   0.00%             1411
                CSR        12     0.00%         19690   0.00%             1640
               LASX         3     0.00%          4870   0.00%             1623
                LSX         2     0.00%          2100   0.00%             1050
      Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      492ac37f
  5. 09 Jul, 2024 7 commits