1. 28 Jul, 2021 3 commits
  2. 27 Jul, 2021 16 commits
    • Chris Mi's avatar
      net/mlx5: Fix mlx5_vport_tbl_attr chain from u16 to u32 · 740452e0
      Chris Mi authored
      The offending refactor commit uses u16 chain wrongly. Actually, it
      should be u32.
      
      Fixes: c620b772 ("net/mlx5: Refactor tc flow attributes structure")
      CC: Ariel Levkovich <lariel@nvidia.com>
      Signed-off-by: default avatarChris Mi <cmi@nvidia.com>
      Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      740452e0
    • Dima Chumak's avatar
      net/mlx5e: Fix nullptr in mlx5e_hairpin_get_mdev() · b1c2f631
      Dima Chumak authored
      The result of __dev_get_by_index() is not checked for NULL and then gets
      dereferenced immediately.
      
      Also, __dev_get_by_index() must be called while holding either RTNL lock
      or @dev_base_lock, which isn't satisfied by mlx5e_hairpin_get_mdev() or
      its callers. This makes the underlying hlist_for_each_entry() loop not
      safe, and can have adverse effects in itself.
      
      Fix by using dev_get_by_index() and handling nullptr return value when
      ifindex device is not found. Update mlx5e_hairpin_get_mdev() callers to
      check for possible PTR_ERR() result.
      
      Fixes: 77ab67b7 ("net/mlx5e: Basic setup of hairpin object")
      Addresses-Coverity: ("Dereference null return value")
      Signed-off-by: default avatarDima Chumak <dchumak@nvidia.com>
      Reviewed-by: default avatarVlad Buslov <vladbu@nvidia.com>
      Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      b1c2f631
    • Aya Levin's avatar
      net/mlx5: Unload device upon firmware fatal error · 7f331bf0
      Aya Levin authored
      When fw_fatal reporter reports an error, the firmware in not responding.
      Unload the device to ensure that the driver closes all its resources,
      even if recovery is not due (user disabled auto-recovery or reporter is
      in grace period). On successful recovery the device is loaded back up.
      
      Fixes: b3bd076f ("net/mlx5: Report devlink health on FW fatal issues")
      Signed-off-by: default avatarAya Levin <ayal@nvidia.com>
      Reviewed-by: default avatarMoshe Shemesh <moshe@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      7f331bf0
    • Aya Levin's avatar
      net/mlx5e: Fix page allocation failure for ptp-RQ over SF · 678b1ae1
      Aya Levin authored
      Set the correct pci-device pointer to the ptp-RQ. This allows access to
      dma_mask and avoids allocation request with wrong pci-device.
      
      Fixes: a099da8f ("net/mlx5e: Add RQ to PTP channel")
      Signed-off-by: default avatarAya Levin <ayal@nvidia.com>
      Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      678b1ae1
    • Aya Levin's avatar
      net/mlx5e: Fix page allocation failure for trap-RQ over SF · 497008e7
      Aya Levin authored
      Set the correct device pointer to the trap-RQ, to allow access to
      dma_mask and avoid allocation request with the wrong pci-dev.
      
      WARNING: CPU: 1 PID: 12005 at kernel/dma/mapping.c:151 dma_map_page_attrs+0x139/0x1c0
      ...
      all Trace:
      <IRQ>
      ? __page_pool_alloc_pages_slow+0x5a/0x210
      mlx5e_post_rx_wqes+0x258/0x400 [mlx5_core]
      mlx5e_trap_napi_poll+0x44/0xc0 [mlx5_core]
      __napi_poll+0x24/0x150
      net_rx_action+0x22b/0x280
      __do_softirq+0xc7/0x27e
      do_softirq+0x61/0x80
      </IRQ>
      __local_bh_enable_ip+0x4b/0x50
      mlx5e_handle_action_trap+0x2dd/0x4d0 [mlx5_core]
      blocking_notifier_call_chain+0x5a/0x80
      mlx5_devlink_trap_action_set+0x8b/0x100 [mlx5_core]
      
      Fixes: 5543e989 ("net/mlx5e: Add trap entity to ETH driver")
      Signed-off-by: default avatarAya Levin <ayal@nvidia.com>
      Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      497008e7
    • Aya Levin's avatar
      net/mlx5e: Consider PTP-RQ when setting RX VLAN stripping · a759f845
      Aya Levin authored
      Add PTP-RQ to the loop when setting rx-vlan-offload feature via ethtool.
      On PTP-RQ's creation, set rx-vlan-offload into its parameters.
      
      Fixes: a099da8f ("net/mlx5e: Add RQ to PTP channel")
      Signed-off-by: default avatarAya Levin <ayal@nvidia.com>
      Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      a759f845
    • Maxim Mikityanskiy's avatar
      net/mlx5e: Add NETIF_F_HW_TC to hw_features when HTB offload is available · 9841d58f
      Maxim Mikityanskiy authored
      If a feature flag is only present in features, but not in hw_features,
      the user can't reset it. Although hw_features may contain NETIF_F_HW_TC
      by the point where the driver checks whether HTB offload is supported,
      this flag is controlled by another condition that may not hold. Set it
      explicitly to make sure the user can disable it.
      
      Fixes: 214baf22 ("net/mlx5e: Support HTB offload")
      Signed-off-by: default avatarMaxim Mikityanskiy <maximmi@nvidia.com>
      Reviewed-by: default avatarTariq Toukan <tariqt@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      9841d58f
    • Tariq Toukan's avatar
      net/mlx5e: RX, Avoid possible data corruption when relaxed ordering and LRO combined · e2351e51
      Tariq Toukan authored
      When HW aggregates packets for an LRO session, it writes the payload
      of two consecutive packets of a flow contiguously, so that they usually
      share a cacheline.
      
      The first byte of a packet's payload is written immediately after
      the last byte of the preceding packet.
      In this flow, there are two consecutive write requests to the shared
      cacheline:
      1. Regular write for the earlier packet.
      2. Read-modify-write for the following packet.
      
      In case of relaxed-ordering on, these two writes might be re-ordered.
      Using the end padding optimization (to avoid partial write for the last
      cacheline of a packet) becomes problematic if the two writes occur
      out-of-order, as the padding would overwrite payload that belongs to
      the following packet, causing data corruption.
      
      Avoid this by disabling the end padding optimization when both
      LRO and relaxed-ordering are enabled.
      
      Fixes: 17347d54 ("net/mlx5e: Add support for PCI relaxed ordering")
      Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
      Reviewed-by: default avatarMoshe Shemesh <moshe@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      e2351e51
    • Roi Dayan's avatar
      net/mlx5: E-Switch, handle devcom events only for ports on the same device · dd3fddb8
      Roi Dayan authored
      This is the same check as LAG mode checks if to enable lag.
      This will fix adding peer miss rules if lag is not supported
      and even an incorrect rules in socket direct mode.
      
      Also fix the incorrect comment on mlx5_get_next_phys_dev() as flow #1
      doesn't exists.
      
      Fixes: ac004b83 ("net/mlx5e: E-Switch, Add peer miss rules")
      Signed-off-by: default avatarRoi Dayan <roid@nvidia.com>
      Reviewed-by: default avatarMaor Dickman <maord@nvidia.com>
      Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      dd3fddb8
    • Maor Dickman's avatar
      net/mlx5: E-Switch, Set destination vport vhca id only when merged eswitch is supported · c6719725
      Maor Dickman authored
      Destination vport vhca id is valid flag is set only merged eswitch isn't supported.
      Change destination vport vhca id value to be set also only when merged eswitch
      is supported.
      
      Fixes: e4ad91f2 ("net/mlx5e: Split offloaded eswitch TC rules for port mirroring")
      Signed-off-by: default avatarMaor Dickman <maord@nvidia.com>
      Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      c6719725
    • Maor Dickman's avatar
      net/mlx5e: Disable Rx ntuple offload for uplink representor · 90b22b9b
      Maor Dickman authored
      Rx ntuple offload is not supported in switchdev mode.
      Tryng to enable it cause kernel panic.
      
       BUG: kernel NULL pointer dereference, address: 0000000000000008
       #PF: supervisor read access in kernel mode
       #PF: error_code(0x0000) - not-present page
       PGD 80000001065a5067 P4D 80000001065a5067 PUD 106594067 PMD 0
       Oops: 0000 [#1] SMP PTI
       CPU: 7 PID: 1089 Comm: ethtool Not tainted 5.13.0-rc7_for_upstream_min_debug_2021_06_23_16_44 #1
       Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS rel-1.13.0-0-gf21b5a4aeb02-prebuilt.qemu.org 04/01/2014
       RIP: 0010:mlx5e_arfs_enable+0x70/0xd0 [mlx5_core]
       Code: 44 24 10 00 00 00 00 48 c7 44 24 18 00 00 00 00 49 63 c4 48 89 e2 44 89 e6 48 69 c0 20 08 00 00 48 89 ef 48 03 85 68 ac 00 00 <48> 8b 40 08 48 89 44 24 08 e8 d2 aa fd ff 48 83 05 82 96 18 00 01
       RSP: 0018:ffff8881047679e0 EFLAGS: 00010246
       RAX: 0000000000000000 RBX: 0000004000000000 RCX: 0000004000000000
       RDX: ffff8881047679e0 RSI: 0000000000000000 RDI: ffff888115100880
       RBP: ffff888115100880 R08: ffffffffa00f6cb0 R09: ffff888104767a18
       R10: ffff8881151000a0 R11: ffff888109479540 R12: 0000000000000000
       R13: ffff888104767bb8 R14: ffff888115100000 R15: ffff8881151000a0
       FS:  00007f41a64ab740(0000) GS:ffff8882f5dc0000(0000) knlGS:0000000000000000
       CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
       CR2: 0000000000000008 CR3: 0000000104cbc005 CR4: 0000000000370ea0
       DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
       DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
       Call Trace:
        set_feature_arfs+0x1e/0x40 [mlx5_core]
        mlx5e_handle_feature+0x43/0xa0 [mlx5_core]
        mlx5e_set_features+0x139/0x1b0 [mlx5_core]
        __netdev_update_features+0x2b3/0xaf0
        ethnl_set_features+0x176/0x3a0
        ? __nla_parse+0x22/0x30
        genl_family_rcv_msg_doit+0xe2/0x140
        genl_rcv_msg+0xde/0x1d0
        ? features_reply_size+0xe0/0xe0
        ? genl_get_cmd+0xd0/0xd0
        netlink_rcv_skb+0x4e/0xf0
        genl_rcv+0x24/0x40
        netlink_unicast+0x1f6/0x2b0
        netlink_sendmsg+0x225/0x450
        sock_sendmsg+0x33/0x40
        __sys_sendto+0xd4/0x120
        ? __sys_recvmsg+0x4e/0x90
        ? exc_page_fault+0x219/0x740
        __x64_sys_sendto+0x25/0x30
        do_syscall_64+0x3f/0x80
        entry_SYSCALL_64_after_hwframe+0x44/0xae
       RIP: 0033:0x7f41a65b0cba
       Code: d8 64 89 02 48 c7 c0 ff ff ff ff eb b8 0f 1f 00 f3 0f 1e fa 41 89 ca 64 8b 04 25 18 00 00 00 85 c0 75 15 b8 2c 00 00 00 0f 05 <48> 3d 00 f0 ff ff 77 76 c3 0f 1f 44 00 00 55 48 83 ec 30 44 89 4c
       RSP: 002b:00007ffd8d688358 EFLAGS: 00000246 ORIG_RAX: 000000000000002c
       RAX: ffffffffffffffda RBX: 00000000010f42a0 RCX: 00007f41a65b0cba
       RDX: 0000000000000058 RSI: 00000000010f43b0 RDI: 0000000000000003
       RBP: 000000000047ae60 R08: 00007f41a667c000 R09: 000000000000000c
       R10: 0000000000000000 R11: 0000000000000246 R12: 00000000010f4340
       R13: 00000000010f4350 R14: 00007ffd8d688400 R15: 00000000010f42a0
       Modules linked in: mlx5_vdpa vhost_iotlb vdpa xt_conntrack xt_MASQUERADE nf_conntrack_netlink nfnetlink xt_addrtype iptable_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 br_netfilter rpcrdma rdma_ucm ib_iser libiscsi scsi_transport_iscsi ib_umad ib_ipoib rdma_cm iw_cm ib_cm mlx5_ib ib_uverbs ib_core overlay mlx5_core ptp pps_core fuse
       CR2: 0000000000000008
       ---[ end trace c66523f2aba94b43 ]---
      
      Fixes: 7a9fb35e ("net/mlx5e: Do not reload ethernet ports when changing eswitch mode")
      Signed-off-by: default avatarMaor Dickman <maord@nvidia.com>
      Reviewed-by: default avatarRoi Dayan <roid@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      90b22b9b
    • Maor Gottlieb's avatar
      net/mlx5: Fix flow table chaining · 8b54874e
      Maor Gottlieb authored
      Fix a bug when flow table is created in priority that already
      has other flow tables as shown in the below diagram.
      If the new flow table (FT-B) has the lowest level in the priority,
      we need to connect the flow tables from the previous priority (p0)
      to this new table. In addition when this flow table is destroyed
      (FT-B), we need to connect the flow tables from the previous
      priority (p0) to the next level flow table (FT-C) in the same
      priority of the destroyed table (if exists).
      
                             ---------
                             |root_ns|
                             ---------
                                  |
                  --------------------------------
                  |               |              |
             ----------      ----------      ---------
             |p(prio)-x|     |   p-y  |      |   p-n |
             ----------      ----------      ---------
                  |               |
           ----------------  ------------------
           |ns(e.g bypass)|  |ns(e.g. kernel) |
           ----------------  ------------------
                  |            |           |
      	-------	       ------       ----
              |  p0 |        | p1 |       |p2|
              -------        ------       ----
                 |             |    \
              --------       ------- ------
              | FT-A |       |FT-B | |FT-C|
              --------       ------- ------
      
      Fixes: f90edfd2 ("net/mlx5_core: Connect flow tables")
      Signed-off-by: default avatarMaor Gottlieb <maorg@nvidia.com>
      Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
      Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
      8b54874e
    • Yufeng Mo's avatar
      net: hns3: change the method of obtaining default ptp cycle · 8373cd38
      Yufeng Mo authored
      The ptp cycle is related to the hardware, so it may cause compatibility
      issues if a fixed value is used in driver. Therefore, the method of
      obtaining this value is changed to read from the register rather than
      use a fixed value in driver.
      
      Fixes: 0bf5eb78 ("net: hns3: add support for PTP")
      Signed-off-by: default avatarYufeng Mo <moyufeng@huawei.com>
      Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8373cd38
    • Tang Bin's avatar
      nfc: s3fwrn5: fix undefined parameter values in dev_err() · 801e541c
      Tang Bin authored
      In the function s3fwrn5_fw_download(), the 'ret' is not assigned,
      so the correct value should be given in dev_err function.
      
      Fixes: a0302ff5 ("nfc: s3fwrn5: remove unnecessary label")
      Signed-off-by: default avatarZhang Shengju <zhangshengju@cmss.chinamobile.com>
      Signed-off-by: default avatarTang Bin <tangbin@cmss.chinamobile.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      801e541c
    • Pavel Skripkin's avatar
      net: llc: fix skb_over_panic · c7c9d210
      Pavel Skripkin authored
      Syzbot reported skb_over_panic() in llc_pdu_init_as_xid_cmd(). The
      problem was in wrong LCC header manipulations.
      
      Syzbot's reproducer tries to send XID packet. llc_ui_sendmsg() is
      doing following steps:
      
      	1. skb allocation with size = len + header size
      		len is passed from userpace and header size
      		is 3 since addr->sllc_xid is set.
      
      	2. skb_reserve() for header_len = 3
      	3. filling all other space with memcpy_from_msg()
      
      Ok, at this moment we have fully loaded skb, only headers needs to be
      filled.
      
      Then code comes to llc_sap_action_send_xid_c(). This function pushes 3
      bytes for LLC PDU header and initializes it. Then comes
      llc_pdu_init_as_xid_cmd(). It initalizes next 3 bytes *AFTER* LLC PDU
      header and call skb_push(skb, 3). This looks wrong for 2 reasons:
      
      	1. Bytes rigth after LLC header are user data, so this function
      	   was overwriting payload.
      
      	2. skb_push(skb, 3) call can cause skb_over_panic() since
      	   all free space was filled in llc_ui_sendmsg(). (This can
      	   happen is user passed 686 len: 686 + 14 (eth header) + 3 (LLC
      	   header) = 703. SKB_DATA_ALIGN(703) = 704)
      
      So, in this patch I added 2 new private constansts: LLC_PDU_TYPE_U_XID
      and LLC_PDU_LEN_U_XID. LLC_PDU_LEN_U_XID is used to correctly reserve
      header size to handle LLC + XID case. LLC_PDU_TYPE_U_XID is used by
      llc_pdu_header_init() function to push 6 bytes instead of 3. And finally
      I removed skb_push() call from llc_pdu_init_as_xid_cmd().
      
      This changes should not affect other parts of LLC, since after
      all steps we just transmit buffer.
      
      Fixes: 1da177e4 ("Linux-2.6.12-rc2")
      Reported-and-tested-by: syzbot+5e5a981ad7cc54c4b2b4@syzkaller.appspotmail.com
      Signed-off-by: default avatarPavel Skripkin <paskripkin@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c7c9d210
    • Sunil Goutham's avatar
      octeontx2-af: Do NIX_RX_SW_SYNC twice · fcef709c
      Sunil Goutham authored
      NIX_RX_SW_SYNC ensures all existing transactions are finished and
      pkts are written to LLC/DRAM, queues should be teared down after
      successful SW_SYNC. Due to a HW errata, in some rare scenarios
      an existing transaction might end after SW_SYNC operation. To
      ensure operation is fully done, do the SW_SYNC twice.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fcef709c
  3. 26 Jul, 2021 4 commits
  4. 25 Jul, 2021 10 commits
  5. 24 Jul, 2021 7 commits