1. 18 Oct, 2019 11 commits
  2. 15 Oct, 2019 21 commits
  3. 09 Oct, 2019 2 commits
  4. 08 Oct, 2019 3 commits
    • Mark Brown's avatar
    • Frieder Schrempf's avatar
      spi: spi-fsl-qspi: Clear TDH bits in FLSHCR register · f6910679
      Frieder Schrempf authored
      Later versions of the QSPI controller (e.g. in i.MX6UL/ULL and i.MX7)
      seem to have an additional TDH setting in the FLSHCR register, that
      needs to be set in accordance with the access mode that is used (DDR
      or SDR).
      
      Previous bootstages such as BootROM or bootloader might have used the
      DDR mode to access the flash. As we currently only use SDR mode, we
      need to make sure the TDH bits are cleared upon initialization.
      
      Fixes: 84d04318 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: default avatarFrieder Schrempf <frieder.schrempf@kontron.de>
      Acked-by: default avatarHan Xu <han.xu@nxp.com>
      Link: https://lore.kernel.org/r/20191007071933.26786-1-frieder.schrempf@kontron.deSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      f6910679
    • Vladimir Oltean's avatar
      spi: spi-fsl-dspi: Always use the TCFQ devices in poll mode · 5d2af8bc
      Vladimir Oltean authored
      With this patch, the "interrupts" property from the device tree bindings
      is ignored, even if present, if the driver runs in TCFQ mode.
      
      Switching to using the DSPI in poll mode has several distinct
      benefits:
      
      - With interrupts, the DSPI driver in TCFQ mode raises an IRQ after each
        transmitted word. There is more time wasted for the "waitq" event than
        for actual I/O. And the DSPI IRQ count can easily get the largest in
        /proc/interrupts on Freescale boards with attached SPI devices.
      
      - The SPI I/O time is both lower, and more consistently so. Attached to
        some Freescale devices are either PTP switches, or SPI RTCs. For
        reading time off of a SPI slave device, it is important that all SPI
        transfers take a deterministic time to complete.
      
      - In poll mode there is much less time spent by the CPU in hardirq
        context, which helps with the response latency of the system, and at
        the same time there is more control over when interrupts must be
        disabled (to get a precise timestamp measurement): win-win.
      
      On the LS1021A-TSN board, where the SPI device is a SJA1105 PTP switch
      (with a bits_per_word=8 driver), I created a "benchmark" where I read
      its PTP time once per second, for 120 seconds. Each "read PTP time" is a
      12-byte SPI transfer. I then recorded the time before putting the first
      byte in the TX FIFO, and the time after reading the last byte from the
      RX FIFO. That is the transfer delay in nanoseconds.
      
      Interrupt mode:
      
        delay: min 125120 max 168320 mean 150286 std dev 17675.3
      
      Poll mode:
      
        delay: min 69440 max 119040 mean 70312.9 std dev 8065.34
      
      Both the mean latency and the standard deviation are more than 50% lower
      in poll mode than in interrupt mode. This is with an 'ondemand' governor
      on an otherwise idle system - therefore running mostly at 600 MHz out of
      a max of 1200 MHz.
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Link: https://lore.kernel.org/r/20190905010114.26718-5-olteanv@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      5d2af8bc
  5. 07 Oct, 2019 3 commits
    • Vladimir Oltean's avatar
      spi: spi-fsl-dspi: Implement the PTP system timestamping for TCFQ mode · d6b71dfa
      Vladimir Oltean authored
      In this mode, the DSPI controller uses PIO to transfer word by word. In
      comparison, in EOQ mode the 4-word deep FIFO is being used, hence the
      current logic will need some adaptation for which I do not have the
      hardware (Coldfire) to test. It is not clear what is the timing of DMA
      transfers and whether timestamping in the driver brings any overall
      performance increase compared to regular timestamping done in the core.
      
      Short phc2sys summary after 58 minutes of running on LS1021A-TSN with
      interrupts disabled during the critical section:
      
        offset: min -26251 max 16416 mean -21.8672 std dev 863.416
        delay: min 4720 max 57280 mean 5182.49 std dev 1607.19
        lost servo lock 3 times
      
      Summary of the same phc2sys service running for 120 minutes with
      interrupts disabled:
      
        offset: min -378 max 381 mean -0.0083089 std dev 101.495
        delay: min 4720 max 5920 mean 5129.38 std dev 154.899
        lost servo lock 0 times
      
      The minimum delay (pre to post time) in nanoseconds is the same, but the
      maximum delay is quite a bit higher, due to interrupts getting sometimes
      executed and interfering with the measurement. Hence set disable_irqs
      whenever possible (aka when the driver runs in poll mode - otherwise it
      would be a contradiction in terms).
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Link: https://lore.kernel.org/r/20190905010114.26718-4-olteanv@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      d6b71dfa
    • Vladimir Oltean's avatar
      spi: Add a PTP system timestamp to the transfer structure · b42faeee
      Vladimir Oltean authored
      SPI is one of the interfaces used to access devices which have a POSIX
      clock driver (real time clocks, 1588 timers etc). The fact that the SPI
      bus is slow is not what the main problem is, but rather the fact that
      drivers don't take a constant amount of time in transferring data over
      SPI. When there is a high delay in the readout of time, there will be
      uncertainty in the value that has been read out of the peripheral.
      When that delay is constant, the uncertainty can at least be
      approximated with a certain accuracy which is fine more often than not.
      
      Timing jitter occurs all over in the kernel code, and is mainly caused
      by having to let go of the CPU for various reasons such as preemption,
      servicing interrupts, going to sleep, etc. Another major reason is CPU
      dynamic frequency scaling.
      
      It turns out that the problem of retrieving time from a SPI peripheral
      with high accuracy can be solved by the use of "PTP system
      timestamping" - a mechanism to correlate the time when the device has
      snapshotted its internal time counter with the Linux system time at that
      same moment. This is sufficient for having a precise time measurement -
      it is not necessary for the whole SPI transfer to be transmitted "as
      fast as possible", or "as low-jitter as possible". The system has to be
      low-jitter for a very short amount of time to be effective.
      
      This patch introduces a PTP system timestamping mechanism in struct
      spi_transfer. This is to be used by SPI device drivers when they need to
      know the exact time at which the underlying device's time was
      snapshotted. More often than not, SPI peripherals have a very exact
      timing for when their SPI-to-interconnect bridge issues a transaction
      for snapshotting and reading the time register, and that will be
      dependent on when the SPI-to-interconnect bridge figures out that this
      is what it should do, aka as soon as it sees byte N of the SPI transfer.
      Since spi_device drivers are the ones who'd know best how the peripheral
      behaves in this regard, expose a mechanism in spi_transfer which allows
      them to specify which word (or word range) from the transfer should be
      timestamped.
      
      Add a default implementation of the PTP system timestamping in the SPI
      core. This is not going to be satisfactory performance-wise, but should
      at least increase the likelihood that SPI device drivers will use PTP
      system timestamping in the future.
      There are 3 entry points from the core towards the SPI controller
      drivers:
      
      - transfer_one: The driver is passed individual spi_transfers to
        execute. This is the easiest to timestamp.
      
      - transfer_one_message: The core passes the driver an entire spi_message
        (a potential batch of spi_transfers). The core puts the same pre and
        post timestamp to all transfers within a message. This is not ideal,
        but nothing better can be done by default anyway, since the core has
        no insight into how the driver batches the transfers.
      
      - transfer: Like transfer_one_message, but for unqueued drivers (i.e.
        the driver implements its own queue scheduling).
      Signed-off-by: default avatarVladimir Oltean <olteanv@gmail.com>
      Link: https://lore.kernel.org/r/20190905010114.26718-3-olteanv@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      b42faeee
    • Stephen Boyd's avatar
      spi: gpio: Look for a device node instead of match · 62217f8b
      Stephen Boyd authored
      This driver doesn't do anything with the match for the device node. The
      logic is the same as looking to see if a device node exists or not
      because this driver wouldn't probe unless there is a device node match
      when the device is created from DT. Just test for the presence of the
      device node to simplify and avoid referencing a potentially undefined
      match table when CONFIG_OF=n.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Mark Brown <broonie@kernel.org>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Frank Rowand <frowand.list@gmail.com>
      Cc: <linux-spi@vger.kernel.org>
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Link: https://lore.kernel.org/r/20191004214334.149976-9-swboyd@chromium.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      62217f8b