1. 16 Jul, 2018 3 commits
    • Aapo Vienamo's avatar
      mmc: tegra: Use sdhci_pltfm_clk_get_max_clock · 75067aba
      Aapo Vienamo authored
      The sdhci get_max_clock callback is set to sdhci_pltfm_clk_get_max_clock
      and tegra_sdhci_get_max_clock is removed. It appears that the
      shdci-tegra specific callback was originally introduced due to the
      requirement that the host clock has to be twice the bus clock on DDR50
      mode. As far as I can tell the only effect the removal has on DDR50 mode
      is in cases where the parent clock is unable to supply the requested
      clock rate, causing the DDR50 mode to run at a lower frequency.
      Currently the DDR50 mode isn't enabled on any of the SoCs and would also
      require configuring the SDHCI clock divider register to function
      properly.
      
      The problem with tegra_sdhci_get_max_clock is that it divides the clock
      rate by two and thus artificially limits the maximum frequency of faster
      signaling modes which don't have the host-bus frequency ratio requirement
      of DDR50 such as SDR104 and HS200. Furthermore, the call to
      clk_round_rate() may return an error which isn't handled by
      tegra_sdhci_get_max_clock.
      Signed-off-by: default avatarAapo Vienamo <avienamo@nvidia.com>
      Acked-by: default avatarThierry Reding <treding@nvidia.com>
      Tested-by: default avatarThierry Reding <treding@nvidia.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      75067aba
    • Shawn Lin's avatar
      mmc: core: Adjust and reuse the macro of R1_STATUS(x) · a94a7483
      Shawn Lin authored
      R1_STATUS(x) now is only used by ioctl_rpmb_card_status_poll(),
      which checks all bits as possible. But according to the spec,
      bit 17 and bit 18 should be ignored, as well bit 14 which is
      reserved(must be set to 0) quoting from the spec and these rule
      apply to all places checking the device status. So change
      its checking from 0xFFFFE000 to 0xFFF9A000.
      
      As a bonus, we reuse it for mmc_do_erase() as well as
      mmc_switch_status_error().
      (1) Currently mmc_switch_status_error() doesn't check bit 25, but
      it means device is locked but not unlocked by CMD42 prior to any
      operations which need check busy, which is also not allowed.
      (2) mmc_do_erase() also forgot to to check bit 15, WP_ERASE_SKIP.
      The spec says "Only partial address space was erased due to existing
      write protected blocks.", which obviously means we should fail this I/O.
      Otherwise, the partial erased data stored in nonvalatile flash violates
      the data integrity from the view of I/O owner, which probably confuse
      it when further used.
      
      So reusing R1_STATUS for them not only improve the readability but also
      slove real problems.
      Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      a94a7483
    • Ulf Hansson's avatar
      Merge branch 'next_pxa_dma' into next · 2fb166e5
      Ulf Hansson authored
      2fb166e5
  2. 15 Jul, 2018 2 commits
  3. 14 Jul, 2018 19 commits
  4. 13 Jul, 2018 15 commits
  5. 12 Jul, 2018 1 commit
    • Joel Fernandes (Google)'s avatar
      tracing: Reorder display of TGID to be after PID · f8494fa3
      Joel Fernandes (Google) authored
      Currently ftrace displays data in trace output like so:
      
                                             _-----=> irqs-off
                                            / _----=> need-resched
                                           | / _---=> hardirq/softirq
                                           || / _--=> preempt-depth
                                           ||| /     delay
                  TASK-PID   CPU    TGID   ||||    TIMESTAMP  FUNCTION
                     | |       |      |    ||||       |         |
                  bash-1091  [000] ( 1091) d..2    28.313544: sched_switch:
      
      However Android's trace visualization tools expect a slightly different
      format due to an out-of-tree patch patch that was been carried for a
      decade, notice that the TGID and CPU fields are reversed:
      
                                             _-----=> irqs-off
                                            / _----=> need-resched
                                           | / _---=> hardirq/softirq
                                           || / _--=> preempt-depth
                                           ||| /     delay
                  TASK-PID    TGID   CPU   ||||    TIMESTAMP  FUNCTION
                     | |        |      |   ||||       |         |
                  bash-1091  ( 1091) [002] d..2    64.965177: sched_switch:
      
      From kernel v4.13 onwards, during which TGID was introduced, tracing
      with systrace on all Android kernels will break (most Android kernels
      have been on 4.9 with Android patches, so this issues hasn't been seen
      yet). From v4.13 onwards things will break.
      
      The chrome browser's tracing tools also embed the systrace viewer which
      uses the legacy TGID format and updates to that are known to be
      difficult to make.
      
      Considering this, I suggest we make this change to the upstream kernel
      and backport it to all Android kernels. I believe this feature is merged
      recently enough into the upstream kernel that it shouldn't be a problem.
      Also logically, IMO it makes more sense to group the TGID with the
      TASK-PID and the CPU after these.
      
      Link: http://lkml.kernel.org/r/20180626000822.113931-1-joel@joelfernandes.org
      
      Cc: jreck@google.com
      Cc: tkjos@google.com
      Cc: stable@vger.kernel.org
      Fixes: 441dae8f ("tracing: Add support for display of tgid in trace output")
      Signed-off-by: default avatarJoel Fernandes (Google) <joel@joelfernandes.org>
      Signed-off-by: default avatarSteven Rostedt (VMware) <rostedt@goodmis.org>
      f8494fa3