1. 22 Oct, 2015 1 commit
    • Olof Johansson's avatar
      Merge tag 'firmware/psci-1.0' of... · 825294cd
      Olof Johansson authored
      Merge tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux into next/drivers
      
      This pull request contains patches that enable PSCI 1.0 firmware
      features for arm/arm64 platforms:
      
      - Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages
        various 1.0 specifications updates (power state id and functions return
        values) and provides PSCI v1.0 DT bindings
      - Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI
        based suspend-to-RAM
      
      * tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux:
        drivers: firmware: psci: add system suspend support
        drivers: firmware: psci: define more generic PSCI_FN_NATIVE macro
        drivers: firmware: psci: add PSCI v1.0 DT bindings
        drivers: firmware: psci: add extended stateid power_state support
        drivers: firmware: psci: add PSCI_FEATURES call
        drivers: firmware: psci: move power_state handling to generic code
        drivers: firmware: psci: add INVALID_ADDRESS return value
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      825294cd
  2. 15 Oct, 2015 7 commits
    • Arnd Bergmann's avatar
      soc: qcom/smem: add HWSPINLOCK dependency · 73ebb854
      Arnd Bergmann authored
      This fixes a build error when smem is enabled without hwspinlock:
      
      drivers/built-in.o: In function `qcom_smem_alloc':
      rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout'
      rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock'
      drivers/built-in.o: In function `qcom_smem_remove':
      rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free'
      drivers/built-in.o: In function `qcom_smem_probe':
      rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific'
      rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id'
      drivers/built-in.o: In function `qcom_smem_get':
      rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout'
      rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock'
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      73ebb854
    • Arnd Bergmann's avatar
      Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers · ead67421
      Arnd Bergmann authored
      Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
      
      * Implement id_table driver matching in SMD
      * Avoid NULL pointer exception on remove of SMEM
      * Reorder SMEM/SMD configs
      * Make qcom_smem_get() return a pointer
      * Handle big endian CPUs correctly in SMEM
      * Represent SMD channel layout in structures
      * Use __iowrite32_copy() in SMD
      * Remove use of VLAIs in SMD
      * Handle big endian CPUs correctly in SMD/RPM
      * Handle big endian CPUs corretly in SMD
      * Reject sending SMD packets that are too large
      * Fix endianness issue in SCM __qcom_scm_is_call_available
      * Add missing prototype for qcom_scm_is_available()
      * Correct SMEM items for upper channels
      * Use architecture level to build SCM correctly
      * Delete unneeded of_node_put in SMD
      * Correct active/slep state flagging in SMD/RPM
      * Move RPM message ram out of SMEM DT node
      
      * tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
        soc: qcom: smem: Move RPM message ram out of smem DT node
        soc: qcom: smd-rpm: Correct the active vs sleep state flagging
        soc: qcom: smd: delete unneeded of_node_put
        firmware: qcom-scm: build for correct architecture level
        soc: qcom: smd: Correct SMEM items for upper channels
        qcom-scm: add missing prototype for qcom_scm_is_available()
        qcom-scm: fix endianess issue in __qcom_scm_is_call_available
        soc: qcom: smd: Reject send of too big packets
        soc: qcom: smd: Handle big endian CPUs
        soc: qcom: smd_rpm: Handle big endian CPUs
        soc: qcom: smd: Remove use of VLAIS
        soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
        soc: qcom: smd: Represent channel layout in structures
        soc: qcom: smem: Handle big endian CPUs
        soc: qcom: Make qcom_smem_get() return a pointer
        soc: qcom: Reorder SMEM/SMD configs
        soc: qcom: smem: Avoid NULL pointer exception on remove
        soc: qcom: smd: Implement id_table driver matching
      ead67421
    • Arnd Bergmann's avatar
      Merge tag 'berlin-new-cpuclk-for-4.4-1' of... · 41e602e8
      Arnd Bergmann authored
      Merge tag 'berlin-new-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/drivers
      
      Merge "Marvell Berlin BG2Q CPU clock driver" from Sebastian Hesselbarth:
      
      - add BG2Q CPU clock to clk driver
      
      * tag 'berlin-new-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin:
        clk: berlin: add cpuclk
        ARM: berlin: dts: add CLKID_CPU for BG2Q
      41e602e8
    • Arnd Bergmann's avatar
      Merge tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc into next/drivers · 7a0205bc
      Arnd Bergmann authored
      Merge "PL172 driver updates for v4.4" from Joachim Eastwood:
      
      Support for additional ARM MPMCs to the PL172 driver and an update to
      the bindings documentation to reflect this from Vladimir Zapolskiy.
      
      "The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
       the static memory controllers on devices are similar to one found on
       ARM PrimeCell PL172, add support to the existing driver."
      
      * tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc:
        doc: dt: arm,pl172: add description of PL175 and PL176 controllers
        memory: pl172: add ARM PrimeCell PL176 MPMC support
        memory: pl172: add ARM PrimeCell PL175 MPMC support
        memory: pl172: correct MPMC peripheral ID register bits
      7a0205bc
    • Antoine Tenart's avatar
      clk: berlin: add cpuclk · 515f1a20
      Antoine Tenart authored
      Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
      fixed to 1.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
      Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
      Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      515f1a20
    • Sebastian Hesselbarth's avatar
      Merge tag 'berlin-dt-cpuclk-for-4.4-1' into berlin/cpuclk · 0f0ebb13
      Sebastian Hesselbarth authored
      Marvell Berlin DT CPU clock for 4.4
      - add missing CLKID_CPU for Berlin BG2Q
      0f0ebb13
    • Sebastian Hesselbarth's avatar
      ARM: berlin: dts: add CLKID_CPU for BG2Q · 28c039ee
      Sebastian Hesselbarth authored
      Marvell Berlin BG2Q SoC also has a clock for the CPU, add a
      corresponding CLKID to the dt-binding include.
      Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
      Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      28c039ee
  3. 14 Oct, 2015 19 commits
  4. 09 Oct, 2015 5 commits
  5. 08 Oct, 2015 2 commits
  6. 06 Oct, 2015 6 commits