1. 03 Mar, 2017 1 commit
  2. 02 Mar, 2017 13 commits
    • Chris Wilson's avatar
      drm/i915: Drop spinlocks around adding to the client request list · c8659efa
      Chris Wilson authored
      Adding to the tail of the client request list as the only other user is
      in the throttle ioctl that iterates forwards over the list. It only
      needs protection against deletion of a request as it reads it, it simply
      won't see a new request added to the end of the list, or it would be too
      early and rejected. We can further reduce the number of spinlocks
      required when throttling by removing stale requests from the client_list
      as we throttle.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302122525.19675-1-chris@chris-wilson.co.uk
      c8659efa
    • Ville Syrjälä's avatar
      drm/i915: Do .init_clock_gating() earlier to avoid it clobbering watermarks · 5be6e334
      Ville Syrjälä authored
      Currently ILK-BDW explicitly disable LP1+ watermarks from their
      .init_clock_gating() hooks. Unfortunately that hook gets called way too
      late since by that time we've already initialized all the watermark
      state tracking which then gets out of sync with the hardware state.
      
      We may eventually want to consider killing off the explicit LP1+
      disable from .init_clock_gating(). In the meantime however, we can
      avoid the problem by reordering the init sequence such that
      intel_modeset_init_hw()->intel_init_clock_gating() gets called
      prior to the hardware state takeover.
      
      I suppose prior to the two stage watermark programming we were
      magically saved by something that forced the watermarks to be
      reprogrammed fully after .init_clock_gating() got called. But
      now that no longer happens.
      
      Note that the diff might look a bit odd as it kills off one
      call of intel_update_cdclk(), but that's fine because
      intel_modeset_init_hw() does the exact same thing. Previously
      we just did it twice.
      
      Actually even this new init sequence is pretty bogus as
      .init_clock_gating() really should be called before any gem
      hardware init since it can  configure various clock gating
      workarounds and whatnot that affect the GT side as well. Also
      intel_modeset_init() really should get split up into better
      defined init stages. Another "fun" detail is that
      intel_modeset_gem_init() is where RPS/RC6 gets configured.
      Why that is done from the display code is beyond me. I've
      decided to leave all this be for now, and just try to fix
      the init sequence enough for watermarks to work.
      
      Cc: stable@vger.kernel.org
      Cc: Gabriele Mazzotta <gabriele.mzt@gmail.com>
      Cc: David Purton <dcpurton@marshwiggle.net>
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Reported-by: default avatarGabriele Mazzotta <gabriele.mzt@gmail.com>
      Reported-by: default avatarDavid Purton <dcpurton@marshwiggle.net>
      Tested-by: default avatarGabriele Mazzotta <gabriele.mzt@gmail.com>
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96645
      Fixes: ed4a6a7c ("drm/i915: Add two-stage ILK-style watermark programming (v11)")
      Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170220140443.30891-1-ville.syrjala@linux.intel.comReviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      5be6e334
    • Chris Wilson's avatar
      drm/i915: Include power-management state in gpu error dump · e5aac87e
      Chris Wilson authored
      Useful for double checking that the device is powered up when it hung,
      include both the status of the power management and our rpm wakelock.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302151544.16915-1-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      e5aac87e
    • Chris Wilson's avatar
      drm/i915: Include GT/seqno activity in engine/hangcheck debugfs · f73b5674
      Chris Wilson authored
      Whilst investigating some mysterious failures with hangcheck not running
      during gem_busy/basic-hang-default, the question is why did we decide to
      cancel the retire_work (which queues the hangcheck)? That decision is
      based around GT activity, so include that information in the debug
      report.
      
      v2: Include the GT awake status in the error state
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302150356.9713-1-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      f73b5674
    • Chris Wilson's avatar
      drm/i915/guc: Disable irq for __i915_guc_submit wq_lock · 25afdf89
      Chris Wilson authored
      __i915_guc_submit may be, despite my assertion, called from outside of
      an irq-safe spinlock so we need to use a full spin_lock_irqsave and not
      cheat using a spin_lock. (The initial notify callback from the completed
      fence is called before the spinlock is taken to wake up all waiters and
      call their callbacks.)
      
      [   48.166581] kernel BUG at drivers/gpu/drm/i915/i915_guc_submission.c:527!
      [   48.166617] invalid opcode: 0000 [#1] PREEMPT SMP
      [   48.166644] Modules linked in: i915 prime_numbers x86_pkg_temp_thermal intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel mei_me mei i2c_i801 netconsole i2c_hid [last unloaded: i915]
      [   48.166733] CPU: 2 PID: 5 Comm: kworker/u8:0 Tainted: G     U          4.10.0nightly-170302-guc_scrub+ #19
      [   48.166778] Hardware name:                  /NUC6i5SYB, BIOS SYSKLi35.86A.0054.2016.0930.1102 09/30/2016
      [   48.166835] Workqueue: i915 __intel_autoenable_gt_powersave [i915]
      [   48.166865] task: ffff88084ab7cf40 task.stack: ffffc90000064000
      [   48.166921] RIP: 0010:__i915_guc_submit+0x1e6/0x2a0 [i915]
      [   48.166953] RSP: 0018:ffffc90000067c80 EFLAGS: 00010202
      [   48.166979] RAX: 0000000000000202 RBX: ffff8808465e0c68 RCX: 0000000000000201
      [   48.167016] RDX: 0000000080000201 RSI: ffff88084ab7d798 RDI: ffff88082b8a8040
      [   48.167054] RBP: ffffc90000067cd8 R08: 0000000000000001 R09: 0000000000000000
      [   48.167085] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88082b8a8148
      [   48.167126] R13: 0000000000000000 R14: ffff88082f440000 R15: ffff88082e85e660
      [   48.167156] FS:  0000000000000000(0000) GS:ffff88086ed00000(0000) knlGS:0000000000000000
      [   48.167195] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [   48.167226] CR2: 000055862ffcdc2c CR3: 0000000001e0f000 CR4: 00000000003406e0
      [   48.167257] Call Trace:
      [   48.168112]  ? trace_hardirqs_on+0xd/0x10
      [   48.168966]  ? _raw_spin_unlock_irqrestore+0x4a/0x80
      [   48.169831]  i915_guc_submit+0x1a/0x20 [i915]
      [   48.170680]  submit_notify+0x89/0xc0 [i915]
      [   48.171512]  __i915_sw_fence_complete+0x175/0x220 [i915]
      [   48.172340]  i915_sw_fence_complete+0x2a/0x50 [i915]
      [   48.173158]  i915_sw_fence_commit+0x21/0x30 [i915]
      [   48.173968]  __i915_add_request+0x238/0x530 [i915]
      [   48.174764]  __intel_autoenable_gt_powersave+0x8b/0xb0 [i915]
      [   48.175549]  process_one_work+0x218/0x690
      [   48.176318]  ? process_one_work+0x197/0x690
      [   48.177183]  worker_thread+0x4e/0x4a0
      [   48.178039]  kthread+0x10c/0x140
      [   48.178878]  ? process_one_work+0x690/0x690
      [   48.179718]  ? kthread_create_on_node+0x40/0x40
      [   48.180568]  ret_from_fork+0x31/0x40
      [   48.181423] Code: 02 00 00 43 89 84 ae 50 11 00 00 e8 75 01 62 e1 48 83 c4 30 5b 41 5c 41 5d 41 5e 41 5f 5d c3 48 c1 e0 20 48 09 c2 49 89 d0 eb 82 <0f> 0b 0f 0b 0f 0b 0f 0b 0f 0b 0f 0b 49 c1 e8 20 44 89 43 34 4a
      [   48.183336] RIP: __i915_guc_submit+0x1e6/0x2a0 [i915] RSP: ffffc90000067c80
      Reported-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
      Fixes: 349ab919 ("drm/i915/guc: Make wq_lock irq-safe")
      Fixes: 67b807a8 ("drm/i915: Delay disabling the user interrupt for breadcrumbs")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302145323.12886-1-chris@chris-wilson.co.ukReviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
      Tested-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
      25afdf89
    • Chris Wilson's avatar
      drm/i915: s/assert_spin_locked/lockdep_assert_held/ · 67520415
      Chris Wilson authored
      assert_spin_locked() becomes an unconditionally compiled BUG_ON(),
      adding debug code right into the heart of critical routines like
      interrupt handlers.
      
         text	   data	    bss	    dec	    hex
      1296480	  19944	   2272	1318696	 141f28	before (lockdep disabled)
      1295984	  19944	   2272	1318200	 141d38	after
      
      1336261	  21139	   3208	1360608	 14c2e0	before (lockdep enabled)
      1339920	  21139	   3208	1364267	 14d12b	after
      
      Small saving for release; hopefully more instructive in debug.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302132801.599-1-chris@chris-wilson.co.ukReviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      67520415
    • Chris Wilson's avatar
      drm/i915: Assert that fence->lock is held in an irq-safe manner · e60a870d
      Chris Wilson authored
      Everytime we take the fence->lock (aka request->lock), we must do so
      with irqs disabled since it may be used from within an hardirq context.
      As sometimes we are taking the lock in a nested manner, assert that the
      caller did disable the irqs for us.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302115130.28434-1-chris@chris-wilson.co.ukReviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      e60a870d
    • Ville Syrjälä's avatar
      drm/i915: Fix legacy cursor vs. watermarks for ILK-BDW · a5509abd
      Ville Syrjälä authored
      In order to make cursor updates actually safe wrt. watermark programming
      we have to clear the legacy_cursor_update flag in the atomic state. That
      will cause the regular atomic update path to do the necessary vblank
      wait after the plane update if needed, otherwise the vblank wait would
      be skipped and we'd feed the optimal watermarks to the hardware before
      the plane update has actually happened.
      
      To make the slow vs. fast path determination in
      intel_legacy_cursor_update() a little simpler we can ignore the actual
      visibility of the plane (which can only get computed once we've already
      chosen out path) and instead we simply check whether the fb is being
      set or cleared by the user. This means a fully clipped but logically
      visible cursor will be considered visible as far as watermark
      programming is concerned. We can do that for the cursor since it's a
      fixed size plane and the clipped size doesn't play a role in the
      watermark computation.
      
      This should fix underruns that can occur when the cursor gets
      enable/disabled or the size gets changed. Hopefully it's good enough
      that only pure cursor movement and flips go through unthrottled.
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
      Reported-by: default avatarUwe Kleine-König <uwe@kleine-koenig.org>
      Fixes: f79f2692 ("drm/i915: Add a cursor hack to allow converting legacy page flip to atomic, v3.")
      Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170217150159.11683-1-ville.syrjala@linux.intel.comReviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Tested-by: default avatarRafael Ristovski <rafael.ristovski@gmail.com>
      a5509abd
    • Madhav Chauhan's avatar
      drm/i915/glk: Fix DSI enable I/O sequence · 9ce53745
      Madhav Chauhan authored
      One of the if statement covers the next line in enable I/O sequence.
      This patch correct the same by adding error message.
      
      Fixes: 46448483 ("drm/i915/glk: Add MIPIIO Enable/disable sequence")
      Reported-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarMadhav Chauhan <madhav.chauhan@intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1488393082-30660-1-git-send-email-madhav.chauhan@intel.com
      9ce53745
    • Anusha Srivatsa's avatar
      i915/HuC: Add an extra check for platforms that do not have HUC · 13e867f6
      Anusha Srivatsa authored
      Return silently without producing much noise on platforms
      that have a HuC but the firmware is absent.
      
      Cc: Ander Conselvan De Oliveira <ander.conselvan.de.oliveira@intel.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@itel.com>
      Signed-off-by: default avatarAnusha Srivatsa <anusha.srivatsa@intel.com>
      Reviewed-by: default avatarAnder Conselvan de Oliveira <conselvan2@gmail.com>
      Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1488398335-13121-1-git-send-email-anusha.srivatsa@intel.com
      13e867f6
    • Chris Wilson's avatar
      drm/i915: Restore the invalid access without RPM warning · 1f58c8e7
      Chris Wilson authored
      A long time ago we turned off the warning as it was too painful, we had
      too much broken code. Turn it back on now as we are mostly clean and
      need to prevent returning to such orangeness.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Imre Deak <imre.deak@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302074157.21631-2-chris@chris-wilson.co.ukReviewed-by: default avatarImre Deak <imre.deak@intel.com>
      1f58c8e7
    • Chris Wilson's avatar
      drm/i915: Hold rpm during GEM suspend in driver unload/suspend · c998e8a0
      Chris Wilson authored
      i915_gem_suspend() tries to access the device to ensure it is idle and
      all writes from the device are flushed to memory. It assumed is already
      held the runtime pm wakeref, but we should explicitly acquire it for our
      access to be safe.
      
      [  619.926287] WARNING: CPU: 3 PID: 9353 at drivers/gpu/drm/i915/intel_drv.h:1750 gen6_write32+0x23e/0x2a0 [i915]
      [  619.926300] RPM wakelock ref not held during HW access
      [  619.926311] Modules linked in: vgem x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_hdmi snd_hda_codec_generic snd_hda_codec coretemp snd_hwdep crct10dif_pclmul snd_hda_core crc32_pclmul snd_pcm mei_me mei lpc_ich ghash_clmulni_intel i915(-) sdhci_pci sdhci mmc_core e1000e ptp pps_core prime_numbers [last unloaded: snd_hda_intel]
      [  619.926578] CPU: 3 PID: 9353 Comm: drv_module_relo Tainted: G     U          4.10.0-CI-Trybot_609+ #1
      [  619.926585] Hardware name: LENOVO 42962WU/42962WU, BIOS 8DET56WW (1.26 ) 12/01/2011
      [  619.926592] Call Trace:
      [  619.926609]  dump_stack+0x67/0x92
      [  619.926625]  __warn+0xc6/0xe0
      [  619.926640]  warn_slowpath_fmt+0x4a/0x50
      [  619.926726]  gen6_write32+0x23e/0x2a0 [i915]
      [  619.926801]  gen6_mm_switch+0x38/0x70 [i915]
      [  619.926871]  i915_switch_context+0xec/0xa10 [i915]
      [  619.926942]  i915_gem_switch_to_kernel_context+0x13c/0x2b0 [i915]
      [  619.927019]  i915_gem_suspend+0x2b/0x180 [i915]
      [  619.927079]  i915_driver_unload+0x22/0x200 [i915]
      [  619.927093]  ? __this_cpu_preempt_check+0x13/0x20
      [  619.927105]  ? trace_hardirqs_on_caller+0xe7/0x200
      [  619.927118]  ? trace_hardirqs_on+0xd/0x10
      [  619.927128]  ? _raw_spin_unlock_irqrestore+0x3d/0x60
      [  619.927192]  i915_pci_remove+0x14/0x20 [i915]
      [  619.927205]  pci_device_remove+0x34/0xb0
      [  619.927219]  device_release_driver_internal+0x158/0x210
      [  619.927234]  driver_detach+0x3b/0x80
      [  619.927245]  bus_remove_driver+0x53/0xd0
      [  619.927256]  driver_unregister+0x27/0x50
      [  619.927267]  pci_unregister_driver+0x25/0xa0
      [  619.927351]  i915_exit+0x1a/0xb1a [i915]
      [  619.927362]  SyS_delete_module+0x193/0x1e0
      [  619.927378]  entry_SYSCALL_64_fastpath+0x1c/0xb1
      [  619.927386] RIP: 0033:0x7f82b46c5d37
      [  619.927393] RSP: 002b:00007ffdb6f610d8 EFLAGS: 00000246 ORIG_RAX: 00000000000000b0
      [  619.927408] RAX: ffffffffffffffda RBX: ffffffff81481ff3 RCX: 00007f82b46c5d37
      [  619.927415] RDX: 0000000000000001 RSI: 0000000000000800 RDI: 000000000224f558
      [  619.927422] RBP: ffffc90001187f88 R08: 0000000000000000 R09: 00007ffdb6f61100
      [  619.927428] R10: 000000000224f4e0 R11: 0000000000000246 R12: 0000000000000000
      [  619.927435] R13: 00007ffdb6f612b0 R14: 0000000000000000 R15: 0000000000000000
      [  619.927451]  ? __this_cpu_preempt_check+0x13/0x20
      
      or
      
      [  641.646590] WARNING: CPU: 1 PID: 8913 at drivers/gpu/drm/i915/intel_drv.h:1750 intel_runtime_pm_get_noresume+0x8b/0x90 [i915]
      [  641.646595] RPM wakelock ref not held during HW access
      [  641.646600] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_generic x86_pkg_temp_thermal intel_powerclamp coretemp snd_hda_codec snd_hwdep crct10dif_pclmul snd_hda_core crc32_pclmul ghash_clmulni_intel snd_pcm mei_me mei i915(-) r8169 mii prime_numbers i2c_hid [last unloaded: snd_hda_intel]
      [  641.646825] CPU: 1 PID: 8913 Comm: drv_module_relo Tainted: G     U          4.10.0-CI-Trybot_609+ #1
      [  641.646836] Hardware name: TOSHIBA SATELLITE P50-C/06F4                            , BIOS 1.20 10/08/2015
      [  641.646843] Call Trace:
      [  641.646857]  dump_stack+0x67/0x92
      [  641.646869]  __warn+0xc6/0xe0
      [  641.646880]  warn_slowpath_fmt+0x4a/0x50
      [  641.646893]  ? __this_cpu_preempt_check+0x13/0x20
      [  641.646904]  ? trace_hardirqs_on_caller+0xe7/0x200
      [  641.646957]  intel_runtime_pm_get_noresume+0x8b/0x90 [i915]
      [  641.647022]  __i915_add_request+0x423/0x540 [i915]
      [  641.647080]  i915_gem_switch_to_kernel_context+0x148/0x2b0 [i915]
      [  641.647145]  i915_gem_suspend+0x2b/0x180 [i915]
      [  641.647189]  i915_driver_unload+0x22/0x200 [i915]
      [  641.647200]  ? __this_cpu_preempt_check+0x13/0x20
      [  641.647210]  ? trace_hardirqs_on_caller+0xe7/0x200
      [  641.647220]  ? trace_hardirqs_on+0xd/0x10
      [  641.647231]  ? _raw_spin_unlock_irqrestore+0x3d/0x60
      [  641.647276]  i915_pci_remove+0x14/0x20 [i915]
      [  641.647293]  pci_device_remove+0x34/0xb0
      [  641.647307]  device_release_driver_internal+0x158/0x210
      [  641.647321]  driver_detach+0x3b/0x80
      [  641.647330]  bus_remove_driver+0x53/0xd0
      [  641.647338]  driver_unregister+0x27/0x50
      [  641.647348]  pci_unregister_driver+0x25/0xa0
      [  641.647415]  i915_exit+0x1a/0xb1a [i915]
      [  641.647429]  SyS_delete_module+0x193/0x1e0
      [  641.647444]  entry_SYSCALL_64_fastpath+0x1c/0xb1
      [  641.647453] RIP: 0033:0x7fc622bd2d37
      [  641.647463] RSP: 002b:00007ffff8ffb5c8 EFLAGS: 00000246 ORIG_RAX: 00000000000000b0
      [  641.647475] RAX: ffffffffffffffda RBX: ffffffff81481ff3 RCX: 00007fc622bd2d37
      [  641.647480] RDX: 0000000000000001 RSI: 0000000000000800 RDI: 0000000000d49118
      [  641.647485] RBP: ffffc90000997f88 R08: 0000000000000000 R09: 00007ffff8ffb5f0
      [  641.647491] R10: 0000000000d490a0 R11: 0000000000000246 R12: 0000000000000000
      [  641.647498] R13: 00007ffff8ffb7a0 R14: 0000000000000000 R15: 0000000000000000
      [  641.647510]  ? __this_cpu_preempt_check+0x13/0x20
      
      v2: Keep holding rpm until the end to cover i915_gem_sanitize() as well.
      
      Fixes: 5ab57c70 ("drm/i915: Flush logical context image out to memory upon suspend")
      Fixes: 1c777c5d ("drm/i915/hsw: Fix GPU hang during resume from S3-devices state")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170302083029.19576-1-chris@chris-wilson.co.ukReviewed-by: default avatarImre Deak <imre.deak@intel.com>
      Cc: <stable@vger.kernel.org> # v4.9+
      c998e8a0
    • Ander Conselvan de Oliveira's avatar
      drm/i915: Enable DDI IO power domains in the DP MST path · a746095c
      Ander Conselvan de Oliveira authored
      Commit 62b69566 ("drm/i915: Only enable DDI IO power domains after
      enabling DPLL") changed how the DDI IO power domains get enabled, but
      neglected the need to enable those domains when enabling a DP connector
      with MST enabled, leading to
      
          Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler
      
      Fixes: 62b69566 ("drm/i915: Only enable DDI IO power domains after enabling DPLL")
      Cc: Imre Deak <imre.deak@intel.com>
      Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Cc: David Weinehall <david.weinehall@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: intel-gfx@lists.freedesktop.org
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reported-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
      Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170301141318.3607-2-ander.conselvan.de.oliveira@intel.com
      a746095c
  3. 01 Mar, 2017 17 commits
  4. 28 Feb, 2017 9 commits