- 14 Jun, 2022 40 commits
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Nuno Sá authored
Do not trust the fact that iio.h includes of.h which in turn includes all the headers we are relying on. The ultimate goal is to actually drop of.h from iio.h. Signed-off-by:
Nuno Sá <nuno.sa@analog.com> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220610084545.547700-5-nuno.sa@analog.comSigned-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Nuno Sá authored
Do not trust the fact that iio.h includes of.h which in turn includes all the headers we are relying on. The ultimate goal is to actually drop of.h from iio.h. Signed-off-by:
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Nuno Sá authored
Do not trust the fact that iio.h includes of.h which in turn includes all the headers we are relying on. The ultimate goal is to actually drop of.h from iio.h. Signed-off-by:
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Nuno Sá authored
Do not trust the fact that iio.h includes of.h which in turn includes all the headers we are relying on. The ultimate goal is to actually drop of.h from iio.h. Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition Fixes: 1f25ca11 ("iio: temperature: add support for Maxim thermocouple chips") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition Fixes: e112dc4e ("iio: temperature: Add MAX31865 RTD Support") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: f110f318 ("iio: temperature: Add support for LTC2983") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is probably not where the issue was first introduced, but is likely to be far beyond the point where anyone considers backporting this fix. Fixes: 58f08b0a ("staging:iio:resolver:ad2s90 general cleanup") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is probably not where the issue was first introduced, but is likely to be as far as anyone considers backporting this fix. Fixes: 0bd3d338 ("staging: iio: ad2s1200: Improve readability with be16_to_cpup") Signed-off-by:
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Jonathan Cameron authored
I2C does not by default use buffers directly for DMA so there is no need to ensure they are DMA safe. Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 24ddb0e4 ("iio: Add AS3935 lightning sensor support") Signed-off-by:
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Jonathan Cameron authored
I2C doesn't use the buffers directly for DMA so there is no need to enforce alignment. Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 22d199a5 ("iio: potentiometer: add driver for Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 092cb71a ("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: df1fd2de ("iio: max5481: Add support for Maxim digital potentiometers") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 79e8a32d ("iio: ad5272: Add support for Analog Devices digital potentiometers") Signed-off-by:
Phil Reid <preid@electromag.com.au> Acked-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: d03a74bf ("iio: potentiometer: Add driver support for AD5110") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 6b0cc5dc ("iio:imu:inv_mpu6050 Fix dma and ts alignment and data leak issues.") Signed-off-by:
Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Acked-by:
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Jonathan Cameron authored
Second fix for this driver due to different introducing patches. ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7f85e42a ("iio: imu: inv_icm42600: add buffer support in iio devices") Signed-off-by:
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Jonathan Cameron authored
Partial fix for this driver as a second instance was introduced in a later patch. ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: a095fadb ("iio: imu: inv_icm42600: add gyroscope IIO device") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 84e5ddd5 ("iio: imu: Add support for the FXOS8700 IMU") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Updated the comment to 'may' require. Fixes: a0701b62 ("iio: gyro: add core driver for fxas21002c") Signed-off-by:
Rui Miguel Silva <rui.silva@linaro.org> Acked-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is inaccurate but unlikely anyone will be interested in backporting beyond that point. Fixes: 53ac8500 ("staging:iio:adxrs450: Move header file contents to main file") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 8e678751 ("staging:iio:gyro: adis16130 cleanup, move to abi and bug fixes.") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is inaccurate but unlikely anyone will backport this beyond that point so I haven't chased the history futher than 2013. Fixes: 3c80372d ("staging:iio:adis16080: be16 cleanups") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 63aaf6d0 ("iio: frequency: adrf6780: add support for ADRF6780") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: b59c0415 ("iio: frequency: admv4420.c: Add support for ADMV4420") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: f4eb9ac7 ("iio: frequency: admv1014: add support for ADMV1014") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: da35a7b5 ("iio: frequency: admv1013: add support for ADMV1013") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7f699bd1 ("iio: frequency: adf4371: Add support for ADF4371 PLL") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Updated help text to 'may' require buffers to be in their own cacheline. Fixes: e31166f0 ("iio: frequency: New driver for Analog Devices ADF4350/ADF4351 Wideband Synthesizers") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Updated help text to 'may' require buffers to be in their own cacheline. Fixes: cd1678f9 ("iio: frequency: New driver for AD9523 SPI Low Jitter Clock Generator") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Updated help text to 'may' require buffers to be in their own cacheline. Fixes: 977724d2 ("iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7a02ef79 ("iio:dac:ti-dac7311 Add driver for Texas Instrument DAC7311") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: df38a4a7 ("iio: dac: add TI DAC5571 family support") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 61011264 ("iio: dac: Add Texas Instruments 8/10/12-bit 2/4-channel DAC driver") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 1b791fad ("iio: dac: mcp4902/mcp4912/mcp4922 dac driver") Signed-off-by:
Michael Welling <mwelling@ieee.org> Link: https://lore.kernel.org/r/20220508175712.647246-61-jic23@kernel.org
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: 832cb9ee ("iio: dac: add support for ltc2688") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 7f270bc9 ("iio: dac: AD8801: add Analog Devices AD8801/AD8803 support") Signed-off-by:
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Jonathan Cameron authored
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: f8347824 ("iio:dac: Add support for the AD7303") Signed-off-by:
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