1. 08 Dec, 2020 9 commits
  2. 07 Dec, 2020 11 commits
  3. 05 Dec, 2020 10 commits
  4. 04 Dec, 2020 3 commits
  5. 03 Dec, 2020 5 commits
  6. 02 Dec, 2020 2 commits
    • Simon Ser's avatar
      drm: document that user-space should force-probe connectors · a7e2e1c5
      Simon Ser authored
      It seems like we can't have nice things, so let's just document the
      disappointing behaviour instead.
      
      The previous version assumed the kernel would perform the probing work
      when appropriate, however this is not the case today. Update the
      documentation to reflect reality.
      
      v2:
      
      - Improve commit message to explain why this change is made (Pekka)
      - Keep the bit about flickering (Daniel)
      - Explain when user-space should force-probe, and when it shouldn't (Daniel)
      Signed-off-by: default avatarSimon Ser <contact@emersion.fr>
      Fixes: 2ac5ef3b ("drm: document drm_mode_get_connector")
      Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Reviewed-by: default avatarPekka Paalanen <pekka.paalanen@collabora.com>
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/AxqLnTAsFCRishOVB5CLsqIesmrMrm7oytnOVB7oPA@cp7-web-043.plabs.ch
      a7e2e1c5
    • Gurchetan Singh's avatar
      drm/virtio: consider dma-fence context when signaling · 36549848
      Gurchetan Singh authored
      This an incremental refactor towards multiple dma-fence contexts
      in virtio-gpu.  Since all fences are still allocated using
      &virtio_gpu_fence_driver.context, nothing should break and every
      processed fence will be signaled.
      
      The overall idea is every 3D context can allocate a number of
      dma-fence contexts.  Each dma-fence context refers to it's own
      timeline.
      
      For example, consider the following case where virgl submits
      commands to the GPU (fence ids 1, 3) and does a metadata query with
      the CPU (fence id 5).  In a different process, gfxstream submits
      commands to the GPU (fence ids 2, 4).
      
      fence_id (&dma_fence.seqno)       | 1 2 3 4 5
      ----------------------------------|-----------
      fence_ctx 0 (virgl gpu)           | 1   3
      fence_ctx 1 (virgl metadata query)|         5
      fence_ctx 2 (gfxstream gpu)       |   2   4
      
      With multiple fence contexts, we can wait for the metadata query
      to finish without waiting for the virgl gpu to finish.  virgl gpu
      does not have to wait for gfxstream gpu.  The fence id still is the
      monotonically increasing sequence number, but it's only revelant to
      the specific dma-fence context.
      
      To fully enable this feature, we'll need to:
        - have each 3d context allocate a number of fence contexts. Not
          too hard with explicit context initialization on the horizon.
        - have guest userspace specify fence context when performing
          ioctls.
        - tag each fence emitted to the host with the fence context
          information.  virtio_gpu_ctrl_hdr has padding + flags available,
          so that should be easy.
      
      This change goes in the direction specified above, by:
        - looking up the virtgpu_fence given a fence_id
        - signalling all prior fences in a given context
        - signalling current fence
      
      v2: fix grammar in comment
      v3: add r-b tags
      Reviewed-by: default avatarAnthoine Bourgeois <anthoine.bourgeois@gmail.com>
      Signed-off-by: default avatarGurchetan Singh <gurchetansingh@chromium.org>
      Link: http://patchwork.freedesktop.org/patch/msgid/20201201021623.619-3-gurchetansingh@chromium.orgSigned-off-by: default avatarGerd Hoffmann <kraxel@redhat.com>
      36549848