- 19 Mar, 2010 4 commits
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Misael Lopez Cruz authored
Initial version of TWL6040 codec driver. The TWL6040 codec uses a proprietary PDM-based digital audio interface. Audio paths supported are: - Input: Main Mic, Sub Mic, Headset Mic, Auxiliary-FM Left/Right - Output: Headset Left/Right, Handsfree Left/Right TWL6040 codec supports power-up/down manual and automatic sequence. Manual sequence is done through a specific register writes sequence. Automatic sequence is done when the codec is powered-up through the external AUDPWRON line. The completion of the sequence is signaled through the audio interrupt. TWL6040 codec sysclk can be provided by: low-power or high performance PLL: - The low-power PLL takes a low-frequency input at 32,768 Hz and generates an approximate of 17.64 or 19.2 MHz (for 44.1 KHz and 48 KHz respectively) - The high-performance PLL generates an exact 19.2 MHz clock signal from high-frequency input at 12/19.2/26/38.4 MHz. Low-power playback mode is a special scenario where only headset path (headset DAC and driver) is active. For the particular case of headset path, PLL being used defines the headset power mode: low-power, high-performance. Signed-off-by:
Misael Lopez Cruz <x0052729@ti.com> Signed-off-by:
Jorge Eduardo Candelaria <jorge.candelaria@ti.com> Signed-off-by:
Margarita Olaya Cabrera <magi.olaya@ti.com> Acked-by:
Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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Mark Brown authored
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Peter Ujfalusi authored
Basic support for Left Justified coding for OMAP McBSP. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by:
Jarkko Nikula <jhnikula@gmail.com> Acked-by:
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Jorge Eduardo Candelaria authored
Indentation in initial support for McPDM driver was converted to spaces. Use tabs to comply with open source coding-style. Signed-off-by:
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- 18 Mar, 2010 3 commits
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Olaya, Margarita authored
Correction for chips: twl6030 is Phoenix Power chip twl6040 is Phoenix Audio chip Signed-off-by:
Samuel Ortiz <sameo@linux.intel.com> Signed-off-by:
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Barry Song authored
The registers for AD193X are defined as 0x800-0x810 for spi which uses 16_8 mode, for i2c to support AD1937, we will use 8_8 mode, only the low byte of 0x800-0x810 is valid. The patch will not destory other codecs, but make soc cache interface more useful. Signed-off-by:
Barry Song <barry.song@analog.com> Acked-by:
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Cliff Cai authored
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Cliff Cai <cliff.cai@analog.com> Signed-off-by:
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- 17 Mar, 2010 3 commits
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Mark Brown authored
The WM8750 is using some delayed work to manage the ramping of the bias at startup and resume out of line from the normal flow. This predates the support within ASoC core for moving the resume out of line from the main system resume which provides equivalent functionality with better interaction with applications. Change to doing the ramp in line to make use of the core functionality. Signed-off-by:
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Mark Brown authored
A code audit reveals that there are currently no users of the widget controls on PGAs. This is likely to continue to be the case since while there are useful things that can be done with integrating the PGA gain and mute controls with the power sequencing userspace generally wants stereo controls for output stages which this doesn't map onto well. In preparation for implementing something more useful strip out the existing code, leaving the parameters there for use by the new code. Signed-off-by:
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Mark Brown authored
The WM8350 provides microphone presence and short circuit detection. Integrate this with the ASoC jack reporting API. Signed-off-by:
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- 16 Mar, 2010 8 commits
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Mark Brown authored
The WM8904 allows microphone detection signals to be brought out as alternate functions of the GPIO signals which can be detected using interrupt inputs on the CPU. Allow this to be configured using platform data. Signed-off-by:
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Mark Brown authored
Provide platform data allowing the configuration of the GPIO pins on the WM8904 to be selected, allowing alternate functions to be enabled. Signed-off-by:
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Mark Brown authored
Support use of the WM8903 IRQ for reporting of microphone presence and short detection. Signed-off-by:
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Mark Brown authored
Currently used to detect completion of the write sequencer. Signed-off-by:
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Mark Brown authored
Provide support for WM8903 microphone presence and short detection using the GPIOs to route out a logic signal suitable for handling using snd_soc_jack_add_gpios() on the processor GPIOs. Signed-off-by:
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Mark Brown authored
Allow users to pass in a default configuration for the GPIOs of the WM8903 as platform data. This allows configuration of the pin muxing of the device. Signed-off-by:
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Mark Brown authored
Allow pins to be forced on regardless of their power state. This is intended for use with microphone bias supplies which need to be enabled in order to support microphone detection - in systems without appropriate hardware leaving the microphone unbiased when not in use saves power. The force done at power check time in order to avoid disrupting other power detection logic. Signed-off-by:
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Mark Brown authored
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- 15 Mar, 2010 1 commit
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Mark Brown authored
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- 12 Mar, 2010 9 commits
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Peter Ujfalusi authored
Use the new delay calback function to report the delay through ALSA for application caused by the internal FIFO. Signed-off-by:
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Peter Ujfalusi authored
New functions for querying the FIFO caused delay on both TX and RX path. On TX path the return value shows the number of used locations in the FIFO. On RX papth it returns the number of locations to be filled to reach the threshold value (DMA will be triggered to read the data out from the FIFO). Signed-off-by:
Tony Lindgren <tony@atomide.com> Acked-by:
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Peter Ujfalusi authored
Platform data option for the codec to keep the BCLK clock continuously running in FIFO modes (codec master). OMAP3 McBSP when in slave mode needs continuous BCLK running on the serial bus in order to operate correctly. Since in FIFO mode the DAC33 can also shut down the BCLK clock and enable it only when it is needed, let the platforms decide if the CPU side needs the BCLK running or not. Signed-off-by:
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Peter Ujfalusi authored
To avoid race condition especially in FIFO modes the sequence for enabling and disabling the codec need to be changed. Signed-off-by:
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Miguel Aguilar authored
The DM365 EVM has two codecs: the Audio Codec (AIC3x) and the Voice Codec, the idea is to have both enabled in the same kernel simultaneously. However, the current soc-core doesn't support simultaneous codecs, once that support will have added, a patch will be posted to enable both codecs in the DM365 EVM. Signed-off-by:
Miguel Aguilar <miguel.aguilar@ridgerun.com> Acked-by:
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Miguel Aguilar authored
Currently the DM365 is the only SoC that includes this Voice Codec. Signed-off-by:
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Miguel Aguilar authored
This patch adds the support for the interface needed by the DaVinci Voice Codec CQ93VC. Signed-off-by:
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Miguel Aguilar authored
This is the MFD driver for the DaVinci Voice codec, it has two clients: * Voice codec interface * Voice codec CQ93VC Signed-off-by:
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Jassi Brar authored
For ASoC, if either CPU or CODEC driver has set the flag, the MACHINE driver should be given a chance to figure out if the dai, that set the flag, can accomodate a rate that it does not explicitly specify but is specified by the dai at the other end of the link. Signed-off-by:
Jassi Brar <jassi.brar@samsung.com> Acked-by:
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- 11 Mar, 2010 1 commit
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Kuninori Morimoto authored
This driver USE PLL for 11025/22050/44100/88200 rate. To enable switching to bypass mode, PLL is always turned on. Special thanks to Phil Signed-off-by:
Phil Edworthy <Phil.Edworthy@renesas.com> Signed-off-by:
Kuninori Morimoto <morimoto.kuninori@renesas.com> Acked-by:
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- 10 Mar, 2010 11 commits
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Jassi Brar authored
Towards having build for multiple SoCs segregate hw_params callback for s3c2412 and s3c64xx. Since, all new SoCs have s3c64xx like register map, we keep that as default implementation if no SoC specific callback is already defined. Signed-off-by:
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Jassi Brar authored
For some CPU-CODEC and source clock combination we might need to set BCLK to N*Sample_size*LRCLK, where N may be even 3 or 4, not just 2. We can simply remove the dependency of BCLK on sample size as there is already a callback(S3C_I2SV2_DIV_BCLK) available to set required BCLK. Signed-off-by:
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Mark Brown authored
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Jassi Brar authored
Towards generalizing CPU driver interface, do not accept direct field values for the BCLK and RCLK. The machine driver should simply request the FS-multiple and not provide the value to be set in divide field of IISMOD. [Confirmed by Jassi that no existing machine drivers are affected -- broonie] Signed-off-by:
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Jassi Brar authored
In order for the RATE and FMT defines to be reuseable in future by the i2sv4 driver, move the MACROs out to the header file. Signed-off-by:
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Jassi Brar authored
s3c64xx-i2s remove unncessary headers Signed-off-by:
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Jassi Brar authored
s3c-i2s-v2 remove unnecessary headers Signed-off-by:
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Jassi Brar authored
Rather than having the multiple definitions of the same clocks, define them in one common place and refer by SoC specific names. Signed-off-by:
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Jassi Brar authored
Add missing semicolon after s3c2412_i2s_delay Signed-off-by:
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Barry Song authored
No point in duplicating this structure layout in each driver. Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Acked-by:
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Cliff Cai authored
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