- 27 Mar, 2023 4 commits
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Chester Lin authored
Use generic data structure to describe pin control groups in S32 SoC family and drop duplicated struct members. Suggested-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Chester Lin <clin@suse.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org>
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Chester Lin authored
Move common codes into smaller inline functions and remove argument checks that are not actually used by pull up/down bits in the S32 MSCR register. Signed-off-by:
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Chester Lin authored
Improve error/return code handlings and config checks in order to have better reliability and simplify driver codes such as removing/changing improper macros, blanks, print formats and helper calls. Signed-off-by:
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.4 - Add pin groups for audio on R-Car V4H, - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC, - Miscellaneous fixes and improvements.
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- 23 Mar, 2023 1 commit
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230310144721.1544669-1-robh@kernel.org [Dropped hunk hitting drivers/pinctrl/renesas/pinctrl.c] Signed-off-by:
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- 19 Mar, 2023 28 commits
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Asmaa Mnebhi authored
NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or take the default hardware functionality. Add a driver for the pin muxing. Signed-off-by:
Asmaa Mnebhi <asmaa@nvidia.com> Reviewed-by:
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Johan Hovold authored
The controller supports 'bias-bus-hold' so add it to the binding. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230316105800.18751-1-johan+linaro@kernel.orgSigned-off-by:
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Konrad Dybcio authored
Allow the common input-enable. This was missed with the initial submission. Fixes: 51470222 ("dt-bindings: pinctrl: qcom: Add QCM2290 pinctrl bindings") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by:
Shawn Guo <shawn.guo@linaro.org> Acked-by:
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Devi Priya authored
Add pinctrl definitions for the TLMM of IPQ9574 Reviewed-by:
Anusha Rao <quic_anusha@quicinc.com> Signed-off-by:
Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230316072940.29137-5-quic_devipriy@quicinc.comSigned-off-by:
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Devi Priya authored
Add new binding document for pinctrl on IPQ9574 Reviewed-by:
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Danila Tikhonov authored
Add pinctrl driver for TLMM block found in SM7150 SoC. Signed-off-by:
Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20230311212114.108870-3-danila@jiaxyga.comSigned-off-by:
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Danila Tikhonov authored
Add device tree binding Documentation details for Qualcomm SM7150 TLMM device Signed-off-by:
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Arınç ÜNAL authored
The Ralink pinctrl driver is now under the name of MediaTek MIPS pin controller. Move the maintainer information accordingly. Add dt-binding schema files. Add linux-mediatek@lists.infradead.org as an associated mailing list. Signed-off-by:
Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by:
Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230317213011.13656-22-arinc.unal@arinc9.comSigned-off-by:
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Arınç ÜNAL authored
The MT7628 and MT7688 SoCs contain different pin muxing information, therefore, should be split. This can be done now that there are compatible strings to distinguish them from other SoCs. Split the schema out to mediatek,mt76x8-pinctrl.yaml. Remove mediatek,mt76x8-pinctrl from mt7620. Signed-off-by:
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Arınç ÜNAL authored
The RT3352 and RT5350 SoCs each contain different pin muxing information, therefore, should be split. This can be done now that there are compatible strings to distinguish them from other SoCs. Split the schema out to ralink,rt3352-pinctrl.yaml and ralink,rt5350-pinctrl.yaml. Remove ralink,rt3352-pinctrl and ralink,rt5350-pinctrl from rt305x. Signed-off-by:
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Arınç ÜNAL authored
Set second level patternProperties to '^.*mux.*$' and '^.*conf.*$' on mediatek,mt7986-pinctrl.yaml to be on par with other schemas. Signed-off-by:
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Arınç ÜNAL authored
Drop the quotes from the referred schemas. Signed-off-by:
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Arınç ÜNAL authored
Fix the location of the pinmux header files mentioned on the schemas. Signed-off-by:
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Arınç ÜNAL authored
Change the style of description properties to plain style where there's no need to preserve the line endings, and vice versa. Fix capitalisation and indentation. Fit the schemas to 80 columns for each line. Signed-off-by:
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Arınç ÜNAL authored
Some schemas include "MediaTek", some "Mediatek". Rename all to "MediaTek" to address the naming inconsistency. Signed-off-by:
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Arınç ÜNAL authored
Rename pinctrl-mt8195.yaml to mediatek,mt8195-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by:
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Arınç ÜNAL authored
Rename pinctrl-mt8192.yaml to mediatek,mt8192-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by:
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Arınç ÜNAL authored
Rename pinctrl-mt8186.yaml to mediatek,mt8186-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by:
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Arınç ÜNAL authored
Rename mediatek,pinctrl-mt6795.yaml to mediatek,mt6795-pinctrl.yaml to be on par with the compatible string and other mediatek dt-binding schemas. Signed-off-by:
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Arınç ÜNAL authored
Rename schemas of pin controllers for MediaTek MT7620 and MT7621 SoCs to be on par with other pin controllers for MediaTek SoCs. Signed-off-by:
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Arınç ÜNAL authored
Add the new compatible strings for mt7620, mt76x8, and rt305x to be able to properly document the pin muxing information of each SoC, or SoCs that use the same pinmux data. Signed-off-by:
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Arınç ÜNAL authored
Drop the quotes from the referred schemas. Signed-off-by:
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Arınç ÜNAL authored
Move additionalProperties to the top. It's easier to read than after a long indented section. Signed-off-by:
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Arınç ÜNAL authored
The OF_GPIO option is enabled by default when GPIOLIB is enabled, and cannot be disabled. Remove it as a reverse dependency where GPIOLIB is also set as a reverse dependency. Signed-off-by:
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Arınç ÜNAL authored
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced new SoCs which utilise this platform. Move the driver to mediatek pinctrl directory. Rename the ralink core driver to mtmips. Signed-off-by:
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Arınç ÜNAL authored
Split the driver out to pinctrl-mt76x8.c. Remove including the unnecessary headers since is_mt76x8() is not being used anymore. Introduce a new compatible string to be able to document the pin muxing information properly. Signed-off-by:
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Arınç ÜNAL authored
Add new compatible strings to make every SoC, or SoCs that use the same pinmux data have a unique compatible string. This ensures that the pin muxing information of every SoC, or a set of SoCs that use the same pinmux data can be properly documented. Signed-off-by:
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Arınç ÜNAL authored
There have been stable releases with the ralink,rt2880-pinmux compatible string included. Having it removed breaks the ABI. Reintroduce it. Fixes: e5981cd4 ("pinctrl: ralink: add new compatible strings for each pinctrl subdriver") Signed-off-by:
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- 16 Mar, 2023 1 commit
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Geert Uytterhoeven authored
The last user of the Renesas-specific properties was converted to the standard properties in commit af897250 ("ARM: dts: gose: use generic pinctrl properties in SDHI nodes") in v4.10. Signed-off-by:
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- 13 Mar, 2023 6 commits
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Krzysztof Kozlowski authored
All LPASS pins have basic GPIO function and most of the code is ready for that. Add missing glue pieces to allow LPASS pins to work as GPIO, which is going to be used on MTP8550 and QRD8550 boards. Signed-off-by:
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Krzysztof Kozlowski authored
When choosing GPIO function for pins, use the same glitch-free method as main TLMM pinctrl-msm.c driver in msm_pinmux_set_mux(). This replicates the commit d21f4b7f ("pinctrl: qcom: Avoid glitching lines when we first mux to output") to LPASS pin controller with same justification. Signed-off-by:
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Krzysztof Kozlowski authored
The set_mux callback in SoC TLMM driver (pinctrl-msm.c) uses "group", not "group_num" for the number of the pin group. Other places of lpass-lpi also use "group", so let's be consistent for code readability. Signed-off-by:
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Krzysztof Kozlowski authored
As per Hardware Programming Guide, when configuring pin as output, set the pin value before setting output-enable (OE). Similar approach is in main SoC TLMM pin controller. Cc: <stable@vger.kernel.org> Fixes: 6e261d10 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver") Signed-off-by:
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Konrad Dybcio authored
Add MPM <-> TLMM pin mappings to allow for waking up the AP from sleep through MPM-connected pins. Signed-off-by:
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Mark Brown authored
The pioc_idx member of struct at91_gpio_chip is write only, just remove it. Reviewed-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by:
Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230216-gpio-at91-immutable-v2-2-326ef362dbc7@kernel.orgSigned-off-by:
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