Merge tag 'v6.1-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers

mmsys:
- add support for MT8186
- add correct compatible solution for vdosys[0,1] on MT8195

pmic wrapper:
- add support for MT8365

* tag 'v6.1-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: Add deprecated compatible to mmsys
  soc: mediatek: pwrap: add mt8365 SoC support
  soc: mediatek: pwrap: add support for sys & tmr clocks
  dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
  soc: mediatek: add mtk-mmsys support for mt8195 vdosys0
  Revert "soc: mediatek: add mtk-mmsys support for mt8195 vdosys0"
  dt-bindings: arm: mediatek: mmsys: change compatible for MT8195
  soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func

Link: https://lore.kernel.org/r/cc756001-a942-90b0-b79d-62c1fc189828@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.2-memory-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

memory: tegra: Changes for v6.2-rc1

Some cleanups replace open-coded debugfs attributes and memory client
IDs are added for the DLA IP found on Tegra234 SoCs.

* tag 'tegra-for-6.2-memory-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add DLA clients for Tegra234
  memory: tegra186-emc: Use DEFINE_SHOW_ATTRIBUTE to simplify code
  memory: tegra210-emc: Use DEFINE_SHOW_ATTRIBUTE to simplify code
  memory: tegra30-emc: Use DEFINE_SHOW_ATTRIBUTE to simplify code
  memory: tegra20-emc: Use DEFINE_SHOW_ATTRIBUTE to simplify code
  dt-bindings: tegra: Update headers for Tegra234
  dt-bindings: Add headers for NVDEC on Tegra234

Link: https://lore.kernel.org/r/20221121171239.2041835-5-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

clk: tegra: Changes for v6.2-rc1

Implements new ABI flags for certain clocks for which the parent rate
or clock state cannot be changed.

* tag 'tegra-for-6.2-clk-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  clk: tegra: Support BPMP-FW ABI deny flags

Link: https://lore.kernel.org/r/20221121171239.2041835-3-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.2-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

firmware: tegra: Changes for v6.2-rc1

This adds new BPMP ABI so that newer features can be enabled.
Furthermore, the BPMP driver is updated to use iosys-map helpers to
allow working with shared memory regions that are located in system
memory.

Apart from that, several minor cleanups are included.

* tag 'tegra-for-6.2-firmware-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: Remove surplus dev_err() when using platform_get_irq_byname()
  firmware: tegra: Update BPMP ABI
  firmware: tegra: bpmp: Do not support big-endian
  firmware: tegra: bpmp: Use iosys-map helpers
  firmware: tegra: bpmp: Prefer u32 over uint32_t

Link: https://lore.kernel.org/r/20221121171239.2041835-2-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.2-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Changes for v6.2-rc1

In addition to a number of improvements and cleanups this contains a
fix for the FUSE access on newer chips, adds Tegra234 I/O pad support
and fixes various issues with wake events.

The SoC sysfs revision attribute is updated to include the platform
information so drivers can check for silicon vs. pre-silicon, among
other things.

* tag 'tegra-for-6.2-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: cbb: Remove redundant dev_err call
  soc/tegra: cbb: Use DEFINE_SHOW_ATTRIBUTE to simplify tegra_cbb_err
  firmware: tegra: include IVC header file only once
  soc/tegra: cbb: Check firewall before enabling error reporting
  soc/tegra: cbb: Add checks for potential out of bound errors
  soc/tegra: cbb: Update slave maps for Tegra234
  soc/tegra: cbb: Use correct master_id mask for CBB NOC in Tegra194
  soc/tegra: fuse: Use platform info with SoC revision
  soc/tegra: pmc: Process wake events during resume
  soc/tegra: pmc: Fix dual edge triggered wakes
  soc/tegra: pmc: Add I/O pad table for Tegra234
  soc/tegra: fuse: Add nvmem keepout list
  soc/tegra: fuse: Use SoC specific nvmem cells
  soc/tegra: pmc: Select IRQ_DOMAIN_HIERARCHY

Link: https://lore.kernel.org/r/20221121171239.2041835-1-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'riscv-soc-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers

RISC-V SoC drivers for v6.2

SiFive:
- add probe error handling to the ccache driver

* tag 'riscv-soc-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  soc: sifive: ccache: fix missing of_node_put() in sifive_ccache_init()
  soc: sifive: ccache: fix missing free_irq() in error path in sifive_ccache_init()
  soc: sifive: ccache: fix missing iounmap() in error path in sifive_ccache_init()

Link: https://lore.kernel.org/r/Y3u0Oydiv2Wauda2@spudSigned-off-by: Arnd Bergmann <arnd@arndb.de>

For backward compatibility we add the deprecated compatible.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221111082912.14557-1-matthias.bgg@kernel.orgSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add PMIC Wrap support for MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221031093401.22916-4-fchiby@baylibre.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221031093401.22916-3-fchiby@baylibre.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add pwrap binding documentation for
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fadwa CHIBY <fchiby@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221031093401.22916-2-fchiby@baylibre.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

1. Add mt8195 driver data with compatible "mediatek-mt8195-vdosys0".
2. Add mt8195 routing table settings of vdosys0.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220927152704.12018-4-jason-jh.lin@mediatek.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

This reverts commit b804923b.

Due to the compatible changing of mt8195 from "mediatek,mt8195-mmsys"
to "mediatek,mt8195-vdosys0", we have to revert this patch and send a
new patch with the new compatible.
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Link: https://lore.kernel.org/r/20220927152704.12018-3-jason-jh.lin@mediatek.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.

For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2 different power domains, different clock drivers and different
mediatek-drm drivers.

Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR,
CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture Quality)
and they makes VDOSYS0 supports PQ function while they are not
including in VDOSYS1.

Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related
component). It makes VDOSYS1 supports the HDR function while it's not
including in VDOSYS0.

To summarize0:
Only VDOSYS0 can support PQ adjustment.
Only VDOSYS1 can support HDR adjustment.

Therefore, we need to separate these two different mmsys hardwares to
2 different compatibles for MT8195.

Fixes: 81c5a41d ("dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding")
Signed-off-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220927152704.12018-2-jason-jh.lin@mediatek.comSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Merge tag 'memory-controller-drv-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.2, part two

1. ARM PL353: document PL354 in bindings.
2. TI/OMAP GPMC: allow setting wait-pin polarity.

* tag 'memory-controller-drv-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  memory: omap-gpmc: fix coverity issue "Control flow issues"
  dt-bindings: memory-controllers: ti,gpmc: add wait-pin polarity
  memory: omap-gpmc: wait pin additions
  MAINTAINERS: arm,pl353-smc: correct dt-binding path
  dt-bindings: memory-controllers: arm,pl353-smc: Extend to support 'arm,pl354' SMC

Link: https://lore.kernel.org/r/20221116093509.19657-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'imx-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers

i.MX drivers change for 6.2:

- Improve imx8m-blk-ctrl driver to allow deferred probe in case that
  'bus' genpd is not yet ready.
- Add missing USB_1_PHY PD for i.MX scu-pd firmware driver.
- Add GENPD_FLAG_ACTIVE_WAKEUP flag for i.MX8MM/N in GPCv2 driver, so
  that the power domain remains on if USB remote wakeup is enabled.

* tag 'imx-drivers-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpcv2: add GENPD_FLAG_ACTIVE_WAKEUP flag for usb of imx8mm/n
  firmware: imx: scu-pd: add missed USB_1_PHY pd
  soc: imx: imx8m-blk-ctrl: Defer probe if 'bus' genpd is not yet ready

Link: https://lore.kernel.org/r/20221119125733.32719-1-shawnguo@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-drivers-for-v6.2-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v6.2 (take two)

  - Add support for identifying the SoC revision on RZ/V2M.

* tag 'renesas-drivers-for-v6.2-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Identify RZ/V2M SoC

Link: https://lore.kernel.org/r/cover.1668788925.git.geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'optee-for-6.2' of https://git.linaro.org/people/jens.wiklander/linux-tee into soc/drivers

Add missing __init/__exit annotations to OP-TEE driver

* tag 'optee-for-6.2' of https://git.linaro.org/people/jens.wiklander/linux-tee:
  optee: Add __init/__exit annotations to module init/exit funcs

Link: https://lore.kernel.org/r/Y3d4CHWl3Ofx5OrX@jadeSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Add the memory clients on Tegra234 which are needed for initialising the
SMMU for the Deep Learning Accelerator (DLA).
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Support BPMP_CLK_STATE_CHANGE_DENIED by not populating state changing
operations when the flag is set.

Support BPMP_CLK_RATE_PARENT_CHANGE_DENIED by not populating rate or
parent changing operations when the flag is set.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

There is no need to call the dev_err() function directly to print a
custom message when handling an error from either the platform_get_irq()
or platform_get_irq_byname() functions as both are going to display an
appropriate error message in case of a failure.

./drivers/firmware/tegra/bpmp-tegra210.c:204:2-9: line 204 is redundant
because platform_get_irq() already prints an error
./drivers/firmware/tegra/bpmp-tegra210.c:216:2-9: line 216 is redundant
because platform_get_irq() already prints an error

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2579Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Update the BPMP ABI to align with the the latest version.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

devm_ioremap_resource() prints error message in itself. Remove the
dev_err call to avoid redundant error message.
Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.
Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the necessary definition to prevent compilation
errors from the ivc.h file being included multiple times.
This does not currently cause any compilation issues,
but fix this anyway.
Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add support for identifying the RZ/V2M (R9A09G011) SoC.
Note that the SoC does not have a identification register.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
[biju: removed config changes ]
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221116102140.852889-3-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the Loongson-2 SoC chipid binding with DT schema format using
json-schema.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221111054201.18528-2-zhuyinbo@loongson.cn'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The global utilities block controls PCIE device enabling, alternate
function selection for multiplexed signals, consistency of HDA, USB
and PCIE, configuration of memory controller, rtc controller, lio
controller, and clock control.

This patch adds a driver to manage and access global utilities block
for LoongArch architecture Loongson-2 SoCs. Initially only reading SVR
and registering soc device are supported. Other guts accesses, such
as reading firmware configuration by default, should eventually be
added into this driver as well.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-drivers-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers

Renesas driver updates for v6.2

  - Let SOC_RENESAS select GPIOLIB and PINCTRL, so this does not have to
    be handled in two (soon three: arm/arm64/riscv), places.

* tag 'renesas-drivers-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Kconfig: Explicitly select GPIOLIB and PINCTRL config under SOC_RENESAS

Link: https://lore.kernel.org/r/cover.1667558747.git.geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>

To enable error reporting for a fabric to CCPLEX, we need to write its
register for enabling error interrupt to CCPLEX during boot and later
clear the error status register after error occurs. If a fabric's
registers are protected and not accessible from CCPLEX, then accessing
the registers will cause CBB firewall error.

Add support to check whether write access from CCPLEX to the registers
of a fabric is not blocked by it's firewall before enabling error
reporting to CCPLEX for that fabric.

Fixes: fc2f151d ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Added checks to avoid potential out of bounds errors which can happen if
the 'slave map' and 'CBB errors' arrays are not correct or latest where
some entries are missing.

Fixes: fc2f151d ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Updating the slave map for fabrics and using the same maps for DCE, RCE
and SCE as they all are a replica in Tegra234.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

In Tegra194 SoC, master_id bit range is different between cluster NOC
and CBB NOC. Currently same bit range is used which results in wrong
master_id value. Due to this, illegal accesses from the CCPLEX master
do not result in a crash as expected. Fix this by using the correct
range for the CBB NOC.

Finally, it is only necessary to extract the master_id when the
erd_mask_inband_err flag is set because when this is not set, a crash
is always triggered.

Fixes: b7134422 ("soc/tegra: cbb: Add CBB 1.0 driver for Tegra194")
Fixes: fc2f151d ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.

Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.
Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>