1. 05 Jan, 2022 3 commits
    • Catalin Marinas's avatar
      Merge branches 'for-next/misc', 'for-next/cache-ops-dzp',... · 945409a6
      Catalin Marinas authored
      Merge branches 'for-next/misc', 'for-next/cache-ops-dzp', 'for-next/stacktrace', 'for-next/xor-neon', 'for-next/kasan', 'for-next/armv8_7-fp', 'for-next/atomics', 'for-next/bti', 'for-next/sve', 'for-next/kselftest' and 'for-next/kcsan', remote-tracking branch 'arm64/for-next/perf' into for-next/core
      
      * arm64/for-next/perf: (32 commits)
        arm64: perf: Don't register user access sysctl handler multiple times
        drivers: perf: marvell_cn10k: fix an IS_ERR() vs NULL check
        perf/smmuv3: Fix unused variable warning when CONFIG_OF=n
        arm64: perf: Support new DT compatibles
        arm64: perf: Simplify registration boilerplate
        arm64: perf: Support Denver and Carmel PMUs
        drivers/perf: hisi: Add driver for HiSilicon PCIe PMU
        docs: perf: Add description for HiSilicon PCIe PMU driver
        dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu bindings
        drivers: perf: Add LLC-TAD perf counter support
        perf/smmuv3: Synthesize IIDR from CoreSight ID registers
        perf/smmuv3: Add devicetree support
        dt-bindings: Add Arm SMMUv3 PMCG binding
        perf/arm-cmn: Add debugfs topology info
        perf/arm-cmn: Add CI-700 Support
        dt-bindings: perf: arm-cmn: Add CI-700
        perf/arm-cmn: Support new IP features
        perf/arm-cmn: Demarcate CMN-600 specifics
        perf/arm-cmn: Move group validation data off-stack
        perf/arm-cmn: Optimise DTC counter accesses
        ...
      
      * for-next/misc:
        : Miscellaneous patches
        arm64: Use correct method to calculate nomap region boundaries
        arm64: Drop outdated links in comments
        arm64: errata: Fix exec handling in erratum 1418040 workaround
        arm64: Unhash early pointer print plus improve comment
        asm-generic: introduce io_stop_wc() and add implementation for ARM64
        arm64: remove __dma_*_area() aliases
        docs/arm64: delete a space from tagged-address-abi
        arm64/fp: Add comments documenting the usage of state restore functions
        arm64: mm: Use asid feature macro for cheanup
        arm64: mm: Rename asid2idx() to ctxid2asid()
        arm64: kexec: reduce calls to page_address()
        arm64: extable: remove unused ex_handler_t definition
        arm64: entry: Use SDEI event constants
        arm64: Simplify checking for populated DT
        arm64/kvm: Fix bitrotted comment for SVE handling in handle_exit.c
      
      * for-next/cache-ops-dzp:
        : Avoid DC instructions when DCZID_EL0.DZP == 1
        arm64: mte: DC {GVA,GZVA} shouldn't be used when DCZID_EL0.DZP == 1
        arm64: clear_page() shouldn't use DC ZVA when DCZID_EL0.DZP == 1
      
      * for-next/stacktrace:
        : Unify the arm64 unwind code
        arm64: Make some stacktrace functions private
        arm64: Make dump_backtrace() use arch_stack_walk()
        arm64: Make profile_pc() use arch_stack_walk()
        arm64: Make return_address() use arch_stack_walk()
        arm64: Make __get_wchan() use arch_stack_walk()
        arm64: Make perf_callchain_kernel() use arch_stack_walk()
        arm64: Mark __switch_to() as __sched
        arm64: Add comment for stack_info::kr_cur
        arch: Make ARCH_STACKWALK independent of STACKTRACE
      
      * for-next/xor-neon:
        : Use SHA3 instructions to speed up XOR
        arm64/xor: use EOR3 instructions when available
      
      * for-next/kasan:
        : Log potential KASAN shadow aliases
        arm64: mm: log potential KASAN shadow alias
        arm64: mm: use die_kernel_fault() in do_mem_abort()
      
      * for-next/armv8_7-fp:
        : Add HWCAPS for ARMv8.7 FEAT_AFP amd FEAT_RPRES
        arm64: cpufeature: add HWCAP for FEAT_RPRES
        arm64: add ID_AA64ISAR2_EL1 sys register
        arm64: cpufeature: add HWCAP for FEAT_AFP
      
      * for-next/atomics:
        : arm64 atomics clean-ups and codegen improvements
        arm64: atomics: lse: define RETURN ops in terms of FETCH ops
        arm64: atomics: lse: improve constraints for simple ops
        arm64: atomics: lse: define ANDs in terms of ANDNOTs
        arm64: atomics lse: define SUBs in terms of ADDs
        arm64: atomics: format whitespace consistently
      
      * for-next/bti:
        : BTI clean-ups
        arm64: Ensure that the 'bti' macro is defined where linkage.h is included
        arm64: Use BTI C directly and unconditionally
        arm64: Unconditionally override SYM_FUNC macros
        arm64: Add macro version of the BTI instruction
        arm64: ftrace: add missing BTIs
        arm64: kexec: use __pa_symbol(empty_zero_page)
        arm64: update PAC description for kernel
      
      * for-next/sve:
        : SVE code clean-ups and refactoring in prepararation of Scalable Matrix Extensions
        arm64/sve: Minor clarification of ABI documentation
        arm64/sve: Generalise vector length configuration prctl() for SME
        arm64/sve: Make sysctl interface for SVE reusable by SME
      
      * for-next/kselftest:
        : arm64 kselftest additions
        kselftest/arm64: Add pidbench for floating point syscall cases
        kselftest/arm64: Add a test program to exercise the syscall ABI
        kselftest/arm64: Allow signal tests to trigger from a function
        kselftest/arm64: Parameterise ptrace vector length information
      
      * for-next/kcsan:
        : Enable KCSAN for arm64
        arm64: Enable KCSAN
      945409a6
    • Huacai Chen's avatar
      arm64: Use correct method to calculate nomap region boundaries · daa149dd
      Huacai Chen authored
      Nomap regions are treated as "reserved". When region boundaries are not
      page aligned, we usually increase the "reserved" regions rather than
      decrease them. So, we should use memblock_region_reserved_base_pfn()/
      memblock_region_reserved_end_pfn() instead of memblock_region_memory_
      base_pfn()/memblock_region_memory_base_pfn() to calculate boundaries.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      Link: https://lore.kernel.org/r/20211022070646.41923-1-chenhuacai@loongson.cnSigned-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      daa149dd
    • Kees Cook's avatar
      arm64: Drop outdated links in comments · 89d30b11
      Kees Cook authored
      As started by commit 05a5f51c ("Documentation: Replace lkml.org links
      with lore"), an effort was made to replace lkml.org links with lore to
      better use a single source that's more likely to stay available long-term.
      However, it seems these links don't offer much value here, so just
      remove them entirely.
      
      Cc: Joe Perches <joe@perches.com>
      Suggested-by: default avatarWill Deacon <will@kernel.org>
      Link: https://lore.kernel.org/lkml/20210211100213.GA29813@willie-the-truck/Signed-off-by: default avatarKees Cook <keescook@chromium.org>
      Link: https://lore.kernel.org/r/20211215191835.1420010-1-keescook@chromium.org
      [catalin.marinas@arm.com: removed the arch/arm changes]
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      89d30b11
  2. 04 Jan, 2022 3 commits
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  4. 17 Dec, 2021 1 commit
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  6. 14 Dec, 2021 29 commits