- 27 Mar, 2023 12 commits
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Sebastian Krzyszkowiak authored
0.8V is outside of the operating voltage specified for imx8mq, see chapter 3.1.4 "Operating ranges" of the IMX8MDQLQCEC document. Signed-off-by:
Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by:
Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Sebastian Krzyszkowiak authored
This reduces power consumption in system suspend by about 10%. Signed-off-by:
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Sebastian Krzyszkowiak authored
Based on tests with my left ear (which appears to require lower levels than the right one), one Birch, one Dogwood and three Evergreens. It seems that the sensor reacts very weakly to hair, so let's make the thresholds rather generous to compensate. Signed-off-by:
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Sebastian Krzyszkowiak authored
RS9116 card already limits itself to 50MHz by being a high-speed card, while AP6275S can work at 100MHz just fine (technically it should work at 200MHz as well since it's a SDR104 card, but it doesn't appear to be the case in practice and further research will be needed to find out why). Signed-off-by:
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Angus Ainslie authored
Userland needs the mount matrix to know the correct orientation of the part. Signed-off-by:
Angus Ainslie <angus@akkea.ca> Signed-off-by:
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Sebastian Krzyszkowiak authored
They're still in the operating range according to i.MX 8M Quad datasheet. There's some headroom added over minimal values to account for voltage drop. Operational ranges (min - typ - max [selected]): - VDD_SOC (BUCK1): 0.81 - 0.9 - 0.99 [0.88] - VDD_ARM (BUCK2): 0.81 - 0.9 - 1.05 [0.84] (1000MHz) 0.90 - 1.0 - 1.05 [0.93] (1500MHz) - VDD_GPU (BUCK3): 0.81 - 0.9 - 1.05 [0.85] (800MHz) 0.90 - 1.0 - 1.05 [ -- ] (1000MHz) - VDD_VPU (BUCK4): 0.81 - 0.9 - 1.05 [ -- ] (550/500/588MHz) 0.90 - 1.0 - 1.05 [0.93] (660/600/800MHz) Idle power consumption doesn't appear to be influenced much, but a simple load test (`cat /dev/urandom | pigz - > /dev/null` combined with running Animatch) seems to show about 0.3W of difference. Care is advised, as there may be differences between each units in how low can they be undervolted - in my experience, reaching that point usually makes the phone fail to boot. In my case, it appears that my Birch phone can go down the most. This is a somewhat conservative set of values that I've seen working well on all my devices; I haven't tried very hard to optimize it, so more experiments are welcome. Signed-off-by: -
Sebastian Krzyszkowiak authored
Correctly set regulation-voltage, termination-current and charge-current for the different librem 5 board revisions. Signed-off-by:
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Martin Kepplinger authored
Add brightness-levels and default-brightness-level properties to the librem5 board description that have been used for a long time. Signed-off-by:
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Sebastian Krzyszkowiak authored
No functional change, but it describes the hardware better. Signed-off-by:
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Martin Kepplinger authored
Fix the regulator name for the audio-1v8 regulator. Signed-off-by:
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Martin Kepplinger authored
The CLKO2 clock is used for both camera CSI interfaces as the driving clock for the connected sensors. In order for it to be available, use this hog. We can't simply add it to 2 different sensor descriptions. Signed-off-by:
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Martin Kepplinger authored
No frames are streamed when using the default frequencies. I'm not yet sure why the fastest ones don't work here but we've been using these frequencies successfully for a long time now. Signed-off-by:
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- 14 Mar, 2023 20 commits
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Krzysztof Kozlowski authored
Bindings expect thermal node names to end with '-thermal': imx8qxp-mek.dtb: thermal-zones: 'pmic-thermal0' does not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Alexander Stein authored
These buttons are capable of waking up a suspended system, add the appropriate property for both. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by:
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Markus Niebel authored
TPM1/TPM3 are missing, add them. Signed-off-by:
Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
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Lucas Stach authored
This adds support for the 4 USB3 host ports on the board, which are connected to the i.MX8MP SoC via a Realtek RTS5411 hub. As the schematic for the board is not available, I could not validate that this really reflects the reality, but I modeled things after the hacked in usage of the GPIOs in the downstream kernel. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
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Alexander Stein authored
Add FlexSPI node for i.MX93. Signed-off-by:
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Marek Vasut authored
Align the clock and reg properties order with example bindings and the rest of the imx8mp.dtsi . No functional change. Signed-off-by:
Marek Vasut <marex@denx.de> Reviewed-by:
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Marek Vasut authored
This block should not be compatible with simple-bus and misuse it that way. Instead, the driver should scan its subnodes and bind drivers to them. Reviewed-by:
Liu Ying <victor.liu@nxp.com> Tested-by:
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Sebastian Krzyszkowiak authored
UART ports have DMA capability. Describe the UART DMA properties. Signed-off-by:
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Marek Vasut authored
The i.MX8MP DHCOM SoM may come with either external RGMII PHY or LAN8740Ai RMII PHY on the SoM attached to FEC MAC. Add pin mux settings for both options, so that DT overlay can override these settings on SoM variant with the LAN8740Ai PHY. Signed-off-by:
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Marek Vasut authored
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin mux settings for both options, so that DT overlay can override these settings on SoM variant with the LAN8740Ai PHY. Signed-off-by:
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Marek Vasut authored
The current variant of the SoM has LAN8740Ai PHY connected to EQoS strapped to MDIO address 0 , adjust the MDIO address to match the hardware. Signed-off-by:
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Marek Vasut authored
Fix copy-paste error in the EQoS reset comment, align with SoM schematic. No functional change. Signed-off-by:
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Marek Vasut authored
The PHY nodes may be activated via DTO in case another SoM variant is populated into the development kit. Do not delete the nodes. Signed-off-by:
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Marek Vasut authored
The GPIO M SoM pin is connected to CLKOUT1, while CLKOUT2 is used as a supply for TC9595 bridge chip clock. Update the comment. No functional change. Signed-off-by:
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Marek Vasut authored
Add PCIe support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Signed-off-by:
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Laurent Pinchart authored
The I2C4 bus is exposed on the camera connector. Add and select the corresponding pinmux entries and set the default frequency. The device is left disabled, to be enabled from camera overlays. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
Teresa Remmet <t.remmet@phytec.de> Signed-off-by:
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Richard Zhu authored
Add i.MX8MP PCIe EP support. Signed-off-by:
Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by:
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Richard Zhu authored
Add i.MX8MQ PCIe EP support. Signed-off-by:
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Richard Zhu authored
Add i.MX8MM PCIe EP support. Signed-off-by:
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Jacky Bai authored
Add the bbnsm node for RTC & ON/OFF button support Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Tested-by:
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- 13 Mar, 2023 4 commits
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Stefan Eichenberger authored
Use the serdev feature to load the driver for the 88W8997 bluetooth driver. Signed-off-by:
Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by:
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Rob Herring authored
The GICv3 ITS is an MSI controller, therefore its node name should be 'msi-controller'. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Marcel Ziswiler authored
Capitalise Yavia in comment and add missing whitespace. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
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Marcel Ziswiler authored
Add PCIe support on the Verdin iMX8M Plus. Signed-off-by:
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- 07 Mar, 2023 4 commits
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Marcel Ziswiler authored
The previous patch added the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards which this patch introduces. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees contained in this patch include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8Signed-off-by:
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Marcel Ziswiler authored
This patch adds the device tree to support Toradex Apalis iMX8 [1] aka QuadMax a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8 family SoC (either i.MX 8QuadMax or 8QuadPlus), two PF8100 PMICs, a KSZ9131 Gigabit Ethernet PHY, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, an SGTL5000 analogue audio codec, an USB3503A USB HSIC hub, an optional I2C EEPROM plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The carrier board device trees in the next patch will include the module's device tree and enable the supported peripherals of the carrier board. Some level of display functionality just landed upstream but requires further integration/testing on our side. Therefore, currently only basic console UART, eMMC and Ethernet functionality work fine. As there is no i.MX 8QuadPlus device tree upstream those have been dropped. However, apart from an error message during boot about it failing to bring up the second Cortex-A72 core this boots fine on QuadPlus' as well. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8Signed-off-by:
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Zhou Peng authored
Enable VPU decoder and encoder functionality. Signed-off-by:
Zhou Peng <eagle.zhou@nxp.com> Signed-off-by:
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Joakim Zhang authored
Add CAN node for imx8qm in devicetree. Unlike on the i.MX 8QXP where the flexcan clocks are shared between multiple CAN instances, the i.MX 8QM has separate flexcan clock slices. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
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