- 20 May, 2016 40 commits
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Ben Skeggs authored
This was really inconsistent, some implementations could touch PPCs that didn't exist, others neglected to touch ones that did. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Matches newer RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Karol Herbst authored
We always want a equal or higher voltage than the requested ones, otherwise nouveau undervolts. Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
These are specified by PTOP on Maxwell GPUs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
It appears these don't map to PBDMAs (at least on Kepler, it may or may be valid for Fermi - this hasn't been checked), but to runlists. This drops the NVKM_ENGINE_FIFO data from the entries too, as resetting all of PFIFO is *not* the way to handle such faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Engine fields have been removed, as they're specified by PTOP. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
With the addition of PTOP-specified reset bits, it makes more sense to move the definitions here rather than in individual subdev implementations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
This will be later extended to handle PTOP-specified reset masks as well as the hardcoded ones. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
This will also be used to define NV_PMC_ENABLE <-> subdev mappings in an upcoming commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Ported from the code currently in engine/fifo/gk104.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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