- 03 Nov, 2020 10 commits
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Grygorii Strashko authored
Some K3 CPSW NUSS instances can lose context after PM runtime ON->OFF->ON transition depending on integration (including all submodules: CPTS, MDIO, etc), like J721E Main CPSW (CPSW9G). In case CPTS is enabled it's initialized during probe and does not expect to be reset. Hence, keep K3 CPSW active by forbidding PM runtime if CPTS is enabled. Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by:
Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by:
Jakub Kicinski <kuba@kernel.org>
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Grygorii Strashko authored
The VLAN offload for AM65x CPSW2G is implemented using existing ALE APIs, which are also used by legacy CPSW drivers. So, now it always adds current Ext. Port and Host as VLAN members when VLAN is added by 8021Q core (.ndo_vlan_rx_add_vid) and forcibly removes VLAN from ALE table in .ndo_vlan_rx_kill_vid(). This works as for AM65x CPSW2G (which has only one Ext. Port) as for legacy CPSW devices (which can't support same VLAN on more then one Port in multi mac (dual-mac) mode). But it doesn't work for the new J721E and AM64x multi port CPSWxG versions doesn't have such restrictions and allow to offload the same VLAN on any number of ports. Now the attempt to add same VLAN on two (or more) K3 CPSWxG Ports will cause: - VLAN members mask overwrite when VLAN is added - VLAN removal from ALE table when any Port removes VLAN This patch fixes an issue by: - switching to use cpsw_ale_vlan_add_modify() instead of cpsw_ale_add_vlan() when VLAN is added to ALE table, so VLAN members mask will not be overwritten; - Updates cpsw_ale_del_vlan() as: if more than one ext. Port is in VLAN member mask then remove only current port from VLAN member mask else remove VLAN ALE entry Example: add: P1 | P0 (Host) -> members mask: P1 | P0 add: P2 | P0 -> members mask: P2 | P1 | P0 rem: P1 | P0 -> members mask: P2 | P0 rem: P2 | P0 -> members mask: - The VLAN is forcibly removed if port_mask=0 passed to cpsw_ale_del_vlan() to preserve existing legacy CPSW drivers functionality. Signed-off-by: -
Grygorii Strashko authored
Add/export cpsw_ale_vlan_del_modify() and use it in cpsw_switchdev instead of generic cpsw_ale_del_vlan() to avoid mixing 8021Q and switchdev VLAN offload. This is preparation patch equired by follow up changes. Signed-off-by:
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Grygorii Strashko authored
Use cppi5_desc_is_tdcm() helper for teardown indicator detection instead of hard-coded value. Signed-off-by:
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Grygorii Strashko authored
In preparation of adding more multi-port K3 CPSW versions move free descriptor queue mode selection in am65_cpsw_pdata, so it can be selected basing on DT compatibility property. Signed-off-by:
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Grygorii Strashko authored
In preparation of adding more multi-port K3 CPSW versions move ALE selection in am65_cpsw_pdata, so it can be selected basing on DT compatibility property. Signed-off-by:
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Xin Long authored
net/ipv6/addrconf.c:2005: warning: Function parameter or member 'dev' not described in 'ipv6_dev_find' net/ipv6/ip6_vti.c:138: warning: Function parameter or member 'ip6n' not described in 'vti6_tnl_bucket' net/ipv6/ip6_tunnel.c:218: warning: Function parameter or member 'ip6n' not described in 'ip6_tnl_bucket' net/ipv6/ip6_tunnel.c:238: warning: Function parameter or member 'ip6n' not described in 'ip6_tnl_link' net/ipv6/ip6_tunnel.c:254: warning: Function parameter or member 'ip6n' not described in 'ip6_tnl_unlink' net/ipv6/ip6_tunnel.c:427: warning: Function parameter or member 'raw' not described in 'ip6_tnl_parse_tlv_enc_lim' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'skb' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'ipproto' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'opt' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'type' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'code' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'msg' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'info' not described in 'ip6_tnl_err' net/ipv6/ip6_tunnel.c:499: warning: Function parameter or member 'offset' not described in 'ip6_tnl_err' ip6_tnl_err() is an internal function, so remove the kerneldoc. For the others, add the missing parameters. Signed-off-by:
Xin Long <lucien.xin@gmail.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20201031183044.1082193-1-andrew@lunn.chSigned-off-by:
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Andrew Lunn authored
With W=1 the following error is reported: In function ‘strncpy’, inlined from ‘hdlcdrv_ioctl’ at drivers/net/hamradio/hdlcdrv.c:600:4: ./include/linux/string.h:297:30: warning: ‘__builtin_strncpy’ specified bound 32 equals destination size [-Wstringop-truncation] 297 | #define __underlying_strncpy __builtin_strncpy | ^ ./include/linux/string.h:307:9: note: in expansion of macro ‘__underlying_strncpy’ 307 | return __underlying_strncpy(p, q, size); Replace strncpy with strlcpy to guarantee the string is terminated. Signed-off-by: -
Andrew Lunn authored
drivers/net/wan/lmc/lmc_main.c: In function ‘lmc_ioctl’: drivers/net/wan/lmc/lmc_main.c:356:25: warning: variable ‘mii’ set but not used [-Wunused-but-set-variable] 356 | u16 mii; | ^~~ drivers/net/wan/lmc/lmc_main.c:427:25: warning: variable ‘mii’ set but not used [-Wunused-but-set-variable] 427 | u16 mii; | ^~~ drivers/net/wan/lmc/lmc_main.c: In function ‘lmc_interrupt’: drivers/net/wan/lmc/lmc_main.c:1188:9: warning: variable ‘firstcsr’ set but not used [-Wunused-but-set-variable] 1188 | u32 firstcsr; This file has funky indentation, and makes little use of tabs. Keep with this style in the patch, but that makes checkpatch unhappy. Signed-off-by: -
Andrew Lunn authored
drivers/net/xen-netfront.c:2416:16: warning: variable ‘target’ set but not used [-Wunused-but-set-variable] 2416 | unsigned long target; Remove target and just discard the return value from simple_strtoul(). This patch does give a checkpatch warning, but the warning was there before anyway, as this file has lots of checkpatch warnings. Signed-off-by:
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- 02 Nov, 2020 11 commits
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Jakub Kicinski authored
Andrew Lunn says: ==================== davicom W=1 fixes Fixup various W=1 warnings, and then add COMPILE_TEST support, which explains why these where missed on the previous pass. ==================== Link: https://lore.kernel.org/r/20201031005833.1060316-1-andrew@lunn.chSigned-off-by:
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Andrew Lunn authored
Improve the build testing of this davicom driver by enabling it when COMPILE_TEST is selected. Signed-off-by:
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Andrew Lunn authored
drivers/net/ethernet/davicom//dm9000.c: In function ‘dm9000_dumpblk_8bit’: drivers/net/ethernet/davicom//dm9000.c:235:6: warning: variable ‘tmp’ set but not used [-Wunused-but-set-variable] The driver needs to read packet data from the device even when the packet is known bad. There is no need to assign the data to a variable during this discard operation. Signed-off-by:
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Andrew Lunn authored
When compiled for platforms other than __i386__ or __x86_64__: drivers/net/ethernet/dec/tulip/tulip_core.c: In function ‘tulip_init_one’: drivers/net/ethernet/dec/tulip/tulip_core.c:1296:13: warning: variable ‘last_irq’ set but not used [-Wunused-but-set-variable] 1296 | static int last_irq; Add more #if defined() to totally remove the code when not needed. Signed-off-by:
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Guillaume Nault authored
Test different encapsulation modes of the bareudp module: * Unicast MPLS, * IPv4 only, * IPv4 in multiproto mode (that is, IPv4 and IPv6), * IPv6. Each mode is tested with both an IPv4 and an IPv6 underlay. v2: * Add build dependencies in config file (Willem de Bruijn). * The MPLS test now uses its own IP addresses. This minimises the amount of cleanup between tests and simplifies the script. * Verify that iproute2 supports bareudp tunnels before running the script (and other minor usability improvements). Signed-off-by:Guillaume Nault <gnault@redhat.com> Link: https://lore.kernel.org/r/8abc0e58f8a7eeb404f82466505a73110bc43ab8.1604088587.git.gnault@redhat.comSigned-off-by:
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Jakub Kicinski authored
Ivan Mikhaylov says: ==================== add ast2400/2500 phy-handle support This patch introduces ast2400/2500 phy-handle support with an embedded MDIO controller. At the current moment it is not possible to set options with this format on ast2400/2500: mac { phy-handle = <&phy>; phy-mode = "rgmii"; mdio { #address-cells = <1>; #size-cells = <0>; phy: ethernet-phy@0 { compatible = "ethernet-phy-idxxxx.yyyy"; reg = <0>; }; }; }; The patch fixes it and gets possible PHYs and register them with of_mdiobus_register. Changes from v3: 1. add dt-bindings description of MDIO node and phy-handle option with example. Changes from v2: 1. change manual phy interface type check on phy_interface_mode_is_rgmii function. 2. add err_phy_connect label. 3. split ftgmac100_destroy_mdio into ftgmac100_phy_disconnect and ftgmac100_destroy_mdio. 4. remove unneeded mdio_np checks. Changes from v1: 1. split one patch into two. ==================== Link: https://lore.kernel.org/r/20201030133707.12099-1-i.mikhaylov@yadro.comSigned-off-by: -
Ivan Mikhaylov authored
Add the phy-handle and MDIO description and add the example with PHY and MDIO nodes. Signed-off-by:
Ivan Mikhaylov <i.mikhaylov@yadro.com> Reviewed-by:
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Ivan Mikhaylov authored
phy-handle can't be handled well for ast2400/2500 which has an embedded MDIO controller. Add ftgmac100_mdio_setup for ast2400/2500 and initialize PHYs from mdio child node with of_mdiobus_register. Signed-off-by:
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Ivan Mikhaylov authored
Split MDIO registration and PHY connect into ftgmac100_setup_mdio and ftgmac100_mii_probe. Signed-off-by:
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Grygorii Strashko authored
The timestamping tool is supporting now only PTPv1 (IEEE-1588 2002) while modern HW often supports also/only PTPv2. Hence timestamping tool is still useful for sanity testing of PTP drivers HW timestamping capabilities it's reasonable to upstate it to support PTPv2. This patch adds corresponding support which can be enabled by using new parameter "PTPV2". Signed-off-by:
Richard Cochran <richardcochran@gmail.com> Link: https://lore.kernel.org/r/20201029190931.30883-1-grygorii.strashko@ti.comSigned-off-by:
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Andrew Lunn authored
net/9p/client.c:420: warning: Function parameter or member 'c' not described in 'p9_client_cb' net/9p/client.c:420: warning: Function parameter or member 'req' not described in 'p9_client_cb' net/9p/client.c:420: warning: Function parameter or member 'status' not described in 'p9_client_cb' net/9p/client.c:568: warning: Function parameter or member 'uidata' not described in 'p9_check_zc_errors' net/9p/trans_common.c:23: warning: Function parameter or member 'nr_pages' not described in 'p9_release_pages' net/9p/trans_common.c:23: warning: Function parameter or member 'pages' not described in 'p9_release_pages' net/9p/trans_fd.c:132: warning: Function parameter or member 'rreq' not described in 'p9_conn' net/9p/trans_fd.c:132: warning: Function parameter or member 'wreq' not described in 'p9_conn' net/9p/trans_fd.c:56: warning: Function parameter or member 'privport' not described in 'p9_fd_opts' net/9p/trans_rdma.c:113: warning: Function parameter or member 'cqe' not described in 'p9_rdma_context' net/9p/trans_rdma.c:129: warning: Function parameter or member 'privport' not described in 'p9_rdma_opts' net/9p/trans_virtio.c:215: warning: Function parameter or member 'limit' not described in 'pack_sg_list_p' net/9p/trans_virtio.c:83: warning: Function parameter or member 'chan_list' not described in 'virtio_chan' net/9p/trans_virtio.c:83: warning: Function parameter or member 'p9_max_pages' not described in 'virtio_chan' net/9p/trans_virtio.c:83: warning: Function parameter or member 'ring_bufs_avail' not described in 'virtio_chan' net/9p/trans_virtio.c:83: warning: Function parameter or member 'tag' not described in 'virtio_chan' net/9p/trans_virtio.c:83: warning: Function parameter or member 'vc_wq' not described in 'virtio_chan' Signed-off-by:
Dominique Martinet <asmadeus@codewreck.org> Link: https://lore.kernel.org/r/20201031182655.1082065-1-andrew@lunn.chSigned-off-by:
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- 01 Nov, 2020 1 commit
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Vladimir Oltean authored
The commit cited below has changed only the functional prototype of br_multicast_querier_exists, but forgot to do that for the stub prototype (the one where CONFIG_BRIDGE_IGMP_SNOOPING is disabled). Fixes: 955062b0 ("net: bridge: mcast: add support for raw L2 multicast groups") Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20201101000845.190009-1-vladimir.oltean@nxp.comSigned-off-by:
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- 31 Oct, 2020 18 commits
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Heiner Kallweit authored
We can safely runtime-suspend the chip if rtl_open() fails. Therefore switch the error path to use pm_runtime_put_sync() as well. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/aa093b1e-f295-5700-1cb7-954b54dd8f17@gmail.comSigned-off-by:
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Heiner Kallweit authored
tp->dirty_tx isn't changed outside rtl_tx(). Therefore I see no need to guarantee a specific order of reading tp->dirty_tx and tp->cur_tx. Having said that we can remove the memory barrier. In addition use READ_ONCE() when reading tp->cur_tx because it can change in parallel to rtl_tx(). Signed-off-by:
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Armin Wolf authored
Correct a typo in ne.c and ne2k-pci.c which prevented activation of the RW-Bugfix. Signed-off-by:
Armin Wolf <W_Armin@gmx.de> Link: https://lore.kernel.org/r/20201029143357.7008-1-W_Armin@gmx.deSigned-off-by:
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Parshuram Thombare authored
This patch adds support for 10GBASE-R interface to the linux driver for Cadence's ethernet controller. This controller has separate MAC's and PCS'es for low and high speed paths. High speed PCS supports 100M, 1G, 2.5G, 5G and 10G through rate adaptation implementation. However, since it doesn't support auto negotiation, linux driver is modified to support 10GBASE-R instead of USXGMII. Signed-off-by:
Parshuram Thombare <pthombar@cadence.com> Link: https://lore.kernel.org/r/1603975627-18338-1-git-send-email-pthombar@cadence.comSigned-off-by:
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Karsten Graul authored
To allow better problem diagnosis the return codes for SMC-Dv2 are improved by this patch. A few more CLC DECLINE codes are defined and sent to the peer when an SMC connection cannot be established. There are now multiple SMC variations that are offered by the client and the server may encounter problems to initialize all of them. Because only one diagnosis code can be sent to the client the decision was made to send the first code that was encountered. Because the server tries the variations in the order of importance (SMC-Dv2, SMC-D, SMC-R) this makes sure that the diagnosis code of the most important variation is sent. v2: initialize rc in smc_listen_v2_check(). Signed-off-by:
Karsten Graul <kgraul@linux.ibm.com> Link: https://lore.kernel.org/r/20201031181938.69903-1-kgraul@linux.ibm.comSigned-off-by:
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Jakub Kicinski authored
Subbaraya Sundeep says: ==================== Support for OcteonTx2 98xx silicon OcteonTx2 series of silicons have multiple variants, the 98xx variant has two network interface controllers (NIX blocks) each of which supports upto 100Gbps. Similarly 98xx supports two crypto blocks (CPT) to double the crypto performance. The current RVU drivers support a single NIX and CPT blocks, this patchset adds support for multiple blocks of same type to be active at the same time. Also the number of serdes controllers (CGX) have increased from three to five on 98xx. Each of the CGX block supports upto 4 physical interfaces depending on the serdes mode ie upto 20 physical interfaces. At a time each CGX block can be mapped to a single NIX. The HW configuration to map CGX and NIX blocks is done by firmware. NPC has two new interfaces added NIX1_RX and NIX1_TX similar to NIX0 interfaces. Also MCAM entries is increased from 4k to 16k. To support the 16k entries extended set is added in hardware which are at completely different register offsets. Fortunately new constant registers can be read to figure out the extended set is present or not. This patch set modifies existing AF and PF drivers in below order to support 98xx: - Prepare for supporting multiple blocks of same type. Functions which operate with block type to get or set resources count are modified to operate with block address - Manage allocating and freeing LFs from new NIX1 and CPT1 RVU blocks. - NIX block specific initialization and teardown for NIX1 - Based on the mapping set by Firmware, assign the NIX block LFs to a PF/VF. - Multicast entries context is setup for NIX1 along with NIX0 - NPC changes to support extended set of MCAM entries, counters and NIX1 interfaces to NPC. - All the mailbox changes required for the new blocks in 98xx. - Since there are more CGX links in 98xx the hardcoded LBK link value needed by netdev drivers is not sufficient any more. Hence AF consumers need to get the number of all links and calculate the LBK link. - Debugfs changes to display NIX1 contexts similar to NIX0 - Debugfs change to display mapping between CGX, NIX and PF. ==================== Link: https://lore.kernel.org/r/1603948549-781-1-git-send-email-sundeep.lkml@gmail.comSigned-off-by:
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Rakesh Babu authored
Unlike earlier silicon variants, OcteonTx2 98xx silicon has 2 NIX blocks and each of the CGX is mapped to either of the NIX blocks. Each NIX block supports 100G. Mapping btw NIX blocks and CGX is done by firmware based on CGX speed config to have a maximum possible network bandwidth. Since the mapping is not fixed, it's difficult for a user to figure out. Hence added a debugfs entry which displays mapping between CGX LMAC, NIX block and RVU PF. Sample result of this entry :: ~# cat /sys/kernel/debug/octeontx2/rvu_pf_cgx_map PCI dev RVU PF Func NIX block CGX LMAC 0002:02:00.0 0x400 NIX0 CGX0 LMAC0 Signed-off-by:
Rakesh Babu <rsaladi2@marvell.com> Signed-off-by:
Sunil Goutham <sgoutham@marvell.com> Signed-off-by:
Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by:
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Rakesh Babu authored
If NIX1 block is also implemented then add a new directory for NIX1 in debugfs root. Stats of NIX1 block can be read/writen from/to the files in directory "/sys/kernel/debug/octeontx2/nix1/". Signed-off-by:
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Subbaraya Sundeep authored
CGX links are followed by LBK links but number of CGX and LBK links varies between platforms. Hence get the number of links present in hardware from AF and use it to calculate LBK link number. Signed-off-by:
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Subbaraya Sundeep authored
This patch puts together all mailbox changes for 98xx silicon: Attach -> Modify resource attach mailbox handler to request LFs from a block address out of multiple blocks of same type. If a PF/VF need LFs from two blocks of same type then attach mbox should be called twice. Example: struct rsrc_attach *attach; .. Allocate memory for message .. attach->cptlfs = 3; /* 3 LFs from CPT0 */ .. Send message .. .. Allocate memory for message .. attach->modify = 1; attach->cpt_blkaddr = BLKADDR_CPT1; attach->cptlfs = 2; /* 2 LFs from CPT1 */ .. Send message .. Detach -> Update detach mailbox and its handler to detach resources from CPT1 and NIX1 blocks. MSIX -> Updated the MSIX mailbox and its handler to return MSIX offsets for the new block CPT1. Free resources -> Update free_rsrc mailbox and its handler to return the free resources count of new blocks NIX1 and CPT1 Links -> Number of CGX,LBK and SDP links may vary between platforms. For example, in 98xx number of CGX and LBK links are more than 96xx. Hence the info about number of links present in hardware is useful for consumers to request link configuration properly. This patch sends this info in nix_lf_alloc_rsp. Signed-off-by: -
Subbaraya Sundeep authored
On 98xx silicon, NPC block has additional mcam entries, counters and NIX1 interfaces. Extended set of registers are present for the new mcam entries and counters. This patch does the following: - updates the register accessing macros to use extended set if present. - configures the MKEX profile for NIX1 interfaces also. - updates mcam entry write functions to use assigned NIX0/1 interfaces for the PF/VF. Signed-off-by:
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Subbaraya Sundeep authored
Initialize MCE context for the assigned NIX0/1 block for a CGX mapped PF. Modified rvu_nix_aq_enq_inst function to work with nix_hw so that MCE contexts for both NIX blocks can be inited. Signed-off-by:
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Subbaraya Sundeep authored
Firmware configures NIX block mapping for all CGXs to achieve maximum throughput. This patch reads the configuration and create mapping between RVU PF and NIX blocks. And for LBK VFs assign NIX0 for even numbered VFs and NIX1 for odd numbered VFs. Signed-off-by:
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Rakesh Babu authored
This patch modifies NIX functions to operate with nix_hw context so that existing functions can be used for both NIX0 and NIX1 blocks. And the NIX blocks present in the system are initialized during driver init and freed during exit. Signed-off-by:
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Rakesh Babu authored
AF manages the tasks of allocating, freeing LFs from RVU blocks to PF and VFs. With new NIX1 and CPT1 blocks in 98xx, this patch adds support for handling new blocks too. Co-developed-by:
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Subbaraya Sundeep authored
Since multiple blocks of same type are present in 98xx, modify functions which get resource count and which update resource count to work with individual block address instead of block type. Reviewed-by:
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Robert Hancock authored
Update the axienet driver to properly support the Xilinx PCS/PMA PHY component which is used for 1000BaseX and SGMII modes, including properly configuring the auto-negotiation mode of the PHY and reading the negotiated state from the PHY. Signed-off-by:
Robert Hancock <robert.hancock@calian.com> Reviewed-by:
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/20201028171429.1699922-1-robert.hancock@calian.comSigned-off-by:
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Alex Elder authored
The previous commit added support for IPA having up to six source and destination resources. But currently nothing uses more than four. (Five of each are used in a newer version of the hardware.) I find that in one of my build environments the compiler complains about newly-added code in two spots. Inspection shows that the warnings have no merit, but this compiler does not recognize that. ipa_main.c:457:39: warning: array index 5 is past the end of the array (which contains 4 elements) [-Warray-bounds] (and the same warning at line 483) We can make this warning go away by changing the number of elements in the source and destination resource limit arrays--now rather than waiting until we need it to support the newer hardware. This change was coming soon anyway; make it now to get rid of the warning. Signed-off-by:Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20201031151524.32132-1-elder@linaro.orgSigned-off-by:
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