- 11 Jan, 2022 4 commits
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Jim Quinlan authored
The current brcmstb driver works for Arm and Arm64. A few things are modified here for us to support MIPs as well. o There are four outbound range register groups and each directs a window of up to 128MB. Even though there are four 128MB DT "ranges" in the bmips PCIe DT node, these ranges are contiguous and are collapsed into a single range by the OF range parser. Now the driver assumes a single range -- for MIPs only -- and splits it back into 128MB sizes. o For bcm7425, the config space accesses must be 32-bit reads or writes. In addition, the 4k config space register array is missing and not used. o The registers for the upper 32-bits of the outbound window address do not exist. o Burst size must be set to 256 (this refers to an internal bus). Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Jim Quinlan authored
The code in 'arch/mips/bmips/dma.c' performed DMA mapping for inbound regions. This mapping was and is required for the Broadcom STB PCIe controller HW. This code is removed as the current 'struct device' has a @dma_range_map field which performs the same functionality by processing the "dma-ranges" DT property. Subsequently, ARCH_HAS_PHYS_TO_DMA is now unset since the dma_to_phys() and phys_to_dma() functions are removed. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Jim Quinlan authored
For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs. Not much difference between the two for the DT properties except that they have slightly different PCIe interrupt assignments. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Jim Quinlan authored
The Broadcom STB Arm and MIPs SOCs use the same PCIe controller HW, although the MIPs version is older. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 09 Jan, 2022 7 commits
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Paul Cercueil authored
Fix the following build issues: mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `FSE_buildDTable_internal': decompress.c:(.text.FSE_buildDTable_internal+0x2cc): undefined reference to `__clzdi2' mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `BIT_initDStream': decompress.c:(.text.BIT_initDStream+0x7c): undefined reference to `__clzdi2' mips64el-linux-ld: decompress.c:(.text.BIT_initDStream+0x158): undefined reference to `__clzdi2' mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `ZSTD_buildFSETable_body_default.constprop.0': decompress.c:(.text.ZSTD_buildFSETable_body_default.constprop.0+0x2a8): undefined reference to `__clzdi2' mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `FSE_readNCount_body_default': decompress.c:(.text.FSE_readNCount_body_default+0x130): undefined reference to `__ctzdi2' mips64el-linux-ld: decompress.c:(.text.FSE_readNCount_body_default+0x1a4): undefined reference to `__ctzdi2' mips64el-linux-ld: decompress.c:(.text.FSE_readNCount_body_default+0x2e4): undefined reference to `__clzdi2' mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `HUF_readStats_body_default': decompress.c:(.text.HUF_readStats_body_default+0x184): undefined reference to `__clzdi2' mips64el-linux-ld: decompress.c:(.text.HUF_readStats_body_default+0x1b4): undefined reference to `__clzdi2' mips64el-linux-ld: arch/mips/boot/compressed/decompress.o: in function `ZSTD_DCtx_getParameter': decompress.c:(.text.ZSTD_DCtx_getParameter+0x60): undefined reference to `__clzdi2' Fixes: a510b616 ("MIPS: Add support for ZSTD-compressed kernels") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Nick Terrell <terrelln@fb.com> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Florian Fainelli authored
Add support for the Netgear WN2500 RP v1 and v2 Wi-Fi range extenders based on the BCM5357 chipset and supporting 802.11n and 802.11ac. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Florian Fainelli authored
Add support for the Netgear R6300 v1 Wi-Fi router using a Broadcom BCM4706 chipset and supporting 802.11n and 802.11ac. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Florian Fainelli authored
Add the definitions for the buttons and LEDs used on the Asus RTN-10U router. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Florian Fainelli authored
This router is based on a Broadcom BCM4717A1 chipset and supports 802.11n Wi-Fi. Add a board entry for that router and register LEDs and buttons accordingly. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Florian Fainelli authored
Update the buttons registration code to register the two buttons (WPS, system rester) using the existing BCM47XX_BOARD_LINKSYS_WRT310NV2 board entry. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Yang Li authored
Fix following includecheck warning: ./arch/mips/include/asm/local.h: asm/asm.h is included more than once. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 05 Jan, 2022 5 commits
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Huang Pei authored
all that "asm/llsc.h" does is just to help inline asm, which can be stringifyed from "asm/asm.h" +. Since "asm/asm.h" has all we need, retire "asm/llsc.h" +. remove unused header file Inspired-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Huang Pei <huangpei@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Huang Pei authored
+. remove "asm/war.h" since R10000_LLSC_WAR became a config option +. clean up Suggested-by: Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by: Huang Pei <huangpei@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Huang Pei authored
Use "daddu/dsubu" for long int on MIPS64 instead of "addu/subu" Fixes: 7232311e ("local_t: mips extension") Signed-off-by: Huang Pei <huangpei@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Minghao Chi authored
Return value from rt3883_pci_r32() directly instead of taking this in another redundant variable. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by: CGEL ZTE <cgel.zte@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Yang Yingliang authored
This node pointer is returned by of_find_compatible_node() with refcount incremented in ls2k_reset_init(). Calling of_node_put() to aovid the refcount leak. Fixes: 7eb7819a ("MIPS: Loongson64: Add Loongson-2K1000 reset platform driver") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 02 Jan, 2022 11 commits
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YunQiang Su authored
If this option is not 0x0, it will be used for zboot load address. Otherwise, the result of calc_vmlinuz_load_addr will be used. The zload-y value for generic are also removed then, as the current value breaks booting on qemu -M boston. The result of calc_vmlinuz_load_addr works well for most of cases. The default value of bcm47xx keeps as it currently. Signed-off-by: YunQiang Su <yunqiang.su@cipunited.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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YunQiang Su authored
vmlinux.gz.itb should be appended to all-$(CONFIG_MIPS_GENERIC) instead of replacing. Otherwise, no vmlinuz will be built. Signed-off-by: YunQiang Su <yunqiang.su@cipunited.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Tiezhu Yang authored
When debug sigaltstack(), copy_siginfo_to_user() fails first in setup_rt_frame() if the alternate signal stack is too small, so it should return immediately if call fails, no need to call the following functions. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Tiezhu Yang authored
If a process uses alternative signal stack by using sigaltstack(), then that stack overflows and stack wraparound occurs. Simple Explanation: The accurate sp order is A,B,C,D,... But now the sp points to A,B,C and A,B,C again. This problem can reproduce by the following code: $ cat test_sigaltstack.c #include <stdio.h> #include <signal.h> #include <stdlib.h> #include <string.h> volatile int counter = 0; void print_sp() { unsigned long sp; __asm__ __volatile__("move %0, $sp" : "=r" (sp)); printf("sp = 0x%08lx\n", sp); } void segv_handler() { int *c = NULL; print_sp(); counter++; printf("%d\n", counter); if (counter == 23) abort(); *c = 1; // SEGV } int main() { int *c = NULL; char *s = malloc(SIGSTKSZ); stack_t stack; struct sigaction action; memset(s, 0, SIGSTKSZ); stack.ss_sp = s; stack.ss_flags = 0; stack.ss_size = SIGSTKSZ; if (sigaltstack(&stack, NULL)) { printf("Failed to use sigaltstack!\n"); return -1; } memset(&action, 0, sizeof(action)); action.sa_handler = segv_handler; action.sa_flags = SA_ONSTACK | SA_NODEFER; sigemptyset(&action.sa_mask); sigaction(SIGSEGV, &action, NULL); *c = 0; //SEGV if (!s) free(s); return 0; } $ gcc test_sigaltstack.c -o test_sigaltstack $ ./test_sigaltstack sp = 0x120015c80 1 sp = 0x120015900 2 sp = 0x120015580 3 sp = 0x120015200 4 sp = 0x120014e80 5 sp = 0x120014b00 6 sp = 0x120014780 7 sp = 0x120014400 8 sp = 0x120014080 9 sp = 0x120013d00 10 sp = 0x120015c80 11 # wraparound occurs! the 11nd output is same as 1st. sp = 0x120015900 12 sp = 0x120015580 13 sp = 0x120015200 14 sp = 0x120014e80 15 sp = 0x120014b00 16 sp = 0x120014780 17 sp = 0x120014400 18 sp = 0x120014080 19 sp = 0x120013d00 20 sp = 0x120015c80 21 # wraparound occurs! the 21nd output is same as 1st. sp = 0x120015900 22 sp = 0x120015580 23 Aborted With this patch: $ ./test_sigaltstack sp = 0x120015c80 1 sp = 0x120015900 2 sp = 0x120015580 3 sp = 0x120015200 4 sp = 0x120014e80 5 sp = 0x120014b00 6 sp = 0x120014780 7 sp = 0x120014400 8 sp = 0x120014080 9 Segmentation fault If we are on the alternate signal stack and would overflow it, don't. Return an always-bogus address instead so we will die with SIGSEGV. This patch is similar with commit 83bd0102 ("x86: protect against sigaltstack wraparound"). Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Randy Dunlap authored
The MIPS BMC63XX subarch does not provide/support clk_set_parent(). This causes build errors in a few drivers, so add a simple implementation of that function so that callers of it will build without errors. Fixes these build errors: ERROR: modpost: "clk_set_parent" [sound/soc/jz4740/snd-soc-jz4740-i2s.ko] undefined! ERROR: modpost: "clk_set_parent" [sound/soc/atmel/snd-soc-atmel-i2s.ko] undefined! Fixes: e7300d04 ("MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs." ) Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Randy Dunlap authored
Provide a simple implementation of clk_set_parent() in the lantiq subarch so that callers of it will build without errors. Fixes these build errors: ERROR: modpost: "clk_set_parent" [sound/soc/jz4740/snd-soc-jz4740-i2s.ko] undefined! ERROR: modpost: "clk_set_parent" [sound/soc/atmel/snd-soc-atmel-i2s.ko] undefined! Fixes: 171bb2f1 ("MIPS: Lantiq: Add initial support for Lantiq SoCs") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> --to=linux-mips@vger.kernel.org --cc="John Crispin <john@phrozen.org>" --cc="Jonathan Cameron <jic23@kernel.org>" --cc="Russell King <linux@armlinux.org.uk>" --cc="Andy Shevchenko <andy.shevchenko@gmail.com>" --cc=alsa-devel@alsa-project.org --to="Thomas Bogendoerfer <tsbogend@alpha.franken.de>" Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Qing Zhang authored
Switch the DT binding to a YAML schema to enable the DT validation. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Qing Zhang authored
The module is now supported, enable it. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Qing Zhang authored
Add power management register operations to support reboot and poweroff. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Thomas Bogendoerfer authored
After removal of RBTX4939 board support remove code for the TX4939 SoC. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
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Thomas Bogendoerfer authored
No active MIPS user own this board, so let's remove it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
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- 21 Dec, 2021 3 commits
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Sander Vanheule authored
In addition to CPS SMP setups, also try to initialise MT SMP setups with multiple VPEs per CPU core. CMP SMP support is not provided as it is considered deprecated. Additionally, rework the code by dropping the err variable and make it similar to how other platforms perform this initialisation. Co-developed-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Sander Vanheule authored
Verify that the current CPU actually supports multi-threading before registering MT SMP ops, instead of unconditionally registering them if the kernel is compiled with CONFIG_MIPS_MT_SMP. Suggested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Tianjia Zhang authored
A large number of the following errors is reported when compiling with clang: cvmx-bootinfo.h:326:3: error: adding 'int' to a string does not append to the string [-Werror,-Wstring-plus-int] ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ~~~^~~~ cvmx-bootinfo.h:326:3: note: use array indexing to silence this warning cvmx-bootinfo.h:321:20: note: expanded from macro 'ENUM_BRD_TYPE_CASE' case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ ^ Follow the prompts to use the address operator '&' to fix this error. Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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- 16 Dec, 2021 10 commits
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Ye Guojin authored
This was found by coccicheck: ./arch/mips/cavium-octeon/octeon-platform.c, 332, 1-7, ERROR missing put_device; call of_find_device_by_node on line 324, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-platform.c, 395, 1-7, ERROR missing put_device; call of_find_device_by_node on line 387, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-usb.c, 512, 3-9, ERROR missing put_device; call of_find_device_by_node on line 515, but without a corresponding object release within this function. ./arch/mips/cavium-octeon/octeon-usb.c, 543, 1-7, ERROR missing put_device; call of_find_device_by_node on line 515, but without a corresponding object release within this function. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Ye Guojin <ye.guojin@zte.com.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Jason Wang authored
The strlcpy should not be used because it doesn't limit the source length. As linus says, it's a completely useless function if you can't implicitly trust the source string - but that is almost always why people think they should use it! All in all the BSD function will lead some potential bugs. But the strscpy doesn't require reading memory from the src string beyond the specified "count" bytes, and since the return value is easier to error-check than strlcpy()'s. In addition, the implementation is robust to the string changing out from underneath it, unlike the current strlcpy() implementation. Thus, We prefer using strscpy instead of strlcpy. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
Commit d4a451d5 ("arch: remove the ARCH_PHYS_ADDR_T_64BIT config symbol") removes config ARCH_PHYS_ADDR_T_64BIT with all instances of that config refactored appropriately. Since then, it is recommended to use the config PHYS_ADDR_T_64BIT instead. Commit 171543e7 ("MIPS: Disallow CPU_SUPPORTS_HUGEPAGES for XPA,EVA") introduces the expression "!(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))" for config CPU_SUPPORTS_HUGEPAGES, which unintentionally refers to the non-existing symbol ARCH_PHYS_ADDR_T_64BIT instead of the intended PHYS_ADDR_T_64BIT. Fix this Kconfig reference to the intended PHYS_ADDR_T_64BIT. This issue was identified with the script ./scripts/checkkconfigsymbols.py. I then reported it on the mailing list and Paul confirmed the mistake in the linked email thread. Link: https://lore.kernel.org/lkml/H8IU3R.H5QVNRA077PT@crapouillou.net/Suggested-by: Paul Cercueil <paul@crapouillou.net> Fixes: 171543e7 ("MIPS: Disallow CPU_SUPPORTS_HUGEPAGES for XPA,EVA") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
The patch series "Remove support for TX49xx" (see Link) was only partially applied: The ASoC driver was removed with commit a8644292 ("ASoC: txx9: Remove driver"), which was patch 10/10 from that series. The mips architecture code to be removed with patch 1/10 from that series was not applied. This partial patch series application leaves the build config setup and code in the mips architecture in a slightly unclean, intermediate state. The configs HAS_TXX9_ACLC and SND_SOC_TXX9ACLC were removed, but are still referenced in the txx9-architecture Kconfig and generic setup. The script ./scripts/checkkconfigsymbols.py warns about this: HAS_TXX9_ACLC Referencing files: arch/mips/txx9/Kconfig SND_SOC_TXX9ACLC Referencing files: arch/mips/txx9/generic/setup.c Clean up the code for those removed references. Link: https://lore.kernel.org/all/20210105140305.141401-1-tsbogend@alpha.franken.de/Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
In ./arch/mips/alchemy/common/gpiolib.c, the comment points out certain build constraints on CONFIG_GPIOLIB and CONFIG_ALCHEMY_GPIO_INDIRECT. The commit 832f5dac ("MIPS: Remove all the uses of custom gpio.h") makes all mips machines use the common gpio.h and removes the config ALCHEMY_GPIO_INDIRECT. So, this makes the comment in alchemy's gpiolib.c historic and obsolete, and can be removed after the commit above. The issue on the reference to a non-existing Kconfig symbol was identified with ./scripts/checkkconfigsymbols.py. This script has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, remove the historic comment to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
Commit 18d84e2e ("MIPS: make CPU_HAS_LOAD_STORE_LR opt-out") replaced the config CPU_HAS_LOAD_STORE_LR by the config with an inverted semantics, making the "LOAD_STORE_LR" cpu configuration the default. The ./arch/mips/Kconfig was adjusted accordingly. Later, commit 65ce6197 ("Revert "MIPS: Remove unused R4300 CPU support"") reintroduces a select CPU_HAS_LOAD_STORE_LR through its revert commit, restoring the config CPU_R4300 in ./arch/mips/Kconfig before the refactoring above. This select however now refers to a non-existing config and is further unneeded, as LOAD_STORE_LR is the default now. Remove the obsolete select for the reintroduced mips R4300 architecture. This issue is identified with ./scripts/checkkconfigsymbols.py. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
The comment refers to CONFIG_CPU_32BIT, but the ifdef uses CONFIG_32BIT. As this ifdef and comment was introduced with initial mips-kgdb commit 88547001 ("[MIPS] kgdb: add arch support for the kernel's kgdb core"), it is probably just a minor issue that was overlooked during the patch creation and refactoring before submission. This inconsistency was identified with ./scripts/checkkconfigsymbols.py. This script has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, adjust the comment to the actual ifdef condition to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
The config for MIPS R4000-series processors is named CPU_R4X00 with upper-case X, not CPU_R4x00 as the error message suggests. Hence, ./scripts/checkkconfigsymbols.py reports this invalid reference: CPU_R4x00 Referencing files: arch/mips/dec/prom/init.c When human users encounter this error message, they probably just deal with this minor discrepancy; so, the spelling never was a big deal here. Still, the script ./scripts/checkkconfigsymbols.py has been quite useful to identify a number of bugs with Kconfig symbols and deserves to be executed and checked regularly. So, repair the error message to reduce the reports made the script and simplify to use this script, as new issues are easier to spot when the list of reports is shorter. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
Commit c5eaff3e ("MIPS: Kconfig: Drop obsolete NR_CPUS_DEFAULT_{1,2} options") removed the config NR_CPUS_DEFAULT_2, as with this commit, the NR_CPUS default value is 2. Commit 7505576d ("MIPS: add support for SGI Octane (IP30)") introduces the config SGI_IP30, which selects the removed config NR_CPUS_DEFAULT_2, but this has actually no effect. Fortunately, NR_CPUS defaults to 2 when there is no specific NR_CPUS_DEFAULT_* config selected. So, the effect of the intended 'select NR_CPUS_DEFAULT_2' is achieved without further ado. Drop selecting the non-existing config NR_CPUS_DEFAULT_2. The issue was identified with ./scripts/checkkconfigsymbols.py. Fixes: 7505576d ("MIPS: add support for SGI Octane (IP30)") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Lukas Bulwahn authored
Commit ab7c01fd ("mips: Add MIPS Release 5 support") adds the two configs CPU_MIPS32_R5 and CPU_MIPS64_R5, which depend on the corresponding SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R5, respectively. The config SYS_HAS_CPU_MIPS32_R5 was already introduced with commit c5b36783 ("MIPS: Add support for XPA."); the config SYS_HAS_CPU_MIPS64_R5, however, was never introduced. Hence, ./scripts/checkkconfigsymbols.py warns: SYS_HAS_CPU_MIPS64_R5 Referencing files: arch/mips/Kconfig, arch/mips/include/asm/cpu-type.h Add the definition for config SYS_HAS_CPU_MIPS64_R5 under the assumption that SYS_HAS_CPU_MIPS64_R5 follows the same pattern as the existing SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R6. Fixes: ab7c01fd ("mips: Add MIPS Release 5 support") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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