- 18 Sep, 2018 25 commits
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Andy Shevchenko authored
Since the driver can't be compiled as a module, there is no need to use no-op macros in the code. Thus, remove unneeded MODULE_DEVICE_TABLE() macro from the driver. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
We now using a common macro for PM operations in pin control drivers for Intel SoCs, and since that macro relies on the definition and macro from linux/pm.h header file, it's logical to include it directly in pinctrl-intel.h. Otherwise it's a bit fragile and requires a proper ordering of header inclusion in C files. Signed-off-by:
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Linus Walleij authored
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Sean Wang authored
Just add eint support to MT8183 pinctrl driver as usual as happens on the other SoCs. Signed-off-by:
Sean Wang <sean.wang@mediatek.com> Signed-off-by:
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Sean Wang authored
Almost all MediaTek SoCs apply the exact same logic to build eint, so move the common functions into pinctrl-mtk-common-v2.c to allow each new pinctrl driver to reuse them. Also, add a protection checker on hw->soc->eint_hw to avoid invalid memory access when there's certain SoC not to define its eint_hw properly in the code flow. Signed-off-by:
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Zhiyong Tao authored
This patch provides the advanced pull for I2C used pins on MT8183. Signed-off-by:
Zhiyong Tao <zhiyong.tao@mediatek.com> Signed-off-by:
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Sean Wang authored
Extend the advanced pull based on the legacy bias plus additional r0 and r1 to tweak the resistor level. Signed-off-by:
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Zhiyong Tao authored
Add MT8183 pinctrl driver based on MediaTek pinctrl-paris core. Signed-off-by:
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Zhiyong Tao authored
Add pinctrl-paris core that implements vendor dt-binding which MediaTek tablet, box and smartphone-based SoCs such as MT81xx, MT27xx, and MT67xx SoCs really want to depend on. The driver is just completely rewritten according to pinctrl-mtk-common.c but uses the new logic from pinctrl-mtk-common-v2.c to have an elegant way to support new SoCs in the future. Signed-off-by:
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Sean Wang authored
Because the pincrl-mtk-common.c is an implementation for per-pin binding, its pin descriptor includes more information than pinctrl-mtk-common-v2 so far can support. So, we complement these data before writing a driver using pincrl-mtk-common-v2.c for per-pin binding. By the way, the size of struct mtk_pin_desc would be larger than struct pinctrl_pin_desc can hold, so it's necessary to have a copy before the pins information is being registered into the core. Signed-off-by:
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Sean Wang authored
It's usual and not an error for there's some register not supported by a certain SoC or a pin so that in the case we have to adjust the message to print and the error code to get rid of unnecessary false alarm. Signed-off-by:
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Sean Wang authored
Certain SoC own multiple register base for accessing each pin groups, it's easy to be done with extend struct mtk_pin_field_calc to support the kind of SoC such as MT8183. Signed-off-by:
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Sean Wang authored
all use pin descriptor instead in pinctrl-mtk-common-v2.c for the consistency and extensibility. Signed-off-by:
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Sean Wang authored
Adding MT7623 pinctrl driver based on generic pinctrl binding, that is good example and demonstrates how to port any other MediaTek SoCs pinctrl-moore core when people really would like to use the generic pinctrl binding to support these MediaTek SoCs. Signed-off-by:
Ryder Lee <ryder.lee@mediatek.com> Signed-off-by:
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Sean Wang authored
Certain SoCs have to program an extra PULLEN, PULLSEL register to configure bias related function so that we add it in the existing path. Signed-off-by:
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Sean Wang authored
Certain SoCs have to program an extra IES register to configure input enabled mode so that we add it in the existing path as an option. Signed-off-by:
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Sean Wang authored
There are some specific pins (i.e. MMC/SD) need specific registers to turn on/off the 10K & 50k(75K) resistors when pull up/down. Therefore, this patch adds the custom prarmeters so that the user could control it through device tree. Signed-off-by:
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Sean Wang authored
Put pull control support related functions to pinctrl-mtk-common-v2.c as these operations might be different by chips and allow different type of driver to reuse them. Signed-off-by:
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Sean Wang authored
Certain SoCs have to program DRV register to configure driving strength so that we add it in the existing path as an option. Signed-off-by:
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Sean Wang authored
Put driving strength support related functions to pinctrl-mtk-common-v2.c as these operations might be different by chips and allow different type of driver to reuse them. Signed-off-by:
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Sean Wang authored
Add two parameters gpio_m and eint_m for configuring GPIO mode and EINT mode, they might be varying depend on SoC. Signed-off-by:
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Sean Wang authored
This patch introduces a data structure mtk_pin_desc, which is used to provide information per pin characteristic such as driving current, eint number and a driving index, that is used to lookup table describing the details about the groups of driving current by which the pin is able to adjust the driving strength so that the driver could get the appropriate driving group when calls .pin_config_get()/set(). Signed-off-by:
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Sean Wang authored
This patch adds members sz_reg fixed in struct mtk_pin_field_calc - The 'fixed' is used to represent the consecutive pins share the same bits within the same register with the 1st pin so that it can largely reduce the entry size a bit. - The 'sz_reg' is used to indicate the range of bits we use in a register that may vary by SoC The above changes make the code more generic and this is useful as there might be other existing or future chips all use the same logic to access their register set and then being a little more abstract could help in the long run. Signed-off-by:
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Sean Wang authored
Add a generic driver pinctrl-moore.c for MT762x SoC and any other SoC that would like to use generic dt-binding. The patch is furtherly refactored from pinctrl-mt7622.c that totally uses the functions back by the generic pinctrl core such as GENERIC_PINCONF, GENERIC_PINCTRL_GROUPS, and GENERIC_PINMUX_FUNCTIONS and its binding also completely follows up pinctrl-bindings.txt in Documentation/devicetree/bindings/pinctrl/ to implement. Signed-off-by:
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Sean Wang authored
Irregular register arrangement and distinct logic access from various MediaTek SoCs would cause pinctrl-mtk-common to bloat and really hard to maintain in the future so that the patch creates pinctrl-mtk-common-v2 based on the core of mt7622-pinctrl. The goals pinctrl-mtk-common-v2 want to achieve are to hopefully support all of MediaTek SoCs, and two kinds of dt-bindings being supported, Linux generic pinctrl dt-binding mt7622 supports and MediaTek per-pin dt-binding the other SoCs support the MT8183 and MT6765 incline to make use of. The patch starts to refactor MT7622 pinctrl driver first with splitting out these portable ways from there such as table-based register operation and drive strength control that is common in both kinds of driver. Signed-off-by:
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- 14 Sep, 2018 3 commits
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Linus Walleij authored
These drivers are GPIO drivers, and the do not need to use the legacy header in <linux/gpio.h>, go directly for <linux/gpio/driver.h> instead. Replace any use of GPIOF_* with 0/1, these flags are for consumers, not drivers. Get rid of a few gpio_to_irq() users that was littering around the place, use local callbacks or avoid using it at all. Signed-off-by: -
Linus Walleij authored
By just moving the atmel_gpio_to_irq() and calling the internal function we can get rid of the driver calling back out into the deprecated external consumer API. Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by:
Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by:
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Ludovic Desroches authored
Sharing the same irqchip with multiple gpiochips is not a good practice. For instance, when installing hooks, we change the state of the irqchip. The initial state of the irqchip for the second gpiochip to register is then disrupted. Signed-off-by:
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- 13 Sep, 2018 1 commit
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Dan Carpenter authored
Smatch complains about this condition: if (has_config && num_pins >= 1) The "has_config" variable is either uninitialized or true. The "num_pins" variable is unsigned and we verified that it is non-zero on the lines before so we know "num_pines >= 1" is true. Really, we could just check "num_configs" directly and remove the "has_config" variable. Fixes: 77618084 ("pinctrl: introduce driver for Atmel PIO4 controller") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Acked-by:
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- 10 Sep, 2018 1 commit
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Stephen Boyd authored
It looks like we parse the drive strength setting here, but never actually write it into the hardware to update it. Parse the setting and then write it at the end of the pinconf setting function so that it actually sticks in the hardware. Fixes: 0e948042 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode") Cc: Doug Anderson <dianders@chromium.org> Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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- 05 Sep, 2018 3 commits
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/pinctrl/sirf/pinctrl-atlas7.c: In function 'atlas7_pinmux_resume_noirq': drivers/pinctrl/sirf/pinctrl-atlas7.c:5545:6: warning: variable 'bank' set but not used [-Wunused-but-set-variable] u32 bank; drivers/pinctrl/sirf/pinctrl-atlas7.c:5543:28: warning: variable 'conf' set but not used [-Wunused-but-set-variable] struct atlas7_pad_config *conf; Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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Douglas Anderson authored
If you look at "pinconf-groups" in debugfs for ssbi-mpp you'll notice it looks like nonsense. The problem is fairly well described in commit 1cf86bc2 ("pinctrl: qcom: spmi-gpio: Fix pmic_gpio_config_get() to be compliant") and commit 05e0c828 ("pinctrl: msm: Fix msm_config_group_get() to be compliant"), but it was pointed out that ssbi-mpp has the same problem. Let's fix it there too. NOTE: in case it's helpful to someone reading this, the way to tell whether to do the -EINVAL or not is to look at the PCONFDUMP for a given attribute. If the last element (has_arg) is false then you need to do the -EINVAL trick. ALSO NOTE: it seems unlikely that the values returned when we try to get PIN_CONFIG_BIAS_PULL_UP will actually be printed since "has_arg" is false for that one, but I guess it's still fine to return different values so I kept doing that. It seems like another driver (ssbi-gpio) uses a custom attribute (PM8XXX_QCOM_PULL_UP_STRENGTH) for something similar so maybe a future change should do that here too. Fixes: cfb24f6e ("pinctrl: Qualcomm SPMI PMIC MPP pin controller driver") Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Stephen Boyd <sboyd@kernel.org> Reviewed-by:
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Douglas Anderson authored
If you look at "pinconf-groups" in debugfs for ssbi-gpio you'll notice it looks like nonsense. The problem is fairly well described in commit 1cf86bc2 ("pinctrl: qcom: spmi-gpio: Fix pmic_gpio_config_get() to be compliant") and commit 05e0c828 ("pinctrl: msm: Fix msm_config_group_get() to be compliant"), but it was pointed out that ssbi-gpio has the same problem. Let's fix it there too. Fixes: b4c45fe9 ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers") Signed-off-by:
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- 31 Aug, 2018 7 commits
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Linus Walleij authored
Merge tag 'sh-pfc-for-v4.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 - Add SATA and audio pin groups on R-Car M3-N, - Add EtherAVB pin groups on RZ/G1C, - Add PWM and display (DU) pin groups on R-Car E3, - Add support for the new RZ/G2M (r8a774a1) SoC.
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Igor Stoppa authored
WARN_ON() already contains an unlikely(), so it's not necessary to wrap it into another. Signed-off-by:
Igor Stoppa <igor.stoppa@huawei.com> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Andy Shevchenko authored
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by:
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Andy Shevchenko authored
Instead of open coding same structure definition for PM operations, replace it with a common macro. No functional change intended. Signed-off-by:
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