- 18 Sep, 2022 21 commits
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Dmitry Baryshkov authored
Using IS_ERR_OR_NULL() together with PTR_ERR() is a typical mistake. If the value is NULL, then the function will return 0 instead of a proper return code. Moreover dpu_hw_vbif_init() function can not return NULL. So, replace corresponding IS_ERR_OR_NULL() call with IS_ERR(). Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/489570/ Link: https://lore.kernel.org/r/20220615125703.24647-2-dmitry.baryshkov@linaro.orgSigned-off-by:
Rob Clark <robdclark@chromium.org>
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Dmitry Baryshkov authored
Remove loops over hw_vbif. Instead always VBIF's idx as an index in the array. This fixes an error in dpu_kms_hw_init(), where we fill dpu_kms->hw_vbif[i], but check for an error pointer at dpu_kms->hw_vbif[vbif_idx]. Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support") Signed-off-by:
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Dmitry Baryshkov authored
The commit 6874f48b ("drm/msm: make mdp5/dpu devices master components") changed the MDP5 driver to look for the interconnect paths in the MDSS device rather than in the MDP5 device itself. This was left unnoticed since on my testing devices the interconnects probably didn't reach the sync state. Rather than just using the MDP5 device for ICC path lookups for the MDP5 devices, introduce an additional helper to check both MDP5/DPU and MDSS nodes. This will be helpful for the MDP5->DPU conversion, since the driver will have to check both nodes. Fixes: 6874f48b ("drm/msm: make mdp5/dpu devices master components") Reported-by:
Marijn Suijten <marijn.suijten@somainline.org> Reported-by:
Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by:
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Krzysztof Kozlowski authored
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 3d7a0dd8 ("dt-bindings: msm: disp: add yaml schemas for DPU bindings") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 57fd4f34 ("dt-bindings: msm: add DT bindings for sc7280") Signed-off-by:
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Krzysztof Kozlowski authored
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 3d7a0dd8 ("dt-bindings: msm: disp: add yaml schemas for DPU bindings") Signed-off-by:
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Krzysztof Kozlowski authored
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 164f69d9 ("dt-bindings: msm: disp: add yaml schemas for QCM2290 DPU bindings") Signed-off-by:
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Krzysztof Kozlowski authored
The 'display-controller' child (DPU) of Display SubSystem (MDSS) uses opp-table, so reference it which allows restricting DPU schema to fixed list of properties. Fixes: 6e986a8f ("dt-bindings: display: msm: Add binding for msm8998 dpu") Signed-off-by:
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Dmitry Baryshkov authored
APQ8064, the only supported mdp4 platform, uses 4 IOMMUs for the MDP4 device. Update schema accordingly. When we have other MDP4 platforms, this spec can be updated accordingly. Signed-off-by:
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Dmitry Baryshkov authored
Make display/msm/gmu.yaml describe all existing GMU variants rather than just the 630.2 (SDM845) version of it. Signed-off-by:
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Dmitry Baryshkov authored
Different platforms require different amounts of IOMMUs. The APQ8064 uses 64 IOMMU instances for GPU, adjust the schema accordingly. Signed-off-by:
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Dmitry Baryshkov authored
There is no need to use the struct msm_display_dsc_config wrapper inside the dsi driver, use the struct drm_dsc_config directly to pass pps data. Signed-off-by:
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Dmitry Baryshkov authored
There is no need to use the struct msm_display_dsc_config wrapper inside the dpu driver, use the struct drm_dsc_config directly to pass pps data. Signed-off-by:
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Rob Clark authored
If the previous thing cat'ing $debugfs/rd left the FIFO full, then subsequent open could deadlock in rd_write() (because open is blocked, not giving a chance for read() to consume any data in the FIFO). Also it is generally a good idea to clear out old data from the FIFO. Signed-off-by:
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Bjorn Andersson authored
In the event that devm_devfreq_add_device() fails the device's qos freq list is left referencing df->idle_freq and df->boost_freq. Attempting to initialize devfreq again after a probe deferral will then cause invalid memory accesses in dev_pm_qos_add_request(). Fix this by dropping the requests in the error path. Fixes: 7c0ffcd4 ("drm/msm/gpu: Respect PM QoS constraints") Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Rob Clark <robdclark@gmail.com> Reviewed-by:
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Douglas Anderson authored
1 regulator is listed but the number 2 is specified. This presumably means we try to get a regulator with no name. Fix it. Fixes: 462f7017 ("drm/msm/dsi: Fix DSI and DSI PHY regulator config from SDM660") Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
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Douglas Anderson authored
3 regulators are listed but the number 2 is specified. Fix it. Fixes: 3a3ff88a ("drm/msm/dsi: Add 8x96 info in dsi_cfg") Signed-off-by:
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Kuogee Hsieh authored
Data Symbols scrambled is required for tps4 at link training 2. Therefore SCRAMBLING_DISABLE bit should not be set for tps4 to work. RECOVERED_CLOCK_OUT_EN is for enable simple EYE test for jitter measurement with minimal equipment for embedded applications purpose and is not required to be set during normal operation. Current implementation always have RECOVERED_CLOCK_OUT_EN bit set which cause SCRAMBLING_DISABLE bit wrongly set at tps4 which prevent tps4 from working. This patch delete setting RECOVERED_CLOCK_OUT_EN to fix SCRAMBLING_DISABLE be wrongly set at tps4. Changes in v2: -- fix Fixes tag Changes in v3: -- revise commit text Changes in v4: -- fix commit text newline Changes in v5: -- fix commit text line over 75 chars Fixes: c943b494 ("drm/msm/dp: add displayPort driver support") Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
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Abhinav Kumar authored
dpu_encoder_helper_phys_cleanup() was not populating neither wb or intf to the intf_cfg before calling the reset_intf_cfg(). This causes the reset of the active bits of wb/intf to be skipped which is incorrect. Fix this by populating the relevant wb or intf indices correctly. Fixes: ae4d721c ("drm/msm/dpu: add an API to reset the encoder related hw blocks") Signed-off-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # Trogdor (SC8170) Patchwork: https://patchwork.freedesktop.org/patch/494298/ Link: https://lore.kernel.org/r/1657912468-17254-1-git-send-email-quic_abhinavk@quicinc.comSigned-off-by:
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sunliming authored
Fix the inconsistent indenting in function msm_dsi_dphy_timing_calc_v3(). Fix the following smatch warnings: drivers/gpu/drm/msm/dsi/phy/dsi_phy.c:350 msm_dsi_dphy_timing_calc_v3() warn: inconsistent indenting Fixes: f1fa7ff4 ("drm/msm/dsi: implement auto PHY timing calculator for 10nm PHY") Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
sunliming <sunliming@kylinos.cn> Reviewed-by:
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Kuogee Hsieh authored
Some userspace presumes that the first connected connector is the main display, where it's supposed to display e.g. the login screen. For laptops, this should be the main panel. This patch call drm_helper_move_panel_connectors_to_head() after drm_bridge_connector_init() to make sure eDP stay at head of connected connector list. This fixes unexpected corruption happen at eDP panel if eDP is not placed at head of connected connector list. Changes in v2: -- move drm_helper_move_panel_connectors_to_head() to dpu_kms_drm_obj_init() Changes in v4: -- move drm_helper_move_panel_connectors_to_head() to msm_drm_init() Signed-off-by:
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- 01 Sep, 2022 1 commit
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Akhil P Oommen authored
When prepare-slumber hfi fails, we should follow a6xx_gmu_force_off() sequence. Signed-off-by:
Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/498401/ Link: https://lore.kernel.org/r/20220819015030.v5.7.I54815c7c36b80d4725cd054e536365250454452f@changeidSigned-off-by:
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- 28 Aug, 2022 10 commits
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Akhil P Oommen authored
We can do a few more things to improve our chance at a successful gpu recovery, especially during a hangcheck timeout: 1. Halt CP and GMU core 2. Do RBBM GBIF HALT sequence 3. Do a soft reset of GPU core Signed-off-by:
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Akhil P Oommen authored
Because there could be transient votes from other drivers/tz/hyp which may keep the cx gdsc enabled, we should poll until cx gdsc collapses. We can use the reset framework to poll for cx gdsc collapse from gpucc clk driver. This feature requires support from the platform's gpucc driver. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Patchwork: https://patchwork.freedesktop.org/patch/498397/ Link: https://lore.kernel.org/r/20220819015030.v5.5.I176567525af2b9439a7e485d0ca130528666a55c@changeidSigned-off-by:
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Akhil P Oommen authored
There are some hardware logic under CX domain. For a successful recovery, we should ensure cx headswitch collapses to ensure all the stale states are cleard out. This is especially true to for a6xx family where we can GMU co-processor. Currently, cx doesn't collapse due to a devlink between gpu and its smmu. So the *struct gpu device* needs to be runtime suspended to ensure that the iommu driver removes its vote on cx gdsc. Signed-off-by:
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Akhil P Oommen authored
In the scenario where there is one a single submit which is hung, gpu is power collapsed when it is retired. Because of this, by the time we call reover(), gpu state would be already clear. Fix this by correctly managing the pm runtime votes. Signed-off-by:
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Akhil P Oommen authored
Instead of separate refcount for each submit, take single rpm refcount on behalf of all the submits. This makes it easier to drop the rpm refcount during recovery in an upcoming patch. Signed-off-by:
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Akhil P Oommen authored
We already enable gpu power from msm_gpu_submit(), so avoid a duplicate pm_runtime_get/put from msm_job_run(). Signed-off-by:
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Rob Clark authored
Replace some open coding to improve readability. Signed-off-by:
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Rob Clark authored
Using map_pages/unmap_pages cuts down on the # of pgtable walks needed in the process of finding where to insert/remove an entry. The end result is ~5-10x faster than mapping a single page at a time. v2: Rename iommu_pgsize(), drop obsolete comments, fix error handling in msm_iommu_pagetable_map() Signed-off-by:Sai Prakash Ranjan <quic_saipraka@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/498892/ Link: https://lore.kernel.org/r/20220823163719.90399-1-robdclark@gmail.com
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Rob Clark authored
Intended as a way to trigger error paths in mesa. Signed-off-by:
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Rob Clark authored
Utilize the power of lockdep for our GEM locking related sanity checking. Signed-off-by:
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- 27 Aug, 2022 8 commits
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Rob Clark authored
All use of msm_gem_is_locked() is just for WARN_ON()s, so extract out into an msm_gem_assert_locked() patch. Signed-off-by:
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Rob Clark authored
If we are under enough memory pressure, we should stall waiting for active buffers to become idle in order to evict. v2: Check for __GFP_ATOMIC before blocking Signed-off-by:
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Rob Clark authored
Combine separate trace events for purge vs evict into one. When we add support for purging/evicting active buffers we'll just add more info into this one trace event, rather than adding a bunch more events. Signed-off-by:
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Rob Clark authored
We've already attached the fences, so obj->resv (which shrinker checks) tells us whether they are still active. So we can unpin sooner, before we drop the queue lock. This also avoids the need to grab the obj lock in the retire path, avoiding potential for lock contention between submit and retire. Signed-off-by:
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Rob Clark authored
This converts over to use the shared GEM LRU/shrinker helpers. Note that it means we are no longer tracking purgeable or willneed buffers that are active separately. But the most recently pinned buffers should be at the tail of the various LRUs, and the shrinker is already prepared to encounter objects which are still active. Signed-off-by:
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Rob Clark authored
Add a simple LRU helper to assist with driver's shrinker implementation. It handles tracking the number of backing pages associated with a given LRU, and provides a helper to implement shrinker_scan. A driver can use multiple LRU instances to track objects in various states, for example a dontneed LRU for purgeable objects, a willneed LRU for evictable objects, and an unpinned LRU for objects without backing pages. All LRUs that the object can be moved between must share a single lock. v2: lockdep_assert_held() instead of WARN_ON(!mutex_is_locked()) v3: make drm_gem_lru_move_tail_locked() static until there is a user Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by:
Dmitry Osipenko <dmitry.osipenko@collabora.com> Patchwork: https://patchwork.freedesktop.org/patch/496128/ Link: https://lore.kernel.org/r/20220802155152.1727594-10-robdclark@gmail.com
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Rob Clark authored
At this point the pinned refcnt is sufficient, and the shrinker is already prepared to encounter objects which are still active according to fences attached to the resv. Signed-off-by:
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Rob Clark authored
Avoid having multiple spots where we increment/decrement pin_count (and associated LRU updating) Signed-off-by:
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