- 07 Dec, 2022 40 commits
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Adrian Hunter authored
To avoid glitches on the clock line, the card clock is disabled when making timing changes. Do not do that separately for HISPD and UHS settings. Tested-by:
Haibo Chen <haibo.chen@nxp.com> Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20221128133259.38305-4-adrian.hunter@intel.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Michael Wu authored
Current next_tag selection will cause a large delay in some requests and destroy the scheduling results of the block scheduling layer. Because the issued mrq tags cannot ensure that each time is sequential, especially when the IO load is heavy. In the fio performance test, we found that 4k random read data was sent to mmc_hsq to start calling request_atomic It takes nearly 200ms to process the request, while mmc_hsq has processed thousands of other requests. So we use fifo here to ensure the first in, first out feature of the request and avoid adding additional delay to the request. Reviewed-by:
Wenchao Chen <wenchao.chen@unisoc.com> Signed-off-by:
Michael Wu <michael@allwinnertech.com> Link: https://lore.kernel.org/r/20221128093847.22768-1-michael@allwinnertech.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Jiasheng Jiang authored
As the alloc_ordered_workqueue may return NULL pointer, it should be better to add check for the return value. Moreover, the msb->io_queue should be freed if error occurs later. Fixes: 0ab30494 ("memstick: add support for legacy memorysticks") Signed-off-by:
Jiasheng Jiang <jiasheng@iscas.ac.cn> Link: https://lore.kernel.org/r/20221126012558.34374-1-jiasheng@iscas.ac.cnSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Ye Bin authored
Now, CONFIG_DEBUG_FS is scattered in various functions, to make code clean centralized processing CONFIG_DEBUG_FS in mmc debugfs module. Signed-off-by:
Ye Bin <yebin10@huawei.com> Link: https://lore.kernel.org/r/20221126102520.2824574-1-yebin@huaweicloud.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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ChanWoo Lee authored
Replace code with the already defined function. No functional changes. Signed-off-by:
ChanWoo Lee <cw9316.lee@samsung.com> Reviewed-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20221124080031.14690-1-cw9316.lee@samsung.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yang Li authored
./drivers/mmc/host/sunplus-mmc.c:321:2-3: Unneeded semicolon Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3238Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20221123021221.9646-1-yang.lee@linux.alibaba.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Christian Löhle authored
The workaround of pretending R1B non-data transfers are data transfers in order for the busy timeout to be respected by the host controller driver is removed. It wasn't useful in a long time. Initially the workaround ensured that R1B commands did not time out by setting the data timeout to be the command timeout in commit cb87ea28 ("mmc: core: Add mmc CMD+ACMD passthrough ioctl"). This was moved inside an if-clause with idata->buf_bytes being set in commit 4d6144de ("mmc: core: check for zero length ioctl data"). Since the workaround is now inside the idata->buf_bytes clause and intended to fix R1B non-data transfers, that do not have buf_bytes set, we can remove the workaround altogether. This was dead code, since data transfers doesn't use R1B commands. Signed-off-by:
Christian Loehle <cloehle@hyperstone.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/57d4aceb25254e448bd3e575bd99b0c2@hyperstone.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Linux *_bit accessors take plain bit numbers, no need for BIT(). Fixes: c330601c ("mmc: renesas_sdhi: take DMA end interrupts into account") Reported-by:
kernel test robot <lkp@intel.com> Reported-by:
Dan Carpenter <error27@gmail.com> Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221122080554.4468-1-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Tony Huang authored
This is a patch for mmc driver for Sunplus SP7021 SOC. Supports eMMC 4.41 DDR 104MB/s speed mode. Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Tony Huang <tonyhuang.sunplus@gmail.com> Link: https://lore.kernel.org/r/c92d67596f3cc10d41585b9ab82be7da2cc4c9d8.1669023361.git.tonyhuang.sunplus@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Tony Huang authored
Add MMC YAML file for Sunplus SP7021. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Tony Huang <tonyhuang.sunplus@gmail.com> Link: https://lore.kernel.org/r/8c8fbc29524819d8ab45a4fe75311b3b7b567650.1669023361.git.tonyhuang.sunplus@gmail.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Makes the code more readable. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-5-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Add a macro to check for a quirk because it a) ensures that the check for non-empty 'quirks' struct is not forgotten and b) is easier to read. Convert existing quirk access as well. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-4-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Up to now, HS400 adjustment mode was only disabled on soft reset when a calibration table was in use. It is safer, though, to disable it as soon as the instance has an adjustment related quirk set, i.e. bad taps or a calibration table. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-3-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
We need the SCC pointer to reset the device, so populate it even when we don't need it for tuning. Fixes: 45bffc37 ("mmc: renesas_sdhi: only reset SCC when its pointer is populated") Signed-off-by:
Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by:
Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-2-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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ye xingchen authored
Replace the open-code with device_match_of_node(). Signed-off-by:
ye xingchen <ye.xingchen@zte.com.cn> Link: https://lore.kernel.org/r/202211171524116446204@zte.com.cnSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Dinh Nguyen authored
Now that the SDMMC driver supports setting the clk-phase, we can remove the need to do it in the clock driver. Acked-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20221114230217.202634-5-dinguyen@kernel.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Dinh Nguyen authored
The clock-phase settings for the SDMMC controller in the SoCFPGA platforms reside in a register in the System Manager. Add a method to access that register through the syscon interface. Signed-off-by:
Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20221114230217.202634-4-dinguyen@kernel.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Dinh Nguyen authored
Document the optional "altr,sysmgr-syscon" binding that is used to access the System Manager register that controls the SDMMC clock phase. Signed-off-by:
Dinh Nguyen <dinguyen@kernel.org> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221114230217.202634-1-dinguyen@kernel.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Charl Liu authored
When cmd->opcode == MMC_SEND_TUNING_BLOCK, the SDHCI_TRANSFER_MODE should also be kept Signed-off-by:
Charl Liu <charl.liu@bayhubtech.com> Acked-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20221111122314.307-1-charl.liu@bayhubtech.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
There is only one alignment shift for one type of Renesas SDHI. Encode it directly in its DMA driver to reduce complexity and ease further simplifications. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221102125430.28466-3-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
After a8402aed8ca5 ("mmc: tmio_mmc_core: Remove local_irq_{save,restore}() around k[un]map_atomic()") and ac91578a6812 ("mmc: tmio_mmc_core: Replace kmap_atomic() with kmap_local_page()"), the helpers contain just a single call. Putting it directly in the code makes it actually more readable. More so, because we now avoid the 'offset' calculation when mapping/unmapping and just use it when we need it in the copy routines. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221102125430.28466-2-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
So far, we have been relying on access_end interrupts only to mark DMA transfers as done implying that DMA end interrupts have occurred by then anyhow. On some SoCs under some conditions, this turned out to be not enough. So, we enable DMA interrupts as well and make sure that both events, DMA irq and access_end irq, have happened before finishing the DMA transfer. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-6-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Some early Gen3 SoCs have the DTRANEND1 bit at a different location than all later SoCs. Because we need the bit soon, add a quirk so we know which bit to use. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-5-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
We don't want to rely only on the access_end irq in the future, so implement a callback for dma irqs. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-4-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
Commit 058db286 ("mmc: tmio, renesas_sdhi: move struct tmio_mmc_dma to renesas_sdhi.h") is correct. The DMA struct should be prefixed with 'renesas_sdhi' to avoid confusion about is namespace. Fix some indentation while here. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-3-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Wolfram Sang authored
This accessor function does not help readability but makes it worse. Because I soon need to read from the registers as well and don't want to add another function like this, I chose to remove the existing one and use the accessor directly. I also switch from writeq to writel because no 64 bit register is actually involved. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by:
Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-2-wsa+renesas@sang-engineering.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
There is a case where the timeout clock is not supplied to the capability. Add a quirk for that. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by:
Jassi Brar <jaswinder.singh@linaro.org> Link: https://lore.kernel.org/r/20221111081033.3813-7-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
To use F_SDH30 for non-removable meda like eMMC, need to enable FORCE_CARD_INSERT bit to skip the delay for detection. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by:
Jassi Brar <jaswinder.singh@linaro.org> Link: https://lore.kernel.org/r/20221111081033.3813-6-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
Add a compatible string for Socionext F_SDH30_E51. Since this IP is transferred to Socionext, so append it to Copyright and MODULE_AUTHOR as vendor name. F_SDH30_E51 is a higher version of F_SDH30 that supports eMMC 5.1, though, currently there are no new features for this IP in this driver, just add the compatible string. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20221111081033.3813-5-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
Add a compatible string for F_SDH30_E51 IP to the documentation. Since this IP is transferred to Socionext, so append it as vendor name. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221111081033.3813-4-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
Add reset control support for F_SDH30 controller. This is optional. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by:
Jassi Brar <jaswinder.singh@linaro.org> Link: https://lore.kernel.org/r/20221111081033.3813-3-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Kunihiko Hayashi authored
Convert the Fujitsu SDHCI controller IP binding to DT schema format, and add resets property as optional to support reset control. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221111081033.3813-2-hayashi.kunihiko@socionext.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yu Zhe authored
spelling mistake fix : "alreay" -> "already" "checksume" -> "checksum" Signed-off-by:
Yu Zhe <yuzhe@nfschina.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221110072819.11530-1-yuzhe@nfschina.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Abel Vesa authored
Document the compatible for SDHCI on SM8550. Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-sdhci-v1-0-797864a30e71@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Konrad Dybcio authored
Document the SDHCI on SM8350. Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221116123612.34302-1-konrad.dybcio@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Konrad Dybcio authored
Document the compatible for SDHCI on SM6375. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20221114105043.36698-2-konrad.dybcio@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yang Yingliang authored
mmc_add_host() may return error, if we ignore its return value, it will lead two issues: 1. The memory that allocated in mmc_alloc_host() is leaked. 2. In the remove() path, mmc_remove_host() will be called to delete device, but it's not added yet, it will lead a kernel crash because of null-ptr-deref in device_del(). So fix this by checking the return value and goto error path which will call mmc_free_host(). Fixes: 1da177e4 ("Linux-2.6.12-rc2") Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221109133539.3275664-1-yangyingliang@huawei.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yang Yingliang authored
mmc_add_host() may return error, if we ignore its return value, it will lead two issues: 1. The memory that allocated in mmc_alloc_host() is leaked. 2. In the remove() path, mmc_remove_host() will be called to delete device, but it's not added yet, it will lead a kernel crash because of null-ptr-deref in device_del(). So fix this by checking the return value and goto error path which will call mmc_free_host(), besides, other resources also need be released. Fixes: 1da177e4 ("Linux-2.6.12-rc2") Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221109133237.3273558-1-yangyingliang@huawei.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yang Yingliang authored
mmc_add_host() may return error, if we ignore its return value, it will lead two issues: 1. The memory that allocated in mmc_alloc_host() is leaked. 2. In the remove() path, mmc_remove_host() will be called to delete device, but it's not added yet, it will lead a kernel crash because of null-ptr-deref in device_del(). Fix this by checking the return value and goto error path which will call mmc_free_host(). Fixes: f0bf7f61 ("mmc: Add new via-sdmmc host controller driver") Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221108130949.1067699-1-yangyingliang@huawei.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Yang Yingliang authored
mmc_add_host() may return error, if we ignore its return value, it will lead two issues: 1. The memory that allocated in mmc_alloc_host() is leaked. 2. In the remove() path, mmc_remove_host() will be called to delete device, but it's not added yet, it will lead a kernel crash because of null-ptr-deref in device_del(). Fix this by checking the return value and goto error path which will call mmc_free_host(). Fixes: 51c5d844 ("MMC: meson: initial support for GX platforms") Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20221108123417.479045-1-yangyingliang@huawei.comSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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