Commits · c03ff9e8fa5fc0186158b99a89f613325ff352cf · Kirill Smelkov / linux

05 Jul, 2013 2 commits
- drm/nvc0-/gr: pull out a group of separately context-switched gpc regs · c03ff9e8
  Ben Skeggs authored Jul 01, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  c03ff9e8
- drm/nvc0-/gr: make register lists from initvals functions · 30f4e087
  Ben Skeggs authored Jun 09, 2013
```
Generated context verified to be the same for all supported chipsets.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  30f4e087
01 Jul, 2013 38 commits
- drm/nvd0-/disp: handle case where display engine is missing/disabled · 791dc143
  Maarten Lankhorst authored Jun 27, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  791dc143
- drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4 · e99716f1
  Ben Skeggs authored Jun 05, 2013
```
No code changes, proven by envyas producing identical binaries.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  e99716f1
- drm/nouveau/bsp/nv84: initial vp2 engine implementation · 05f9a5bc
  Ilia Mirkin authored Jun 27, 2013
```
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  05f9a5bc
- drm/nouveau/vp/nv84: initial vp2 engine implementation · a0376b14
  Ilia Mirkin authored Jun 27, 2013
```
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  a0376b14
- drm/nouveau/core: xtensa engine base class implementation · 44b1e3bd
  Ilia Mirkin authored Jun 27, 2013
```
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  44b1e3bd
- drm/nouveau/vdec: fork vp3 implementations from vp2 · 0d4a1450
  Ilia Mirkin authored Jun 27, 2013
```
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  0d4a1450
- drm/nouveau/core: move falcon class to engine/ · a0fd4ec8
  Ben Skeggs authored Jun 27, 2013
```
Not really "core" per-se.  About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  a0fd4ec8
- drm/nouveau/kms: don't fail if there's no dcb table entries · d2898713
  Ben Skeggs authored Jun 25, 2013
```
Fixes module not loading on Tesla K20.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  d2898713
- drm/nouveau: remove limit on gart · 79442c3a
  Maarten Lankhorst authored Jun 17, 2013
```
Most graphics cards nowadays have a multiple of this limit as their vram,
so limiting GART doesn't seem to make much sense.
Signed-off-by: Maarten &gt;Lnkhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  79442c3a
- drm/nouveau/vm: perform a bar flush when flushing vm · 36798b61
  Maarten Lankhorst authored Jun 11, 2013
```
Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes
internally".

nvidia always seems to do this flush after writing values.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  36798b61
- drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches · 57f0ec15
  Ben Skeggs authored May 14, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  57f0ec15
- drm/nvc8/gr: update initial register/context values · eb12f57b
  Ben Skeggs authored May 14, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  eb12f57b
- drm/nvc4/gr: update initial register/context values · dba50728
  Ben Skeggs authored May 14, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  dba50728
- drm/nvc1/gr: update initial register/context values · 58ef2305
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  58ef2305
- drm/nvc3/gr: update initial register/context values · 8b637ae3
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  8b637ae3
- drm/nvc0/gr: update initial register/context values · d8b02dbb
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  d8b02dbb
- drm/nvd9/gr: update initial register/context values · 37c3afd0
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  37c3afd0
- drm/nve4/gr: update initial register/context values · 1dd44acf
  Ben Skeggs authored May 07, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  1dd44acf
- drm/nvc0-/gr: bump maximum gpc/tpc limits · a8004a9e
  Ben Skeggs authored May 06, 2013
```
Needed for GK110, separate commit to catch any unexpected breaks to
other parts of the code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  a8004a9e
- drm/nvf0/gr: initial register/context setup · cb1e06e0
  Ben Skeggs authored May 06, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  cb1e06e0
- drm/nve7/gr: update initial register/context values · 507cd5b5
  Ben Skeggs authored May 06, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  507cd5b5
- drm/nve6/gr: update initial register/context values · 99bd5537
  Ben Skeggs authored May 06, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  99bd5537
- drm/nouveau: delay busy bo vma removal until fence signals · c4c7044f
  Ben Skeggs authored May 07, 2013
```
As opposed to an explicit wait.  Allows userspace to not stall waiting
on buffer deletion.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  c4c7044f
- drm/nouveau/vm: make each vma take a reference on its parent vm · 780194b1
  Ben Skeggs authored May 07, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  780194b1
- drm/nouveau/core: remove nouveau_mm.mutex, no more users · 51a506c0
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  51a506c0
- drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/nvc0 · 4e67bee8
  Ben Skeggs authored May 13, 2013
```
nvc0_vm_flush() accesses the pgd list, which will soon be able to race
with vm_unlink() during channel destruction.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  4e67bee8
- drm/nvc0/vm: handle bar tlb flushes internally · 15cace59
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  15cace59
- drm/nv50-/vm: take mutex rather than irqsave spinlock · ca97a366
  Ben Skeggs authored May 13, 2013
```
These operations can take quite some time, and we really don't want to
have to hold a spinlock for too long.

Now that the lock ordering for vm and the gr/nv84 hw bug workaround has
been reversed, it's possible to use a mutex here.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  ca97a366
- drm/nv50/vm: remove explicit vm knowledge from engines · 464d636b
  Ben Skeggs authored May 13, 2013
```
This reverses the lock ordering between VM and gr/nv84:nvc0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  464d636b
- drm/nv50/vm: handle bar tlb flushes internally · c3032adb
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  c3032adb
- drm/nvc0/gr: port mp trap handling from calim's kepler code · fec43a72
  Ben Skeggs authored May 13, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  fec43a72
- drm/nve0/gr: attempt to resume after sm traps · 16b133df
  Ben Skeggs authored May 07, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  16b133df
- drm/nve0/gr: s/tp/tpc/ · 3d8a6ed2
  Ben Skeggs authored May 07, 2013
```
NVIDIA's name...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  3d8a6ed2
- drm/nve0/fifo: create our playlists up-front, at startup · 8d6f585d
  Ben Skeggs authored May 07, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  8d6f585d
- drm/nva3/clk: minor improvements to fractional N calculation · da746d4e
  Ben Skeggs authored Jan 24, 2013
```
Helps us to get identical numbers to the binary driver for (at least)
Kepler memory PLLs, and fixes a rounding error.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  da746d4e
- drm/nouveau/fb: initialise vram controller as pfb sub-object · dceef5d8
  Ben Skeggs authored Mar 04, 2013
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  dceef5d8
- drm/nouveau/clk: change init ordering, no longer needed by devinit · 54ecff3e
  Ben Skeggs authored Mar 05, 2013
```
And, will depend on FB/VOLT/DAEMON being ready when it gets initialised
so that it can set/restore clocks.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  54ecff3e
- drm/nouveau/devinit: move simple pll setting routines to devinit · 88524bc0
  Ben Skeggs authored Mar 05, 2013
```
These are pretty much useless for reclocking purposes.  Lets make it
clearer what they're for and move them to DEVINIT to signify they're
for the very simple PLL setting requirements of running the init
tables.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  88524bc0