- 06 Sep, 2023 1 commit
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Mario Limonciello authored
Lenovo 82TL has DMIC connected like 82V2 does. Also match 82TL. Reported-by: wildjim@kiwinet.org Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217063Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20230906182257.45736-1-mario.limonciello@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 05 Sep, 2023 1 commit
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Amadeusz Sławiński authored
HDA and HDMI devices are simple enough that in case of user not having topology tailored to their device, they can use fallback topology. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Link: https://lore.kernel.org/r/20230905093147.1960675-1-amadeuszx.slawinski@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 04 Sep, 2023 3 commits
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Brent Lu authored
Machine driver calls snd_soc_component_set_jack() function with NULL jack and data parameters when removing jack in codec exit function. Do not access data when jack is NULL. Signed-off-by: Brent Lu <brent.lu@intel.com> Link: https://lore.kernel.org/r/20230904104046.4150208-1-brent.lu@intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Shubh authored
This model requires an additional detection quirk to enable the internal microphone. Signed-off-by: Shubh <shubhisroking@gmail.com> Link: https://lore.kernel.org/r/20230902150807.133523-1-shubhisroking@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kevin-Lu authored
Update the MAINTAINERS email for TEXAS INSTRUMENTS ASoC DRIVERS. Signed-off-by: Kevin-Lu <kevin-lu@ti.com> Link: https://lore.kernel.org/r/20230903161439.85-1-kevin-lu@ti.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 29 Aug, 2023 6 commits
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Simon Trimmer authored
Ignore failure to read from the cs35l56 when polling as the device will NAK i2c accesses until it has booted and this would terminate the poll of regmap_read_poll_timeout(). Fixes: 8a731fd3 ("ASoC: cs35l56: Move utility functions to shared file") Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com Link: https://lore.kernel.org/r/20230829160433.2647889-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
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Adam Ford authored
The i.MX8MP appears to have the same easrc support as the Nano, so add imx8mp as an option with a fallback to imx8mn. Signed-off-by: Adam Ford <aford173@gmail.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org Acked-by: Conor Dooley <conor.dooley@microchip.com Link: https://lore.kernel.org/r/20230827023155.467807-1-aford173@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org
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Harshit Mogalapalli authored
When clk_get_optional() fails, the error handling code does a 'goto err_pm' with ret = 0, which is resturning success on a failure path. Fix this by assigning the PTR_ERR(priv-mclk) to ret variable. Fixes: fc918cbe ("ASoC: cs42l43: Add support for the cs42l43") Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230829073635.1877367-1-harshit.m.mogalapalli@oracle.com Signed-off-by: Mark Brown <broonie@kernel.org
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Vlad Karpovich authored
Rename control to "DACPCM Source" for backward compatibility with previous implementation. Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230828170525.335671-5-vkarpovi@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
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Vlad Karpovich authored
Value stored to 'ret' is never read. Remove it. Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230828170525.335671-2-vkarpovi@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
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Vlad Karpovich authored
The 0x35A460 chip is a different variant of the cs35l45. Signed-off-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230828170525.335671-1-vkarpovi@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
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- 28 Aug, 2023 1 commit
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Krzysztof Kozlowski authored
Three Qualcomm audio codecs (WCD9355, WCD934x and WCD938x) use the same object file wcd-clsh-v2.o leading to warnings: Makefile: wcd-clsh-v2.o is added to multiple modules: snd-soc-wcd9335 snd-soc-wcd934x snd-soc-wcd938x Convert the wcd-clsh-v2.o to a module to solve it. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20230828132316.190386-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org
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- 24 Aug, 2023 4 commits
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Cristian Ciocaltea authored
A recent cleanup of soc_dai_link_sanity_check() is responsible for generating lots of confusing errors before returning -EPROBE_DEFER: acp5x_mach acp5x_mach.0: ASoC: Component acp5x_i2s_dma.0 not found for link acp5x-8821-play [...] acp5x_mach acp5x_mach.0: ASoC: Component spi-VLV1776:00 not found for link acp5x-CS35L41-Stereo [...] acp5x_mach acp5x_mach.0: ASoC: Component spi-VLV1776:01 not found for link acp5x-CS35L41-Stereo Switch back to the initial behaviour of logging those messages on KERN_DEBUG level instead of KERN_ERR. While at it, use the correct form of the verb in 'component_not_find' label. Fixes: 0e66a2c6 ("ASoC: soc-core.c: cleanup soc_dai_link_sanity_check()") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com Link: https://lore.kernel.org/r/20230824193837.369761-1-cristian.ciocaltea@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org
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Harshit Mogalapalli authored
Passing zero to dev_err_probe is a success which is incorrect when i2c_check_functionality() fails. Fix this by passing -ENXIO instead of zero to dev_err_probe(). Fixes: 028a2ae2 ("ASoC: codecs: Add aw88261 amplifier driver") Reported-by: kernel test robot <lkp@intel.com Reported-by: Dan Carpenter <error27@gmail.com Closes: https://lore.kernel.org/r/202308150315.CvOTIOKm-lkp@intel.com/ Signed-off-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com Link: https://lore.kernel.org/r/20230824191722.2701215-1-harshit.m.mogalapalli@oracle.com Signed-off-by: Mark Brown <broonie@kernel.org
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Kuninori Morimoto authored
Current audio-graph-card functions definition are like below (A)' static int graph_get_dais_count(); (B) int audio_graph_parse_of(...) { ... (A) ret = graph_get_dais_count(); ... } (A) static int graph_get_dais_count(...) { ... } (C) We don't need to have (A)' definition if audio_graph_parse_of() (B) was defined at (C). This patch moves (B) to (C). Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87r0ntmc3c.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org
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Charles Keepax authored
Update to the newer style PM runtime macros, no functional change. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com Link: https://lore.kernel.org/r/20230824103902.1606288-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
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- 23 Aug, 2023 22 commits
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Nathan Chancellor authored
clang warns (or errors with CONFIG_WERROR=y): sound/soc/codecs/cs42l43.c:1371:2: error: variable 'ret' is used uninitialized whenever switch default is taken [-Werror,-Wsometimes-uninitialized] 1371 | default: | ^~~~~~~ sound/soc/codecs/cs42l43.c:1377:9: note: uninitialized use occurs here 1377 | return ret; | ^~~ sound/soc/codecs/cs42l43.c:1349:9: note: initialize the variable 'ret' to silence this warning 1349 | int ret; | ^ | = 0 1 error generated. Initialize ret to 0 in the default case, as there was nothing to do for other event types. Closes: https://github.com/ClangBuiltLinux/linux/issues/1922 Fixes: fc918cbe ("ASoC: cs42l43: Add support for the cs42l43") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Link: https://lore.kernel.org/r/20230823-cs42l43_pll_ev-init-ret-v1-1-5836f1ad5dad@kernel.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Merge series from Xingyu Wu <xingyu.wu@starfivetech.com>: This patch series adds I2S support for the StarFive JH7110 RISC-V SoC based on Designware I2S controller. There has three I2S channels (RX/TX0/TX1) on the JH7110 SoC, one of which is for record(RX) and two for playback(TX). The first patch adds support for the StarFive JH7110 SoC in the Designware I2S bindings. The second patch adds the ops to get data from platform bus in the I2S driver. The third patch adds support for the StarFive JH7110 SoC in the Designware I2S driver. The fourth patch fixes the name of I2STX1 pinmux. The last patch adds device node of I2S RX/TX0/TX1 in JH7110 dts. This patch series is based on Linux-next(20230818) which is merge clock, syscon and dma nodes for the StarFive JH7110 SoC. The series has been tested and works normally on the VisionFive 2 board by plugging an audio expansion board.
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Mark Brown authored
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>: Renesas Sound has ADG for clock control. Basically it needs accurately divisible external input clock. But sometimes sometimes it doesn't have to be accurate for some reason. We can use ADG clk_i for such case. It came from CPG as very high rate clock, but is not accurately divisible for 48kHz/44.1kHz rate, but enough for approximate rate. This patch set support such use case.
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Kuninori Morimoto authored
We don't need to have "format" property on DT any more if CPU/Codec driver has .auto_selectable_formats settings on snd_soc_dai_ops. The sample dtsi doesn't have it. To avoid user confusion, this patch indicates it on comment. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87edjuzk2p.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Xingyu Wu authored
Add StarFive JH7110(TX0/TX1/RX channels) SoC support in the designware I2S driver and a flag to check if it is on the JH7110 SoC. These channels need to enable clocks, resets and syscon register on the JH7110 SoC. So add init ops in platform data for the JH7110 SoC to do this. Their resets should be deassert before changing the parent of clocks so these are done in the init ops of platform data. The I2S controllers use DMA controller by platform data on the JH7110 and their settings about snd_dmaengine_dai_dma_data() should be added in the dw_configure_dai_by_pd(). And use dmaengine PCM registration if these do not have IRQ on the JH7110 SoC. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Link: https://lore.kernel.org/r/20230821144151.207339-4-xingyu.wu@starfivetech.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Xingyu Wu authored
Use of_device_get_match_data() to get platform data. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Link: https://lore.kernel.org/r/20230821144151.207339-3-xingyu.wu@starfivetech.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Xingyu Wu authored
Add the StarFive JH7110 (TX0/TX1/RX channel) SoC support in the bindings of Designware I2S controller. The I2S controller needs two reset items to work properly on the JH7110 SoC. And TX0 channel as master mode needs 5 clock items and TX1/RX channels as slave mode need 9 clock items on the JH7110 SoC. The RX channel needs System Register Controller property to enable it and other platforms do not need it. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230821144151.207339-2-xingyu.wu@starfivetech.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kuninori Morimoto authored
Current adg.c will configure BRGCKR/BRRA/BRRB to output clock when it start sound. OTAH, rsnd_adg_clk_enable() will enables clk_a/b/c when driver was probed. But it is strange, these should be set in the same time. This patch fixup it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87h6oqzlei.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kuninori Morimoto authored
Current adg has default division for BRRA/BRRB, but it was created at very beginning of the driver implementation, and is now an unnecessary settings. Because it has this default division, unexpected clockout might be selected. For example if it requests only 44.1kHz base clockout, unrequested 48kHz base clockout also will be selected. This patch remove default division of clock out Reported-by: Vincenzo De Michele <vincenzo.michele@davinci.de> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87il96zlep.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kuninori Morimoto authored
default value for brga/brgb should be 0xff instead of 0x2. This patch tidyup it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87jztmzlew.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kuninori Morimoto authored
Current adg.c doesn't assume that requested clock out divide condition doesn't match. In such case, it will indicate strange message, and will register NULL clock, etc. It is just a DT setting miss, but is confusable. This patch check all conditions for it. Reported-by: Vincenzo De Michele <vincenzo.michele@davinci.de> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87lee2zlf7.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Kuninori Morimoto authored
Basically Renesas sound ADG is assuming that it has accurately divisible input clock. But sometimes / some board might not have it. The clk_i from CPG is used for such case. It can't calculate accurate division, but can be used as approximate rate. This patch enable clk_i for such case. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Adnan Ali <adnan.ali@bp.renesas.com> Tested-by: Vincenzo De Michele <vincenzo.michele@davinci.de> Tested-by: Patrick Keil <patrick.keil@conti-engineering.com> Link: https://lore.kernel.org/r/87msyizlfd.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Seven Lee authored
Since the hardware may be designed as a single-ended input, the headset mic record only supports single-ended input on the left side. This patch will enhance microphone recording performance for single-end. Signed-off-by: Seven Lee <wtli@nuvoton.com> Link: https://lore.kernel.org/r/20230823071244.1861487-2-wtli@nuvoton.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Seven Lee authored
Add input with single-ended control. Signed-off-by: Seven Lee <wtli@nuvoton.com> Link: https://lore.kernel.org/r/20230823071244.1861487-1-wtli@nuvoton.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This codec was used by the deleted S3C board sound/soc/samsung/s3c24xx_uda134x.c. Fixes: 503278c1 ("ASoC: samsung: remove unused drivers") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230822-delete-l3-v2-1-b3ffc07348af@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
DSP_SW_INTR_STAT_OFFSET is a common interrupt register which will be accessed by both ACP firmware and driver. This register contains register bits corresponds to host to dsp interrupts and vice versa. when dsp to host interrupt is reported, only clear dsp to host interrupt bit in DSP_SW_INTR_STAT_OFFSET. Fixes: 2e7c6652 ("ASoC: SOF: amd: Fix for handling spurious interrupts from DSP") Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-7-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
Due to scratch memory persistence, Once the DSP panic is reported, need to clear the panic mask after handling DSP panic. Otherwise, It results in DSP panic on next reboot. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-6-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
Few AMD platforms require ACP ACLK as clock source. Add conditional check for clock mux selection register for switching between internal clock and ACP ACLK. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-5-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
ACP clock mux selection register is already programmed during acp init sequence. Remove the redundant register write. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-4-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
Add module parameter for firmware debug. If firmware debug flag is enabled, clear the fusion stall bit which is required for enabling firmware debugging through JTAG. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-3-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
Previously ACP SOF firmware used to enable the ACP external global interrupt register. This will restrict to report ACP host interrupts only after firmware loading is successful. This register needs to be set from host driver to handle other ACP interrupts(SoundWire Interrupts) before loading the ACP firmware. Add field for external interrupt enable register in acp descriptor structure and enable the external interrupt enable register. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-2-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Vijendar Mukunda authored
During initial development time for RN platform, when SHA dma gets completed, SHA DMA engine used to raise the ACP interrupt. In ACP interrupt handler, SHA DMA interrupt got handled. Currently SHA DMA compleition is verified by checking transfer count using read poll time out logic. Remove unused SHA dma interrupt handling code. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-1-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 22 Aug, 2023 2 commits
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Kuninori Morimoto authored
ALSA SoC merges DAI call backs into .ops. This patch merge these into one. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202308152047.psX1QNDh-lkp@intel.com/ Cc: Randy Dunlap <rdunlap@infradead.org> Fixes: 446b31e8 ("ASoC: soc-dai.h: remove unused call back functions") Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reported-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Link: https://lore.kernel.org/r/87a5ujubj0.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Peter Ujfalusi authored
Add a new module parameter ipc4_ignore_cpc which can be used to force the kernel to ignore the queried CPC value for all firmware modules and use 0 instead. The CPC lookup is still done to report missing configurations and the debug print is going to be different to be explicit that the CPC is ignored and what was the value we would have used. The CPC value is sent to the firmware with the MOD_INIT_INSTANCE message and it is used by the firmware as a parameter for clock scaling. The flag is intended to be used only when there is a need to validate the firmware behavior regarding to clock scaling since the 0 CPC value will force the DSP to run in full speed, disabling the scaling and provides additional counter point to rule out clock management related issues. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Link: https://lore.kernel.org/r/20230822065419.24374-1-peter.ujfalusi@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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