- 02 Oct, 2014 2 commits
-
-
Arnd Bergmann authored
hisi has a general dependency on ARCH_MULTIPLATFORM, which is problematic when building a kernel for non-V7 platforms but selecting drivers that might conflict with other architecture levels. In this case, it broke my (still out of tree) patch set that enables V7M multiplatform support, since that does not enable MULTI_IRQ support: arch/arm/kernel/built-in.o: In function `set_handle_irq': arch/arm/kernel/irq.c:125: undefined reference to `handle_arch_irq' arch/arm/kernel/built-in.o: In function `setup_arch': arch/arm/kernel/setup.c:965: undefined reference to `handle_arch_irq' Since all hisilicon platforms are ARMv7 based, we can avoid this problem by just making the dependency more specific. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Wei Xu <xuwei5@hisilicon.com>
-
Krzysztof Hałasa authored
UARTs on CNS3xxx are 8250-compatible, not AMBA. The base address for UART0 is 0x78000000 (physical) and 0xfb002000 (virtual). Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
- 26 Sep, 2014 1 commit
-
-
Arnd Bergmann authored
The newly introduced support for SAMA5D4 added access to the 'AT91_ALT_BASE_SYS' register area, but failed to define the symbols in the case when CONFIG_MMU is disabled. We really should not hardwire addresses like this any more, but as a small fixup, this patch just adds the missing definitions for the nommu case, which gets at91x40_defconfig and any configuration of sam9 and sama5 with MMU disabled back to work. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 726d32bf ("ARM: at91: SAMA5D4 SoC detection code and low ...")
-
- 25 Sep, 2014 11 commits
-
-
git://github.com/at91linux/linux-at91Arnd Bergmann authored
Pull "Second SoC batch for 3.18" from Nicolas Ferre: - introduction of the new SAMA5D4 SoC and associated Evaluation Kit - low level soc detection and early printk code - taking advantage of this, documentation of all AT91 SoC DT strings Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'at91-soc2' of git://github.com/at91linux/linux-at91: ARM: at91: document Atmel SMART compatibles ARM: at91: add sama5d4 support to sama5_defconfig ARM: at91: dt: add device tree file for SAMA5D4ek board ARM: at91: dt: add device tree file for SAMA5D4 SoC ARM: at91: SAMA5D4 SoC detection code and low level routines ARM: at91: introduce basic SAMA5D4 support clk: at91: add a driver for the h32mx clock
-
Arnd Bergmann authored
The soc2 branch is based on this cleanup: * at91/soc: ARM: at91: Remove the support for the RSI EWS board ARM: at91: remove board file for Acme Systems Fox G20 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'soc-part2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "part 2 of omap SoC changes" from Tony Lindgren: Few hwmod changes to support upcoming 8250 driver with DMA, start using the SRAM driver for some omaps, and update the defconfig. Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'soc-part2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4+: Remove static iotable mappings for SRAM ARM: OMAP4+: Move SRAM data to DT ARM: AM335x: Get rid of unused sram init function ARM: omap2plus_defconfig: Enable some display features ARM: omap2plus_defconfig: Enable battery and reset drivers ARM: omap2plus_defconfig: Add support for distros with systemd ARM: omap2plus_defconfig: Add cpufreq to defconfig ARM: omap2plus_defconfig: Shrink with savedefconfig ARM: OMAP3: Use manual idle for UARTs because of DMA errata ARM: OMAP2+: Add hwmod flag for HWMOD_RECONFIG_IO_CHAIN
-
http://github.com/brcm/linuxArnd Bergmann authored
Merge "ARM: BCM: Broadcom BCM63138 support" from Florian Fainelli: This patchset adds very minimal support for the BCM63138 SoC which is a xDSL SoC using a dual Cortex A9 CPU complex. * tag 'bcm63138-v4' of http://github.com/brcm/linux: MAINTAINERS: add entry for the Broadcom BCM63xx ARM SoCs ARM: BCM63XX: add BCM963138DVT Reference platform DTS ARM: BCM63XX: add BCM63138 minimal Device Tree ARM: BCM63XX: add low-level UART debug support ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC Conflicts: arch/arm/Kconfig.debug Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'renesas-soc5-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Fifth Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman: * r8a7740: Fix documentation error copied from elsewhere * r8a7794: Reserve memory for CMA in a manner consistent to other R-Car Gen2 SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-soc5-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7740 legacy: Fix copied bug in comment ARM: shmobile: r8a7794: Reserve memory as other R-Car Gen2 SoCs
-
Arnd Bergmann authored
Merge tag 'pxa3xx-ssp-name' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into next/soc Pull "fix PXA3xx SSP naming issue" from Haojian Zhuang: It's imported by 972a55b6 ASoC: fix pxa-ssp compiling issue under mach-mmp from v3.5 Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'pxa3xx-ssp-name' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux: ARM: pxa3xx: provide specific platform_devices for all ssp ports ARM: pxa: ssp: provide platform_device_id for PXA3xx
-
Arnd Bergmann authored
Merge tag 'tegra-for-3.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc Pull "ARM: tegra: core SoC code changes for 3.18" from Stephen Warren: the primary change here gets its address information from DT rather than iomap.h. This removes one more user of iomap.h, and will help allow the code to move to a location that can be shared between arch/arm and arch/arm64. An unused header file was also removed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'tegra-for-3.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: remove unused tegra_emc.h ARM: tegra: Initialize flow controller from DT of: Add NVIDIA Tegra flow controller bindings
-
git://git.xilinx.com/linux-xlnxArnd Bergmann authored
Pull "arm: Xilinx Zynq cleanup patches for v3.18" from Michal Simek: - PM support - Fix L2 useless setting Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Remove useless L2C AUX setting ARM: zynq: Rename 'zynq_platform_cpu_die' ARM: zynq: Remove hotplug.c ARM: zynq: Synchronise zynq_cpu_die/kill ARM: zynq: cpuidle: Remove pointless code ARM: zynq: Remove invalidate cache for cpu die ARM: zynq: PM: Enable DDR clock stop ARM: zynq: DT: Add DDRC node Documentation: devicetree: Add binding for Synopsys DDR controller ARM: zynq: PM: Enable A9 internal clock gating feature
-
Carlo Caione authored
This patch adds the basic machine file for the MesonX SoCs. Only Meson6 is populated. Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Carlo Caione authored
Add the UART definitions needed to support earlyprintk for MesonX SoCs on UARTAO. Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-
Vincent Stehlé authored
Export handle_fasteoi_irq to be able to use it in e.g. the Zynq gpio driver since commit 6dd85950 ("gpio: zynq: Fix IRQ handlers"). This fixes the following link issue: ERROR: "handle_fasteoi_irq" [drivers/gpio/gpio-zynq.ko] undefined! Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Vincent Stehle <vincent.stehle@laposte.net> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Linus Walleij <linus.walleij@linaro.org> Link: http://lkml.kernel.org/r/1408663880-29179-1-git-send-email-vincent.stehle@laposte.netSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
-
- 24 Sep, 2014 8 commits
-
-
Olof Johansson authored
Merge tag 'imx-soc-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: SoC updates for 3.18" from Shawn Guo: The i.MX SoC updates for 3.18: - Add initial devicetree support for i.MX1 - Support GPT per clock source from OSC for i.MX6 - A couple of parent selection corrections for i.MX6SL clock driver - Support more chip revision for i.MX6 - Convert pr_warning to pr_warn - Add exclusive gate clock support - Add BYPASS support for i.MX6 PLL clocks - Update i.MX6 clock tree for audio use case - A couple of VF610 clock driver updates * tag 'imx-soc-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (30 commits) ARM: imx_v6_v7_defconfig updates ARM: imx_v4_v5_defconfig: Select CONFIG_IMX_WEIM arm: mach-imx: Convert pr_warning to pr_warn ARM: imx: source gpt per clk from OSC for system timer ARM: imx: add gpt_3m clk for i.mx6qdl ARM: imx: fix register offset of pll7_usb_host gate clock ARM: clk-imx6sl: refine clock tree for SSI ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver ARM: imx6sx: add BYPASS support for PLL clocks ARM: imx6sl: add BYPASS support for PLL clocks ARM: imx6q: add BYPASS support for PLL clocks ARM: imx: add an exclusive gate clock type ARM: clk-imx6q: refine clock tree for SSI ARM: clk-imx6q: refine clock tree for ASRC ARM: clk-imx6sl: correct the pxp and epdc axi clock selections ARM: clk-imx6q: refine clock tree for ESAI ARM: clk-imx6sl: Select appropriate parents for LCDIF clocks ARM: clk-imx6sl: Remove csi_lcdif_sels[] ARM: imx: clk-vf610: Add USBPHY clocks ARM: imx: add cpufreq support for i.mx6sx ... Signed-off-by: Olof Johansson <olof@lixom.net>
-
Olof Johansson authored
Merge tag 'renesas-soc4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Fourth Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman: Fourth Round of Renesas ARM Based SoC Soc Updates for v3.18 * r8a7794: Remove unnecessary #ifdef CONFIG_USE_OF * tag 'renesas-soc4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7794: Remove unnecessary #ifdef CONFIG_USE_OF Signed-off-by: Olof Johansson <olof@lixom.net>
-
Matthias Brugger authored
Enable low-level debug for Mediatek mt6589 SoC on UART0. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
-
Wei Xu authored
When compiling with "ARCH=arm" and "allmodconfig", with commit: 9cdc9991 [2/7] ARM: hisi: enable MCPM implementation we will get: /tmp/cc6DjYjT.s: Assembler messages: /tmp/cc6DjYjT.s:63: Error: selected processor does not support ARM mode `ubfx r1,r0,#8,#8' /tmp/cc6DjYjT.s:761: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:762: Error: selected processor does not support ARM mode `dsb ' /tmp/cc6DjYjT.s:769: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:775: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:776: Error: selected processor does not support ARM mode `dsb ' /tmp/cc6DjYjT.s:795: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:801: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:802: Error: selected processor does not support ARM mode `dsb ' Fix platmcpm compilation when ARMv6 is selected. Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
-
Olof Johansson authored
HIP04 was added out of order, but so was the previous HISI debug uart support as well. Minor reshuffling of order. Signed-off-by: Olof Johansson <olof@lixom.net>
-
git://github.com/hisilicon/linux-hisiOlof Johansson authored
Merge "pull request for hisilicon hip04 soc and D01 board updates" from Wei Xu: ARM: mach-hisi: Hisilicon hip04 soc and D01 board updates for 3.18 - Add the CONFIG_MCPM_QUAD_CLUSTER configuration to enlarge cluster number from 2 to 4 - Enable MCPM on HiP04 SoC - Enable 16 cores on HiP04 SoC - Add platform & Fabric controller devicetree binding document for HiP04 SoC - Add hip04.dtsi & hip04-d01.dts for hip04 SoC platform and D01 board - Enable HiP04 SoC in both hi3xxx_defconfig & multi_v7_defconfig - Add the support of Hisilicon HiP04 debug uart * tag 'D01-for-3.18' of git://github.com/hisilicon/linux-hisi: ARM: debug: add HiP04 debug uart ARM: config: enable hisilicon hip04 ARM: dts: add hip04 dts document: dt: add the binding on HiP04 ARM: hisi: enable HiP04 ARM: hisi: enable MCPM implementation ARM: mcpm: support 4 clusters Signed-off-by: Olof Johansson <olof@lixom.net>
-
Olof Johansson authored
Merge tag 'renesas-clk2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Clk Updates for v3.18" from Simon Horman. * Add r8a7740, sh73a0 SoCs to MSTP bindings * tag 'renesas-clk2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: clk: shmobile: Add r8a7740, sh73a0 SoCs to MSTP bindings Signed-off-by: Olof Johansson <olof@lixom.net>
-
Olof Johansson authored
Merge tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc SoC related changes for omaps for v3.18 merge window: - PM changes to make the code easier to use on newer SoCs - PM changes for newer SoCs suspend and resume and wake-up events - Minor clean-up to remove dead Kconfig options Note that these have a dependency to the fixes-v3.18-not-urgent tag and is based on a commit in that series. * tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits) ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7 ARM: dts: OMAP3+: Add PRM interrupt ARM: omap: Remove stray ARCH_HAS_OPP references ARM: DRA7: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5 / DRA7: Enable CPU RET on suspend ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug ARM: OMAP5 / DRA7: PM: Avoid all SAR saves ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency ARM: OMAP5 / DRA7: PM: Update CPU context register offset ARM: AM437x: use pdata quirks for pinctrl information ARM: DRA7: use pdata quirks for pinctrl information ARM: OMAP5: use pdata quirks for pinctrl information ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug ARM: OMAP4+: PM: use only valid low power state for suspend ARM: OMAP4+: PM: Make logic state programmable ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms ...
-
- 22 Sep, 2014 7 commits
-
-
Alexandre Belloni authored
Document all the available compatibles for Atmel "SMART" SoCs. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-
Alexandre Belloni authored
Add sama5d4 to sama5_defconfig to build kernel booting on both sama5d3 and samad4. Note that earlyprintk can only be working for one or the other. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-
Nicolas Ferre authored
Add reference SAMA5D4-EK platform DT file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
Nicolas Ferre authored
Add SAMA5D4 SoC DT file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
Nicolas Ferre authored
SoC identification code, kernel uncompress and low level debugging routines update. On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another round of detection is needed. We also had to differentiate with SAMA5D3 SoC family and rename some variables. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
Nicolas Ferre authored
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-
Alexandre Belloni authored
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-
- 19 Sep, 2014 1 commit
-
-
Josef Holzmayr authored
The platform is end of life/support and should not clutter the mach-at91 directory with non-DT files. It is therefore removed. Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-
- 18 Sep, 2014 10 commits
-
-
Daniel Mack authored
Currently, devices for SSP ports 1, 2 and 3 are registered as compatible devices to pxa27x-ssp. While the actual IP core is comparable, there are some subtle differences which users of the SSP ports address by looking at the 'type' field. By registering devices of type 'pxa27x-ssp', this 'type' field is incorrectly set to PXA27x_SSP which confuses the users. To fix this, provide specific ssp port plaform devices which use 'pxa3xx-ssp' as driver name, an instantiate them from pxa3xx.c. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-
Daniel Mack authored
Provide an explicit match string for PXA3xx SSP ports. Without this match string, SSP0/SSP1/SSP2 in PXA3xxx will be consided as PXA27x SSP Port. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
-
Rajendra Nayak authored
In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Rajendra Nayak authored
Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Rajendra Nayak authored
Remove the empty am33xx_sram_init() function. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Tony Lindgren authored
Now that we have panel support for DT based booting, let's make it usable and enable most things as modules. Note that omap3 boards need also the ads7847 module for the panel that we're now changing to a loadable module. And n900 seems to require setting the brightness via sysfs for acx565akm/brightness after modprobe of panel_sony_acx565akm and omapfb. Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Tony Lindgren authored
Since many omaps run on battery, we should have the battery drivers enabled. Let's also enable the reset driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Tony Lindgren authored
Some distros are now using systemd, so let's enable most of what's recommended at: http://cgit.freedesktop.org/systemd/systemd/tree/READMEReviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Tony Lindgren authored
Note that we can now use the CONFIG_GENERIC_CPUFREQ_CPU0, so let's only enable that. Let's use CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND as suggested by Nishant. And also let's enable thermal as explained by Nishant Menon: Many TI SoCs using Highest frequency is not really too nice of an idea for long periods of time. And not everything is upstream to support things optimially - example avs class 0, 1.5 ABB consolidation with cpufreq etc.. We definitely need thermal enabled as well for device safety needs. [tony@atomide.com: updated per Nishant's suggestions] Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-
Tony Lindgren authored
This saves few lines and makes it easier to make patches against omap2plus_defconfig. Signed-off-by: Tony Lindgren <tony@atomide.com>
-