- 21 Mar, 2023 2 commits
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Daniel Golle authored
Introduce DT bindings for the MT7981 SoC to mediatek,net.yaml. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Daniel Golle <daniel@makrotopia.org> Signed-off-by:
Jakub Kicinski <kuba@kernel.org>
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Daniel Golle authored
The MediaTek MT7981 SoC comes with two 1G/2.5G SGMII ports, just like MT7986. In addition MT7981 is equipped with a built-in 1000Base-T PHY which can be used with GMAC1. As many MT7981 boards make use of inverting SGMII signal polarity, add new device-tree attribute 'mediatek,pn_swap' to support them. Signed-off-by:
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- 20 Mar, 2023 15 commits
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Lukas Bulwahn authored
Commit 053fdaa8 ("nfc: mrvl: Move platform_data struct into driver") moves the nfcmrvl.h header file from include/linux/platform_data to the driver's directory, but misses to adjust MAINTAINERS. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about a broken reference. Just remove the file entry in NFC SUBSYSTEM, as the new location of the code is already covered by another pattern in that section. Fixes: 053fdaa8 ("nfc: mrvl: Move platform_data struct into driver") Signed-off-by:
Lukas Bulwahn <lukas.bulwahn@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
Now that rtl_hw_aspm_clkreq_enable() is a no-op for chip versions < 32, we can consolidate disabling ASPM before EPHY access in rtl_hw_start(). Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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David S. Miller authored
Heiner Kallweit says: ==================== net: phy: reuse SMSC PHY driver functionality in the meson-gxl PHY driver The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's reuse SMSC PHY driver functionality in the meson-gxl PHY driver. ==================== Signed-off-by: -
Heiner Kallweit authored
The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's reuse SMSC PHY driver functionality in the meson-gxl PHY driver. Tested with a G12A internal PHY. I don't have GXL test hw, therefore I replace only the callbacks that are identical in the SMSC PHY driver. Signed-off-by:
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Heiner Kallweit authored
The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's export SMSC PHY driver functionality for use by the meson-gxl PHY driver. Signed-off-by:
Chris Healy <healych@amazon.com> Signed-off-by:
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David S. Miller authored
Colin Foster says: ==================== add support for ocelot external ports This is the start of part 3 of what is hopefully a 3-part series to add Ethernet switching support to Ocelot chips. Part 1 of the series (A New Chip) added general support for Ocelot chips that were controlled externally via SPI. https://lore.kernel.org/all/20220815005553.1450359-1-colin.foster@in-advantage.com/ Part 2 of the series (The Ethernet Strikes Back) added DSA Ethernet support for ports 0-3, which are the four copper ports that are internal to the chip. https://lore.kernel.org/all/20230127193559.1001051-1-colin.foster@in-advantage.com/ Part 3 will, at a minimum, add support for ports 4-7, which are configured to use QSGMII to an external phy (Return Of The QSGMII). With any luck, and some guidance, support for SGMII, SFPs, etc. will also be part of this series. V1 was submitted as an RFC - and that was rightly so. I suspected I wasn't doing something right, and that was certainly the case. V2 is much cleaner, so hopefully upgrading it to PATCH status is welcomed. Thanks to Russell and Vladimir for correcting my course from V1. In V1 I included a device tree snippet. I won't repeat that here, but I will include a boot log snippet, in case it is of use: ==================== Signed-off-by:
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Colin Foster authored
The VSC7512 has four ports with internal phys that are already supported. There are additional ports that can be configured to work with external phys. Add support for these additional ethernet ports. Signed-off-by:
Colin Foster <colin.foster@in-advantage.com> Signed-off-by:
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Colin Foster authored
Ports for Ocelot devices (VSC7511, VSC7512, VSC7513 and VSC7514) support external phys. When external phys are used, additional configuration on each port is required to enable QSGMII mode and set external phy modes. Add a configurable hook into these routines, so the external ports can be used. Signed-off-by:
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Colin Foster authored
If a user of the Felix driver has a port running in SGMII / QSGMII mode, it will need to utilize phylink_mac_config(). Add this configurability. Signed-off-by:
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Colin Foster authored
The VSC7512 and VSC7514 have internal PLLs that can be used to control different peripherals. Initialize these high speed I/O (HSIO) PLLs when they exist, so that dependent peripherals like QSGMII can function. Signed-off-by:
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Colin Foster authored
During chip initialization, ports that use SGMII / QSGMII to interface to external phys need to be configured on the VSC7513 and VSC7514. Expose this configuration routine, so it can be used by DSA drivers. Signed-off-by:
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Colin Foster authored
The ocelot-switch driver can utilize the phylink_mac_config routine. Move this to the ocelot library location and export the symbol to make this possible. Signed-off-by:
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Colin Foster authored
Ocelot chips have an internal PLL that must be used when communicating through external phys. Expose the init routine, so it can be used by other drivers. Signed-off-by:
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Colin Foster authored
Add support for the Ocelot SERDES module to support functionality of all non-internal phy ports. Signed-off-by:
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Colin Foster authored
The phy-ocelot-serdes module has exclusively been used in a syscon setup, from an internal CPU. The addition of external control of ocelot switches via an existing MFD implementation means that syscon is no longer the only interface that phy-ocelot-serdes will see. In the MFD configuration, an IORESOURCE_REG resource will exist for the device. Utilize this resource to be able to function in both syscon and non-syscon configurations. Signed-off-by:
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- 19 Mar, 2023 9 commits
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David S. Miller authored
Horatiu Vultur says: ==================== net: lan966x: Improve TX/RX of frames from/to CPU The first patch of this series improves the RX side. As it seems to be an expensive operation to read the RX timestamp for every frame, then read it only if it is required. This will give an improvement of ~70mbit on the RX side. The second patch stops using the packing library. This improves mostly the TX side as this library is used to set diffent bits in the IFH. If this library is replaced with a more simple/shorter implementation, this gives an improvement of more than 100mbit on TX side. All the measurements were done using iperf3. v1->v2: - update lan966x_ifh_set to set the bytes and not each bit individually ==================== Signed-off-by: -
Horatiu Vultur authored
When a frame is injected from CPU, it is required to create an IFH(Inter frame header) which sits in front of the frame that is transmitted. This IFH, contains different fields like destination port, to bypass the analyzer, priotity, etc. Lan966x it is using packing library to set and get the fields of this IFH. But this seems to be an expensive operations. If this is changed with a simpler implementation, the RX will be improved with ~5Mbit while on the TX is a much bigger improvement as it is required to set more fields. Below are the numbers for TX. Before: [ 5] 0.00-10.02 sec 439 MBytes 367 Mbits/sec 0 sender After: [ 5] 0.00-10.00 sec 578 MBytes 485 Mbits/sec 0 sender Signed-off-by:
Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by:
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Horatiu Vultur authored
Whenever a frame was received to the CPU, the HW is timestamping the frame. In the IFH(Inter Frame Header) it is found the nanosecond part of the timestamps the SW is required to read from HW the second part. But reading the second part it seems to be a expensive operations, so so change this such to read the second part only when rx filter is enabled. Doing this change gives the RX a performance boost of ~70mbit. before: [ 5] 0.00-10.01 sec 546 MBytes 457 Mbits/sec 0 sender now: [ 5] 0.00-10.01 sec 652 MBytes 530 Mbits/sec 0 sender Signed-off-by:
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Eric Dumazet authored
Use PACKET_SOCK_QDISC_BYPASS atomic bit instead of a pointer. This removes one indirect call in fast path, and READ_ONCE()/WRITE_ONCE() annotations as well. Signed-off-by:
Eric Dumazet <edumazet@google.com> Suggested-by:
Willem de Bruijn <willemb@google.com> Cc: Daniel Borkmann <daniel@iogearbox.net> Reviewed-by:
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Harini Katakam authored
Reset TX when halt times out i.e. disable TX, clean up TX BDs, interrupts (already done) and enable TX. This addresses the issue observed when iperf is run at 10Mps Half duplex where, after multiple collisions and retries, TX halts. Signed-off-by:
Harini Katakam <harini.katakam@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Signed-off-by:
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by:
Michal Swiatkowski <michal.swiatkowski@linux.intel.com> Acked-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by:
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Tony Nguyen authored
There are likely no users of this driver as the hardware has been discontinued since 2010. Remove the driver and all references to it in documentation. Suggested-by:
Tony Nguyen <anthony.l.nguyen@intel.com> Acked-by:
Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by:
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Andy Shevchenko authored
of_gpio.h in this driver is solely used as a proxy to other headers. This is incorrect usage of the of_gpio.h. Replace it .h with what indeed is used in the code. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Andy Shevchenko authored
of_gpio.h in this driver is solely used as a proxy to other headers. This is incorrect usage of the of_gpio.h. Replace it .h with what indeed is used in the code. Signed-off-by:
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Bartosz Wawrzyniak authored
Currently macb sets clock divisor for pclk up to 160 MHz. Function gem_mdc_clk_div was updated to enable divisor for higher values of pclk. Signed-off-by:
Bartosz Wawrzyniak <bwawrzyn@cisco.com> Reviewed-by:
Michal Kubiak <michal.kubiak@intel.com> Acked-by:
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- 18 Mar, 2023 14 commits
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David S. Miller authored
Eric Dumazet says: ==================== net: better const qualifier awareness This is a follow-up of d27d367d ("inet: better const qualifier awareness") Adopting container_of_const() to perform (struct sock *)->(protocol sock *) operation is allowing us to propagate const qualifier and thus detect misuses at compile time. Most conversions are trivial, because most protocols did not adopt yet const sk pointers where it could make sense. Only mptcp and tcp patches (end of this series) are requiring small adjustments. ==================== Signed-off-by:
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Eric Dumazet authored
We can change tcp_sk() to propagate its argument const qualifier, thanks to container_of_const(). We have two places where a const sock pointer has to be upgraded to a write one. We have been using const qualifier for lockless listeners to clearly identify points where writes could happen. Add tcp_sk_rw() helper to better document these. tcp_inbound_md5_hash(), __tcp_grow_window(), tcp_reset_check() and tcp_rack_reo_wnd() get an additional const qualififer for their @tp local variables. smc_check_reset_syn_req() also needs a similar change. Signed-off-by:
Simon Horman <simon.horman@corigine.com> Signed-off-by:
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Eric Dumazet authored
We can change mptcp_sk() to propagate its argument const qualifier, thanks to container_of_const(). We need to change few things to avoid build errors: mptcp_set_datafin_timeout() and mptcp_rtx_head() have to accept non-const sk pointers. @msk local variable in mptcp_pending_tail() must be const. Signed-off-by:
Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by:
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Eric Dumazet authored
We can change [a]x25_sk() to propagate their argument const qualifier, thanks to container_of_const(). Signed-off-by:
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Eric Dumazet authored
We can change smc_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by:
Wenjia Zhang <wenjia@linux.ibm.com> Signed-off-by:
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Eric Dumazet authored
We can change unix_sk() to propagate its argument const qualifier, thanks to container_of_const(). We need to change dump_common_audit_data() 'struct unix_sock *u' local var to get a const attribute. Signed-off-by:
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Eric Dumazet authored
We can change dccp_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by:
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Eric Dumazet authored
We can change raw6_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by:
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Eric Dumazet authored
We can change raw_sk() to propagate const qualifier of its argument, thanks to container_of_const() Signed-off-by:
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Eric Dumazet authored
We can change pkt_sk() to propagate const qualifier of its argument, thanks to container_of_const() This should avoid some potential errors caused by accidental (const -> not_const) promotion. Signed-off-by:
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Eric Dumazet authored
We can change udp_sk() to propagate const qualifier of its argument, thanks to container_of_const() This should avoid some potential errors caused by accidental (const -> not_const) promotion. Signed-off-by:
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Jakub Kicinski authored
Gavin Li says: ==================== net/mlx5e: Add GBP VxLAN HW offload support Patch-1: Remove unused argument from functions. Patch-2: Expose helper function vxlan_build_gbp_hdr. Patch-3: Add helper function for encap_info_equal for tunnels with options. Patch-4: Preserving the const-ness of the pointer in ip_tunnel_info_opts. Patch-5: Add HW offloading support for TC flows with VxLAN GBP encap/decap in mlx ethernet driver. ==================== Link: https://lore.kernel.org/r/20230316070758.83512-1-gavinl@nvidia.comSigned-off-by: -
Gavin Li authored
Add HW offloading support for TC flows with VxLAN GBP encap/decap. Example of encap rule: tc filter add dev eth0 protocol ip ingress flower \ action tunnel_key set id 42 vxlan_opts 512 \ action mirred egress redirect dev vxlan1 Example of decap rule: tc filter add dev vxlan1 protocol ip ingress flower \ enc_key_id 42 enc_dst_port 4789 vxlan_opts 1024 \ action tunnel_key unset action mirred egress redirect dev eth0 Signed-off-by:Gavin Li <gavinl@nvidia.com> Reviewed-by:
Gavi Teitz <gavi@nvidia.com> Reviewed-by:
Roi Dayan <roid@nvidia.com> Reviewed-by:
Maor Dickman <maord@nvidia.com> Acked-by:
Saeed Mahameed <saeedm@nvidia.com> Signed-off-by:
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Gavin Li authored
Change ip_tunnel_info_opts( ) from static function to macro to cast return value and preserve the const-ness of the pointer. Signed-off-by:
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