- 23 Oct, 2017 20 commits
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Vivek Gautam authored
Set the phy mode based on the UFS HS PA mode. This lets the controller let phy know the mode in which the PHY Adapter is running and set the phy rates accordingly. Signed-off-by:
Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by:
Subhash Jadavani <subhashj@codeaurora.org> Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com>
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Vivek Gautam authored
Adding support to set desired UFS phy mode that can be set from the host controller. Signed-off-by:
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Vivek Gautam authored
UFS phy has two modes for each High speed generation. These modes are identified by two rates of operations - Rate A, and Rate B. Add these UFS phy modes to phy framework. Signed-off-by:
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Vivek Gautam authored
Add definition for UFS phy type. Signed-off-by:
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Kishon Vijay Abraham I authored
Update the PCIe phy settings based on new settings available in AM572x Technical Reference Manual[1] Revision I, revised April 2017 in Table 26-62 "Preferred PCIe_PHY_RX SCP Register Settings". [1] http://www.ti.com/lit/ug/spruhz6i/spruhz6i.pdf Cc: Vignesh R <vigneshr@ti.com> Signed-off-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
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Kishon Vijay Abraham I authored
PCI core access configuration space registers in resume_noirq callbacks. In the case of dra7xx, PIPE3 PHY connected to PCIe controller has to be enabled before accessing configuration space registers. Since PIPE3 PHY is enabled by only configuring control module registers, no aborts has been observed so far (though during noirq stage, interface clock of PIPE3 PHY is not enabled). With new TRM updates, PIPE3 PHY has to be initialized (PIPE3 PHY registers has to be accessed) as well which requires the interface clock of PIPE3 PHY to be enabled. The interface clock of PIPE3 PHY is derived from OCP2SCP and hence PCIe PHY is modeled as a child of OCP2SCP. Since pm_runtime is not enabled during noirq stage, pm_runtime_get_sync done in phy_init doesn't enable OCP2SCP clocks resulting in abort when PIPE3 PHY registers are accessed. Create a function dependency between PCIe and PHY here to make sure PCIe is suspended before PCIe PHY/OCP2SCP and resumed after PCIe PHY/OCP2SCP. Suggested-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com>
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Florian Fainelli authored
Parse the DT properties brcm,rxaeq-mode and brcm,rxaeq-value to correctly configure the RX equalizer of the PHY. This may be required to resolve specific signal integrity issues. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Florian Fainelli authored
Split the functional code in brcm_stb_sata_init() to a separate function that actually does configure spread spectrum: brcm_stb_sata_ssc_init() and make that function return void, since that function cannot fail. Signed-off-by:
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Florian Fainelli authored
Define two new properties: brcm,rx-aeq-mode which allows configuring the SATA PHY RX equalizers and when "manual" is used, brcm,rx-aeq can be used to set the exact value. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Yoshihiro Shimoda authored
This patch adds binding for r8a77995 (R-Car D3). Since r8a77995 doesn't have dedicated pins (ID, VBUS), this will match against the generic fallback on R-Car D3. For now, this driver doesn't support usb role swap for r8a77995. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
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Yoshihiro Shimoda authored
This patch adds SoC-specific parameter to avoid reading/writing specific registers wrongly if this driver runs on a SoC which doesn't have dedicated pins (e.g. R-Car D3). This patch also changes the value "has_otg" to "has_otg_pins" for slightly easier reading of the code. Signed-off-by:
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Yoshihiro Shimoda authored
This patch modifies the role_store() to use "enum phy_mode" instead of the local "bool" for host/device mode selection. Signed-off-by:
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Yoshihiro Shimoda authored
The previous code assumed a channel has otg capability if a channel has interrupt property. But, it is not good because: - Battery charging feature also needs interrupt property. - Some R-Car Gen3 SoCs (e.g. R-Car D3) don't have OTG capability. So, this patch checks whether usb 2.0 host node has dr_mode property or not. If it has 'dr_mode = "otg";', this driver enables otg capability. Signed-off-by:
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Biju Das authored
Add USB PHY support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) USB PHY is identical to the R-Car Gen2 family. Signed-off-by:
Biju Das <biju.das@bp.renesas.com> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Icenowy Zheng authored
Allwinner V3s SoC also features the dual route of the first USB PHY. Enable it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
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Douglas Anderson authored
Calculate the calibration code as per the docs. The docs talk about reading and averaging the pullup and pulldown calibration codes. They also talk about adding in some adjustment codes. Let's do what the docs say. In practice this doesn't seem to matter a whole lot. On a device I tested the pullup and pulldown codes were nearly the same (0x23 and 0x24) and the adjustment codes were 0. Reviewed-by:
Chris Zhong <zyw@rock-chips.com> Signed-off-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Douglas Anderson authored
NOTE: nothing is known to be fixed by this change, but it does enforce some delays that are documented to be necessary. Possibly this could fix some corner cases. The function tcphy_dp_aux_calibration(), like most of the functions in the type C PHY, is mostly undocumented and filled with mysterious, hardcoded numbers. Let's attempt to try to document some of these numbers and clean the function up a little bit. Here's the actual cleanup that happened here: 1. All magic numbers were replaced with bit definitions. 2. For registers that we modify multiple times I now keep track of the value of the register rather than randomly doing a read/modify/write or just hardcoding a new number based on knowing what the old number was. 3. Delay 10 ms (vs 1 ms) after writing the calibration code. No idea if this is important but it matches the example in the docs. 4. Whenever setting a "delayed" version of a signal always put an explicit delay in the code. No known problems were seen without this delay but it seems wise to have it. Whenever a delay of "at least 100 ns" was specified I used a delay of 1 us. 5. Added comments to some of the bits of code. 6. Removed duplicate setting of TX_ANA_CTRL_REG_5 (to 0) 7. Moved setting of TX_ANA_CTRL_REG_3 to the same place it was in the sample code. Note that TX_ANA_CTRL_REG_3 ought to be initted to 0 (and elsewhere we assume that we just got a reset), but it seems fine to be explicit. 8. Treats the calibration code as a 7-bit two's complement number. This isn't strictly required, but seems slightly cleaner. The docs say "treat this as a two's complement number, but it should never be negative". If we ever read the "adjustment" codes as documented then perhaps the two's complement bit will matter more. There are still a few weird / mysterious things around aux init and this doesn't attempt to fix all of them. Mostly it's aimed at doing changes that should be _very_ safe and add a lot of clarity. Things specifically not done: A) Resolve the fact that some registers are read/modify/write and others are explicitly initted to a value. We always call tcphy_dp_aux_calibration() right after resetting the PHY so it's probably not critical, but it's a little weird that the code is inconsistent. B) Fully resolve the documented init sequence with the current one. We still have a few mystery steps and we also leave out turning on TXDA_DRV_LDO_BG_FB_EN and TXDA_DRV_LDO_BG_REF_EN, which is in the sample code. C) Clean things up to read all the bits of the calibration code. This will hopefully come in a followup change. This also doesn't attempt to document any of the other parts of the PHY--just the aux init which is all I got docs for. Reviewed-by:
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Maxime Ripard authored
If we're trying to get a handle to an optional phy, then the phy framework being disabled shouldn't return an hard error. Instead, return NULL just like phy_optional_get does when there's no phy provided in the DT. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Chunfeng Yun authored
This is used to force PHY with USB OTG function to enter a specific mode, and override OTG IDPIN(or IDDIG) signal. Signed-off-by:
Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by:
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Antoine Tenart authored
The 'modes' member of the mvebu_comphy_priv structure is not used. Remove it. Signed-off-by:
Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by:
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- 18 Oct, 2017 1 commit
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Kishon Vijay Abraham I authored
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- 03 Oct, 2017 5 commits
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Douglas Anderson authored
The function tcphy_phy_init() could return an error but the callers weren't checking the return value. They should. In at least one case while testing I saw the message "wait pma ready timeout" which indicates that tcphy_phy_init() really could return an error and we should account for it. Signed-off-by:
Guenter Roeck <groeck@chromium.org> Signed-off-by:
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Al Cooper authored
When the usb phy device mode is set to "drd", the USB port will switch between device and host modes depending on what's plugged into the port. Customers have asked for the ability to force host or device mode from software. This commit adds sysfs entries to the phy device that allow this. The sysfs for the phy device can be found at: /sys/bus/platform/drivers/brcmstb-usb-phy/*.usb-phy The following sysfs entries were added: - "dr_mode" (RO) - The current phy "dr_mode" setting. It will be set to one of the following values: - "host" - host mode - "peripheral " - device mode - "drd" - switch between device and host mode based on installed device - "typec-pd" - device/host mode is controller by the USB Type-C PD protocol. If "dr_mode" is "drd" - "drd_select" (RW) - It will be set to one of the following values: - "host" - force host mode - "device" - force device mode - "auto" - allow normal auto selection of host/device based on inserted USB device Signed-off-by:Al Cooper <alcooperx@gmail.com> Signed-off-by:
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Al Cooper authored
Add a new USB Phy driver for Broadcom STB SoCs. This driver supports Broadcom STB ARM SoCs. This driver in combination with the Broadcom STB ohci, ehci and xhci drivers will enable USB1.1, USB2.0 and USB3.0 support. This Phy driver also supports the Broadcom BDC gadget driver. Signed-off-by:
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Al Cooper authored
Add DT bindings document for Broadcom STB USB PHYs Acked-by:
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Al Cooper authored
Add Product ID and Family ID helper functions for brcmstb soc. Signed-off-by:
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- 26 Sep, 2017 7 commits
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Douglas Anderson authored
On rk3399-gru-kevin there are some cases where we're seeing AUX CH failures when trying to do DisplayPort over type C. Problems are intermittent and don't reproduce all the time. Problems are often bursty and failures persist for several seconds before going away. The failure case I focused on is: * A particular type C to HDMI adapter. * One orientation (flip mode) of that adapter. * Easier to see failures when something is plugged into the _other type C port at the same time. * Problems reproduce on both type C ports (left and right side). Ironically problems also stop reproducing when I solder wires onto the AUX CH signals on a port (even if no scope is connected to the signals). In this case, problems only stop reproducing on the port with the wires connected. From the above it appears that something about the signaling on the aux channel is marginal and any slight differences can bring us over the edge to failure. It turns out that we can fix our problems by just increasing the voltage swing of the AUX CH, giving us a bunch of extra margin. In DP up to version 1.2 the voltage swing on the aux channel was specced as .29 V to 1.38 V. In DP version 1.3 the aux channel voltage was tightened to be between .29 V and .40 V, but it clarifies that it really only needs the lower voltage when operating at the highest speed (HBR3 mode). So right now we are trying to use a voltage that technically should be valid for all versions of the spec (including version 1.3 when transmitting at HBR3). That would be great to do if it worked reliably. ...but it doesn't seem to. It turns out that if you continue to read through the DP part of the rk3399 TRM and other parts of the type C PHY spec you'll find out that while the rk3399 does support DP 1.3, it doesn't support HBR3. The docs specifically say "RBR, HBR and HBR2 data rates only". Thus there is actually no requirement to support an AUX CH swing of .4 V. Even if there is no actual requirement to support the tighter voltage swing, one could possibly argue that we should support it anyway. The DP spec clarifies that the lower voltage on the AUX CH will reduce cross talk in some cases and that seems like it could be beneficial even at the lower bit rates. At the moment, though, we are seeing problems with the AUX CH and not on the other lines. Also, checking another known working and similar laptop shows that the other laptop runs the AUX channel at a higher voltage. Other notes: * Looking at measurements done on the AUX CH we weren't actually compliant with the DP 1.3 spec anyway. AUX CH peek-to-peek voltage was measured on rk3399-gru-kevin as .466 V which is > .4 V. * With this new patch the AUX channel isn't actually 1.0 V, but it has been confirmed that the signal is better and has more margin. Eye diagram passes. * If someone were truly an expert in the Type C PHY and in DisplayPort signaling they might be able to make things work and keep the voltage at < .4 V. The Type C PHY seems to have a plethora of tuning knobs that could almost certainly improve the signal integrity. Some of these things (like enabling tx_fcm_full_margin) even seem to fix my problems. However, lacking expertise I can't say whether this is a better or worse solution. Tightening signals to give cleaner waveforms can often have adverse affects, like increasing EMI or adding noise to other signals. I'd rather not tune things like this without a healthy application of expertise that I don't have. Signed-off-by:
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Douglas Anderson authored
On some DP monitors we found that setting the wrong flip state on the AUX channel could cause the monitor to stop asserting HotPlug Detect (HPD). Setting the right flip state caused these monitors to start asserting HotPlug Detect again. Here's what we believe was happening: * We'd plug in the monitor and we'd see HPD assert * We'd quickly see HPD deassert * The kernel would try to init the type C PHY but would init it in USB mode (because there was a peripheral there but no HPD) * Because the kernel never set the flip mode properly we'd never see the HPD come back. With this change, we'll still see HPD disappear (we don't think there's anything we can do about that), but then it will come back. Overall we can say that it's sane to set the AUX channel flip state even when HPD is not asserted. NOTE: to make this change possible, I needed to do a bit of cleanup to the tcphy_dp_aux_calibration() function so that it doesn't ever clobber the FLIP state. This made it very obvious that a line of code documented as "setting bit 12" also did a bunch of other magic, undocumented stuff. For now I'll just break out the bits and add a comment that this is black magic and we'll try to document tcphy_dp_aux_calibration() better in a future CL. ALSO NOTE: the old function used to write a bunch of hardcoded values in _some_ cases instead of doing a read-modify-write. One could possibly assert that these could have had (beneficial) side effects and thus with this new code (which always does read-modify-write) we could have a bug. We shouldn't need to worry, though, since in the old code tcphy_dp_aux_calibration() was always called following the de-assertion of "reset" the the type C PHY. ...so the type C PHY was always in default state. TX_ANA_CTRL_REG_1 is documented to be 0x0 after reset. This was also confirmed by printk. Suggested-by:
Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-by:
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Dan Carpenter authored
devm_ioremap_resource() never returns NULL, it only returns error pointers so this test needs to be changed. Fixes: d0438bd6 ("phy: add the mvebu cp110 comphy driver") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Antoine Tenart authored
The pipe selector is used to select some modes (such as USB or PCIe). Otherwise it must be set to 0 (or "unconnected"). This patch does this to ensure it is not set to an incompatible value when using the supported modes (SGMII, 10GKR). Signed-off-by:
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Antoine Tenart authored
The mux value is retrieved from the mvebu_comphy_get_mux() function which returns an int. In mvebu_comphy_power_on() this int is stored to a u32 and a check is made to ensure it's not negative. Which is wrong. This fixes it. Fixes: d0438bd6 ("phy: add the mvebu cp110 comphy driver") Signed-off-by:
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Chunfeng Yun authored
Chip bank of version-1 is initialized as NULL, but it's used by pcie_phy_instance_power_on/off(), so assign it a right address. Signed-off-by:
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Arvind Yadav authored
kasprintf() can fail and it's return value must be checked. Signed-off-by:
Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by:
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- 16 Sep, 2017 7 commits
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Linus Torvalds authored
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git://git.infradead.org/linux-ubifsLinus Torvalds authored
Pull UBI updates from Richard Weinberger: "Minor improvements" * tag 'upstream-4.14-rc1' of git://git.infradead.org/linux-ubifs: UBI: Fix two typos in comments ubi: fastmap: fix spelling mistake: "invalidiate" -> "invalidate" ubi: pr_err() strings should end with newlines ubi: pr_err() strings should end with newlines ubi: pr_err() strings should end with newlines
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git://git.kernel.org/pub/scm/linux/kernel/git/rw/umlLinus Torvalds authored
Pull UML updates from Richard Weinberger: - minor improvements - fixes for Debian's new gcc defaults (pie enabled by default) - fixes for XSTATE/XSAVE to make UML work again on modern systems * 'for-linus-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: um: return negative in tuntap_open_tramp() um: remove a stray tab um: Use relative modversions with LD_SCRIPT_DYN um: link vmlinux with -no-pie um: Fix CONFIG_GCOV for modules. Fix minor typos and grammar in UML start_up help um: defconfig: Cleanup from old Kconfig options um: Fix FP register size for XSTATE/XSAVE
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git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds authored
Pull networking fixes from David Miller: 1) Fix hotplug deadlock in hv_netvsc, from Stephen Hemminger. 2) Fix double-free in rmnet driver, from Dan Carpenter. 3) INET connection socket layer can double put request sockets, fix from Eric Dumazet. 4) Don't match collect metadata-mode tunnels if the device is down, from Haishuang Yan. 5) Do not perform TSO6/GSO on ipv6 packets with extensions headers in be2net driver, from Suresh Reddy. 6) Fix scaling error in gen_estimator, from Eric Dumazet. 7) Fix 64-bit statistics deadlock in systemport driver, from Florian Fainelli. 8) Fix use-after-free in sctp_sock_dump, from Xin Long. 9) Reject invalid BPF_END instructions in verifier, from Edward Cree. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (43 commits) mlxsw: spectrum_router: Only handle IPv4 and IPv6 events Documentation: link in networking docs tcp: fix data delivery rate bpf/verifier: reject BPF_ALU64|BPF_END sctp: do not mark sk dumped when inet_sctp_diag_fill returns err sctp: fix an use-after-free issue in sctp_sock_dump netvsc: increase default receive buffer size tcp: update skb->skb_mstamp more carefully net: ipv4: fix l3slave check for index returned in IP_PKTINFO net: smsc911x: Quieten netif during suspend net: systemport: Fix 64-bit stats deadlock net: vrf: avoid gcc-4.6 warning qed: remove unnecessary call to memset tg3: clean up redundant initialization of tnapi tls: make tls_sw_free_resources static sctp: potential read out of bounds in sctp_ulpevent_type_enabled() MAINTAINERS: review Renesas DT bindings as well net_sched: gen_estimator: fix scaling error in bytes/packets samples nfp: wait for the NSP resource to appear on boot nfp: wait for board state before talking to the NSP ... -
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/inputLinus Torvalds authored
Pull more input updates from Dmitry Torokhov: "A second round of updates for the input subsystem: - a new driver for PWM-controlled vibrators - ucb1400 touchscreen driver had completely busted suspend/resume handling - we now handle "home" button found on some devices with Goodix touchscreens - assorted other fixups" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: i8042 - add Gigabyte P57 to the keyboard reset table Input: xpad - validate USB endpoint type during probe Input: ucb1400_ts - fix suspend and resume handling Input: edt-ft5x06 - fix access to non-existing register Input: elantech - make arrays debounce_packet static, reduces object code size Input: surface3_spi - make const array header static, reduces object code size Input: goodix - add support for capacitive home button Input: add a driver for PWM controllable vibrators Input: adi - make array seq static, reduces object code size -
Markus Trippelsdorf authored
Commit 5620a0d1 ("firmware: delete in-kernel firmware") removed the entire firmware directory. Unfortunately it thereby also removed the support for built-in firmware. This restores the ability to build firmware directly into the kernel by pruning the original Makefile to the necessary minimum. The default for EXTRA_FIRMWARE_DIR is now the standard directory /lib/firmware/. Fixes: 5620a0d1 ("firmware: delete in-kernel firmware") Signed-off-by:
Markus Trippelsdorf <markus@trippelsdorf.de> Acked-by:
Greg K-H <gregkh@linuxfoundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Ido Schimmel authored
The driver doesn't support events from address families other than IPv4 and IPv6, so ignore them. Otherwise, we risk queueing a work item before it's initialized. This can happen in case a VRF is configured when MROUTE_MULTIPLE_TABLES is enabled, as the VRF driver will try to add an l3mdev rule for the IPMR family. Fixes: 65e65ec1 ("mlxsw: spectrum_router: Don't ignore IPv6 notifications") Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Reported-by:
Andreas Rammhold <andreas@rammhold.de> Reported-by:
Florian Klink <flokli@flokli.de> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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