- 15 Oct, 2015 6 commits
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git://codeaurora.org/quic/kernel/agross-msmArnd Bergmann authored
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross: * Implement id_table driver matching in SMD * Avoid NULL pointer exception on remove of SMEM * Reorder SMEM/SMD configs * Make qcom_smem_get() return a pointer * Handle big endian CPUs correctly in SMEM * Represent SMD channel layout in structures * Use __iowrite32_copy() in SMD * Remove use of VLAIs in SMD * Handle big endian CPUs correctly in SMD/RPM * Handle big endian CPUs corretly in SMD * Reject sending SMD packets that are too large * Fix endianness issue in SCM __qcom_scm_is_call_available * Add missing prototype for qcom_scm_is_available() * Correct SMEM items for upper channels * Use architecture level to build SCM correctly * Delete unneeded of_node_put in SMD * Correct active/slep state flagging in SMD/RPM * Move RPM message ram out of SMEM DT node * tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm: soc: qcom: smem: Move RPM message ram out of smem DT node soc: qcom: smd-rpm: Correct the active vs sleep state flagging soc: qcom: smd: delete unneeded of_node_put firmware: qcom-scm: build for correct architecture level soc: qcom: smd: Correct SMEM items for upper channels qcom-scm: add missing prototype for qcom_scm_is_available() qcom-scm: fix endianess issue in __qcom_scm_is_call_available soc: qcom: smd: Reject send of too big packets soc: qcom: smd: Handle big endian CPUs soc: qcom: smd_rpm: Handle big endian CPUs soc: qcom: smd: Remove use of VLAIS soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it soc: qcom: smd: Represent channel layout in structures soc: qcom: smem: Handle big endian CPUs soc: qcom: Make qcom_smem_get() return a pointer soc: qcom: Reorder SMEM/SMD configs soc: qcom: smem: Avoid NULL pointer exception on remove soc: qcom: smd: Implement id_table driver matching
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Arnd Bergmann authored
Merge tag 'berlin-new-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/drivers Merge "Marvell Berlin BG2Q CPU clock driver" from Sebastian Hesselbarth: - add BG2Q CPU clock to clk driver * tag 'berlin-new-cpuclk-for-4.4-1' of git://git.infradead.org/users/hesselba/linux-berlin: clk: berlin: add cpuclk ARM: berlin: dts: add CLKID_CPU for BG2Q
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https://github.com/manabian/linux-lpcArnd Bergmann authored
Merge "PL172 driver updates for v4.4" from Joachim Eastwood: Support for additional ARM MPMCs to the PL172 driver and an update to the bindings documentation to reflect this from Vladimir Zapolskiy. "The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC, the static memory controllers on devices are similar to one found on ARM PrimeCell PL172, add support to the existing driver." * tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc: doc: dt: arm,pl172: add description of PL175 and PL176 controllers memory: pl172: add ARM PrimeCell PL176 MPMC support memory: pl172: add ARM PrimeCell PL175 MPMC support memory: pl172: correct MPMC peripheral ID register bits
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Antoine Tenart authored
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider fixed to 1. Signed-off-by:
Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Sebastian Hesselbarth authored
Marvell Berlin DT CPU clock for 4.4 - add missing CLKID_CPU for Berlin BG2Q
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Sebastian Hesselbarth authored
Marvell Berlin BG2Q SoC also has a clock for the CPU, add a corresponding CLKID to the dt-binding include. Signed-off-by:
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- 14 Oct, 2015 19 commits
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Stephen Boyd authored
SMEM is a software construct built on top of a DDR reserved region and sometimes a device memory region called RPM message ram. Having the RPM message ram in the smem DT node's reg property leads to the smem node being located in different places depending on if the message ram is being used or not. Let's add a qcom specific property, qcom,rpm-msg-ram, and point to the device memory from the SMEM node via a phandle. As SMEM is a software construct, it really needs to reside at the root of the DT regardless of whether it's using the message ram or not. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
Andy Gross <agross@codeaurora.org>
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Bjorn Andersson authored
The BIT() was incorrectly inherited from family A and should not be used on family B where the state is denoted by an enum. Reported-by:
Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@sonymobile.com> Tested-by:
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Julia Lawall authored
Device node iterators perform an of_node_put on each iteration, so putting an of_node_put before a continue results in a double put. A simplified version of the semantic match that finds this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; iterator i; @@ i(..., child, ...) { ... when != of_node_get(child) * of_node_put(child); ... * continue; } // </smpl> Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by:
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Arnd Bergmann authored
The ".arch_extension sec" directive is only available on ARMv6 or higher, so if we enable the SCM driver while building a kernel for an older CPU, we get a build error: /tmp/ccUyhMOY.s:130: Error: selected processor does not support ARM mode `smc #0' /tmp/ccUyhMOY.s:216: Error: selected processor does not support ARM mode `smc #0' /tmp/ccUyhMOY.s:373: Error: selected processor does not support ARM mode `smc #0' make[4]: *** [drivers/firmware/qcom_scm-32.o] Error 1 This changes the Makefile so we pass the ARMv7 architecture level both for the check and for the actual compilation of the scm driver. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Bjorn Andersson authored
Update the SMEM items for the second set of SMD channels, as these where incorrect. Signed-off-by:
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Rob Clark authored
Signed-off-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
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Rob Clark authored
Signed-off-by:
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Bjorn Andersson authored
Attempting to find room for a packet that's bigger than the fifo will never succeed and the calling process will be sleeping forever in the loop, waiting for enough room. So fail early instead. Reported-by:
Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
The smd structures are always in little endian, but the smd driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
The smd rpm structures are always in little endian, but this driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
Usage of VLAIS prevents clang from compiling this file, and it also opens us to the possibility of allocating a large structure on the stack to the point that we blow past the limit of the kernel stack. Remove the VLAIS and allocate a structure on the heap with kmalloc so that we're safer and more clang friendly. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
We already have a function to do this and it silences some sparse warnings along the way. Reviewed-by:
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Stephen Boyd authored
The rx and tx channel info are laid out in memory next to each other, and there are two types of channel info structures, byte based and word based. We have 4 pointers to these info structures, when we really only need two to point to the different types of structures. Encapsulate the byte based and word based tx/rx structures in a "channel pair" structure that describes the layout of memory and reduces the number of pointers in the smd channel structure by two. Reviewed-by:
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Stephen Boyd authored
The contents of smem are always in little endian, but the smem driver is not capable of being used on big endian CPUs. Annotate the little endian data members and update the code to do the proper byte swapping. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
Passing a void ** almost always requires a cast at the call site. Instead of littering the code with casts every time this function is called, have qcom_smem_get() return a void pointer to the location of the smem item. This frees the caller from having to cast the pointer. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
When I make nconfig, having the SMEM option after the SMD option causes the configurator to get confused when I'm enabling and disabling these options. Let's move SMEM before SMD so there's a clear indented dependency chain. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Stephen Boyd authored
Don't set a pointer to NULL and then dereference it in the next line. Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by:
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Bjorn Andersson authored
Implement a id_table based driver maching mechanism for drivers that binds to fixed channels and doesn't need any additional configuration, e.g. IPCRTR and DIAG. Signed-off-by:
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Arnd Bergmann authored
Merge tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers Merge "ARM System Control and Power Interface(SCPI) support" from Sudeep Holla It adds support for the following features provided by SCP firmware using different subsystems in Linux: 1. SCPI mailbox protocol driver which using mailbox framework 2. Clocks provided by SCP using clock framework 3. CPU DVFS(cpufreq) using existing arm-big-little driver 4. SCPI based sensors including temperature sensors * tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: hwmon: Support thermal zones registration for SCP temperature sensors hwmon: Support sensors exported via ARM SCP interface firmware: arm_scpi: Extend to support sensors Documentation: add DT bindings for ARM SCPI sensors cpufreq: arm_big_little: add SCPI interface driver clk: scpi: add support for cpufreq virtual device clk: add support for clocks provided by SCP(System Control Processor) firmware: add support for ARM System Control and Power Interface(SCPI) protocol Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol
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- 09 Oct, 2015 5 commits
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Arnd Bergmann authored
Merge tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers Merge "Rockchip power-domain drivers for 4.4" from Heiko Stuebner: Add the power-domain base-driver which currently contains support for the rk3288 powerdomain layout but can be easily extended for the socs (including arm64) later on. A big thanks to Ceasar Wang for pulling through on this during 18 revisions. Also included is a fix to the pm-clock handling in the generic powerdomains to adapt it to the per-user clock handling we now do, Acked by Rafael Wysocki. * tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: power-domain: Add power domain driver dt-bindings: add document of Rockchip power domains PM / clk: Do not __clk_get passed in clock-references dt-bindings: add power-domain header for RK3288 SoCs
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Punit Agrawal authored
Add support to create thermal zones based on the temperature sensors provided by the SCP. The thermal zones can be defined using the thermal DT bindings and should refer to the SCP sensor id to select the sensor. Signed-off-by:
Punit Agrawal <punit.agrawal@arm.com> Acked-by:
Guenter Roeck <linux@roeck-us.net> Cc: Eduardo Valentin <edubezval@gmail.com>
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Punit Agrawal authored
Create a driver to add support for SoC sensors exported by the System Control Processor (SCP) via the System Control and Power Interface (SCPI). The supported sensor types is one of voltage, temperature, current, and power. The sensor labels and values provided by the SCP are exported via the hwmon sysfs interface. Signed-off-by:
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Punit Agrawal authored
ARM System Control Processor (SCP) provides an API to query and use the sensors available in the system. Extend the SCPI driver to support sensor messages. Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com>
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Punit Agrawal authored
The System Control Processor (SCP) provides access to SoC sensors via the System Control and Power Interface (SCPI) Message Protocol. Add bindings to allow probing of these sensors. Also support referencing of the sensors for setting up thermal zones via the thermal DT bindings. Signed-off-by:
Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com>
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- 08 Oct, 2015 2 commits
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Arnd Bergmann authored
Merge tag 'at91-cleanup-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers Merge "First batch of cleanups for 4.4:" from Alexandre Belloni: - properly get the slow clock from timer-atmel-st, tcb_clksrc and pwm-atmel-tcb - small fix in an error path for tcb_clksrc * tag 'at91-cleanup-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: misc: atmel_tclib: get and use slow clock clocksource: tcb_clksrc: fix setup_clkevents error path clocksource: atmel-st: get and use slow clock
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Andy Gross authored
Qualcomm fixes for v4.3-rc1 * Add SCM function call stubs on ARM64
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- 06 Oct, 2015 8 commits
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Arnd Bergmann authored
Merge tag 'renesas-clk-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Merge "Renesas ARM Based SoC Clk Updates for v4.4" from Simon Horman: * Consider "zb_clk" suitable for power management This part of a multi-stage effort by Geert Uytterhoeven to add: "Clock Domain support to the Clock Pulse Generator (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain, to be used on shmobile SoCs without device power domains (R-Car Gen1 and Gen2, RZ). This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume, similar to SoCs with device power domains (SH-Mobile and R-Mobile)." * tag 'renesas-clk-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: clk: shmobile: mstp: Consider "zb_clk" suitable for power management
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Boris Brezillon authored
Commit dca1a4b5 ("clk: at91: keep slow clk enabled to prevent system hang") added a workaround for the slow clock as it is not properly handled by its users. Get and use the slow clock as it is necessary for the timer counters. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by:
Thierry Reding <thierry.reding@gmail.com>
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Boris Brezillon authored
t2_clk is already disabled before request_irq(), it must not be disabled again. Signed-off-by:
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Alexandre Belloni authored
The current slow clock rate is hardcoded. Properly get the slow clock and use its rate. Signed-off-by:
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Caesar Wang authored
This driver is found on RK3288 SoCs. In order to meet high performance and low power requirements, a power management unit is designed or saving power when RK3288 in low power mode. The RK3288 PMU is dedicated for managing the power of the whole chip. PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON register. After setting the register, PMU would enter the Low Power mode. In the low power mode, pmu will auto power on/off the specified power domain, send idle req to specified power domain, shut down/up pll and so on. All of above are configurable by setting corresponding registers. Signed-off-by:
Caesar Wang <wxt@rock-chips.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> [replace dsb() with dsb(sy) for arm64 buildability; sy is the default, so no functional change; adapt to per-user clocks in genpd] Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Caesar Wang authored
This add the necessary binding documentation for the power domains found on Rockchip SoCs. Signed-off-by:
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Heiko Stuebner authored
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Stephen Boyd authored
Clock references are on a per-user basis now, so they are not supposed to be refcounted by itself anymore. Therefore multiple cascaded get and put calls will fail. When a clock reference gets passed into pm_clk_add_clk we can assume that the pm clock handling will take control of the clock reference, so after this functions returns the caller should've given up control of that handle. So remove the additional call to __clk_get() in __pm_clk_add(). The only current user of pm_clk_add_clk is drivers/clk/shmobile/clk-mstp.c which already follows this paradigm by only getting the clock but not puting it after passing the reference into pm_clk_add_clk. In the error case the caller is expected to clean up the clock, as it may very well try to do something different if pm_clk_add_clk() fails. Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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