This patch adds missing bootargs for R-Car V4H White Hawk board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k06858oe.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds missing bootargs for R-Car S4 Spider board.

One note is that current Spider board doesn't have Ethernet
support yet, but this patch adds standard settings for it, too.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87leqo58ox.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The serial console and serial debug ports on Spider are located on the
CPU board.  Hence move the aliases and chosen nodes containing serial
port configuration from the main Spider DTS file to the DTS file that
describes the CPU board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/c03500bb10eae10caeb3f4f97bc979eeee6cce75.1663167551.git.geert+renesas@glider.be

Describe the wiring of the first Ethernet AVB instance to the Micrel
KSZ9031RNXVB PHY.

Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/50a31bc8267ab4c90bff27ef3aca1169f8ebc7ae.1662715538.git.geert+renesas@glider.be

The serial console port on White Hawk is located on the CPU board.
Hence move the aliases and chosen nodes containing serial console
configuration from the main White Hawk DTS file to the DTS file that
describes the CPU board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b03b74f4b5ee3c3e828e753beb334ec43162c132.1662715538.git.geert+renesas@glider.be

Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be

Describe the three Push Switches on the White Hawk CPU board, so
they can be used for user input.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e18d0d5087a514db611295f5d1e13c950cf7dae7.1662715538.git.geert+renesas@glider.be

Describe the three General Purpose LEDs on the White Hawk CPU board, so
they can be used as indicator LEDs.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/007acd941ef925057f1f9b925ed4e339dbd29a74.1662715538.git.geert+renesas@glider.be

Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car V4H (R8A779G0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/81176a5e12a5828cdcdd4b107d0b2e5970232c31.1662715538.git.geert+renesas@glider.be

Add a DTS file for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1)
sub-board (RTP8A779G0ASKB0SE0SA000), and include it from the main
r8a779g0-white-hawk.dts.

For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/991600919513dd05a9a7d9c170c6924baf14d1a2.1662715538.git.geert+renesas@glider.be

Add a DTS file for the R-Car V4H White Hawk CSI/DSI sub-board
(RTP8A779G0ASKB0SC0SA000), and include it from the main
r8a779g0-white-hawk.dts.

For now its contents are limited to the Board ID EEPROM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/265f7782743c539c57906e8207785f8b0d80d5d0.1662715538.git.geert+renesas@glider.be

Enable the I2C0 bus on the White Hawk CPU board, and describe the I2C
EEPROMs present on the White Hawk CPU and BreakOut boards.

Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d01cada6f2d3e44dd6cb26cfa8e4ce6382f1fbff.1662715538.git.geert+renesas@glider.be

Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4H
(R8A779G0) SoC.

Extracted from a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/272fd18fed2d7addfbdb7945ae2134988a7c3a7e.1662715538.git.geert+renesas@glider.be

Complete the description of the serial console and the external serial
clock by adding pin control.

Based on larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/74c862ef6e46b4af398d9b371ff38fae17b3db05.1662715538.git.geert+renesas@glider.be

Add a device node for the Pin Function Controller on the Renesas R-Car
V4H (R8A779G0) SoC.

Based on a larger patch in the BSP by Takeshi Kihara.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ecddcadd2fad46b1cf4c9be3ec750f360b9730e4.1662715538.git.geert+renesas@glider.be

Enable the watchdog timer on the White Hawk CPU board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/77a0e29d965032115de1f07ceecb2d5d07db74eb.1662715538.git.geert+renesas@glider.be

Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car V4H (R8A779G0) SoC.

Based on a patch in the BSP by Thanh Quan.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/187904c279be6654ea3deb11b7250b64dd18c3b5.1662715538.git.geert+renesas@glider.be

The CN10/CN11 on RZ/N1-EB board are headers to add jumpers to select which
CAN interface to route to the real CAN connector J16.

For a normal use case either we need to wire CAN1 or CAN2, but not both.

This patch enables CAN1 and disables CAN2 by default assuming CN10/CN11
is wired for CAN1.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220902062752.56841-1-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add CAN{0,1} nodes to R9A06G032 (RZ/N1) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220830164518.1381632-3-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

There is not much point in having separate entries for the ARM/Renesas
ARM64 and ARM/SH-Mobile ARM architectures, as they have the same
maintainers, use the same development collaboration infrastructure, and
share many files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/a869b8afdc47aa637ebeefcc1ca7bc61244f34b9.1660898008.git.geert+renesas@glider.be

Renesas fixes for v6.0

  - Fix the serial console on the Renesas White Hawk development board.

This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board
basic support.
Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87y1v64nko.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC
support. It is using r8a77980 (= V3H) setting as-is for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zgfm4nkw.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

We have V3H Condor board, and will have V3H2 Condor-I board.
This patch adds condor-common.dtsi to share the common settings
between these boards.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/871qsy625m.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

With 'unevaluatedProperties' support implemented, there are a number of
warnings when running dtbs_check:

arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected)
	From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

The main problem is that the DT bindings do not allow clock-names.
So just drop the clock-names properties from the SoC DTSI files.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add MSIOF nodes for R-Car S4-8.
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[thanh: added DMA]
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
[wsa: removed mso clock from clocks-property]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220829124130.2412-1-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to
"iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware
Rev. 1.00.

See also commit a636d803 ("arm64: dts: renesas: rzg2: Rename
i2c_dvfs to iic_pmic"), which apparently forgot to update RZ/G2H.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7d60653d4d63904dc025a133297a53eb885fa064.1661525361.git.geert+renesas@glider.be

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-5-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-4-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-2-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add device nodes for the I2C controllers that are not assigned to the
ISP.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The interrupt number for the HSCIF0 serial port, which serves as the
serial console on the White Hawk board, is incorrect, causing userspace
to hang immediately as soon as it tries to print something.
Kernel output is unaffected, as it is printed using polling.

Fixes: 987da486 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804190846.128370-1-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the RZ/G2UL Hardware User's Manual (Rev.1.00 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: cf40c968 ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-3-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 7c2b8198 ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-2-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>