- 02 Dec, 2013 40 commits
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Hante Meuleman authored
dhd_proto.h was cleaned up and prototypes were moved to dhd.h. dhd_proto.h was removed. This is a step in cleaning and restucturing protocol layer. Reviewed-by:
Arend Van Spriel <arend@broadcom.com> Reviewed-by:
Pieter-Paul Giesberts <pieterpg@broadcom.com> Signed-off-by:
Hante Meuleman <meuleman@broadcom.com> Signed-off-by:
John W. Linville <linville@tuxdriver.com>
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Hante Meuleman authored
dhd_cdc is renamed to bcdc. This is a step in cleaning and restructuring protocol layer. This is done so new protocols can be added in the future. This step only renames the source files. Reviewed-by:
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Franky Lin authored
New WiFi full dongle supports receiving chained packets in one command through the SDIO bus. This patch adds the support on the host side to send chained packets. Reviewed-by:
Franky Lin <frankyl@broadcom.com> Signed-off-by:
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Franky Lin authored
Add firmware/nvram file name for bcm4339 so fmac can actually be functional with the chip. Reviewed-by:
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Arend van Spriel authored
When CONFIG_BRCMDBG is not set we get the following build issue: CC [M] drivers/net/wireless/brcm80211/brcmfmac/fwsignal.o drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c: In function ‘brcmf_fws_hdrpush’: drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c:852:18: error: ‘BRCMF_FWS_TYPE_SEQ_LEN’ undeclared The define BRCMF_FWS_TYPE_SEQ_LEN was introduced by: commit 6918f38e4ed4e0493a90a4331e0033bdfc806e00 Author: Hante Meuleman <meuleman@broadcom.com> Date: Wed Oct 23 14:58:51 2013 +0200 brcmfmac: Update fwsignal to fix out of order tx. Unfortunately, it was put in conditional part of the source file under #ifdef DEBUG. Reviewed-by: -
Arend van Spriel authored
The commit "eb9c174 brcmfmac: determine host controller related variables during probe" was not implemented correctly as the information is already needed in brcmf_sdbrcm_probe(). This patch moves it to brcmf_sdioh_attach() instead. Reviewed-by:
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Arend van Spriel authored
The SDPCM header can be traced, but it used a fixed header size. With txglom feature the SDPCM header will have additional 8 bytes of hardware extension header so SDIO core can properly handle the txglom packet. Reviewed-by:
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Arend van Spriel authored
The brcmsmac relies BCMA functionality to access the device. This patch selects CONFIG_BCMA when CONFIG_BCMA_POSSIBLE is set. This way the user does not need to be select BCMA to make the brcmsmac driver show up in his menuconfig. Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
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Arend van Spriel authored
The SleepCSR register is accessed to wakeup the device from the host side. Depending on the state of the device this may take multiple attempts. The failed attempt are not real failures so reduce the log level specifically for this register. The calling function will scream when the multiple attempts all failed. Reviewed-by:
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Franky Lin authored
remove empty brcmf_proto_stop from protocol layer Reviewed-by:
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Arend van Spriel authored
Moving the call to netif_start_queue() after brcmf_cfg80211_up() is completed successful. If not return -EIO instead of -1 as that results in 'Operation not permitted' which can put user on wrong track. Reviewed-by:
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Arend van Spriel authored
The bus-specific interface allowed a list of dongle commands to be provided to the common driver part. However, upcoming functionality requires a more dynamic behaviour. Hence the list is replaced by a new callback function so the bus-specific driver part can implement this behaviour. Reviewed-by:
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Arend van Spriel authored
The common driver needs the packet overhead for the bus in order to reserve headroom for sk_buffs. For the SDIO driver this depends on firmware features so it is not possible to provide it in the brcmf_attach() call. Reviewed-by:
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Hante Meuleman authored
When using fwsignal it is possible that tx packets get delivered out of order. This patch fixes that by reordering suppressed packets and tracking generation bit and sequence number per packet. Reviewed-by:
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Sujith Manoharan authored
This is missing for AR9300, AR9580 and AR9340. Signed-off-by:
Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by:
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Sujith Manoharan authored
* Baseband updates * Remove ar9340Common_rx_gain_table_1p0 since it is a duplicate. Signed-off-by:
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Sujith Manoharan authored
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Sujith Manoharan authored
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Sujith Manoharan authored
The initvals for AR9462 v2.1 are very similar to v2.0. Identify duplicate arrays and reuse the values from v2.0 to reduce module size. Signed-off-by:
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Sujith Manoharan authored
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Sujith Manoharan authored
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Sujith Manoharan authored
The initialization arrays for v1.1 AR9565 are mostly the same as v1.0/v1.0.1 except for radio_postamble. Signed-off-by:
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Sujith Manoharan authored
Since IQ calibration is done as part of AGC calibration for AR9485 and above, remove the seperate IQ calibration code. Signed-off-by:
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Felix Fietkau authored
The CHANNEL_HT flag is insignificant for fast channel change conditions, since it does not affect any important part of the hardware reset / channel setup. Scanning usually runs with HT disabled, so this change will slightly improve scan time on many chipsets. Signed-off-by:
Felix Fietkau <nbd@openwrt.org> Signed-off-by:
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Felix Fietkau authored
A cold reset can be triggered because of DMA stop issues, and this leads to TSF being cleared on all chipsets. To properly deal with this, always save the TSF. Additionally, account for the time it takes to do the actual chip reset, which can be quite significant. On AR9344 it takes around 4.5 ms. Signed-off-by:
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Felix Fietkau authored
Instead of checking the queues in a loop with hardcoded sleep times inbetween, use a wait queue to trigger queue checks after the tx processing tasklet has run. Signed-off-by:
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Felix Fietkau authored
If the software has processed all packets, checking the hardware queue is unnecessary. Signed-off-by:
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Felix Fietkau authored
When operating in client mode, the short period of time between scanning and associating is often enough to put the hardware through several FULL-SLEEP <-> AWAKE transitions, each wakeup requiring a reset to fully recover the hardware. This is completely unnecessary and can easily be avoided by deferring the switch to full sleep. Signed-off-by:
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Sujith Manoharan authored
Since calibration data reuse is not enabled in SoC chips, simplify the IQ calibration code. Signed-off-by:
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Sujith Manoharan authored
CL calibration is applicable for all chips and the enable/disable knob comes via the INI file. For PCOEM chips, the calibration data is reused when Fast Channel Change is used. Caldata reuse is not enabled for SoC chips, so remove the CL post processing code. Signed-off-by:
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Sujith Manoharan authored
TX IQ calibration is always enabled for SoC chips. Signed-off-by:
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Sujith Manoharan authored
RTT is enabled only for AR9462 and MCI for AR9462/AR9565. Also, manual peak calibration is not done for any of the SoC chips. Signed-off-by:
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Sujith Manoharan authored
Though there is some overlap between the calibration mechanisms of PC-OEM cards and SoC chip families, dumping both of them into a single function makes things hard to understand. ar9003_hw_init_cal() is unreadable with chip-specific segments scattered around. To make the logic understandable, use different functions for client cards and SoC chips. Some code is duplicated, but in the long run, it makes the code more maintanable. Signed-off-by:
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Dan Carpenter authored
SC_OP_INVALID is zero so the test is always false. We're supposed to be testing the lowest bit instead. Fixes: 89f927af ('ath9k: add TX99 support') Signed-off-by:
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Sujith Manoharan authored
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Sujith Manoharan authored
CUS227, which is an AR9340 based card used in Qualcomm's Allplay platforms requires a custom TX gain array, based on the index 7. Add suport for this. Cc: Michael Larson <mlarson@qce.qualcomm.com> Cc: Stephen Collmeyer <scollmey@qce.qualcomm.com> Signed-off-by:
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Sujith Manoharan authored
This HW config option is always set to true and is not needed. Signed-off-by:
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Sujith Manoharan authored
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Sujith Manoharan authored
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Sujith Manoharan authored
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