Add support for recent chipsets (including G5 ATA/100), update
resource management.

Adapt to "macio" driver infrastructure, cleanup power management, make some
functions static, fix IO accessors, remove local list of commands/directions,
etc...

This driver could use more work & study of the interesting ASIC bugs
documented in Apple source code...

Note that I'm removing support for the CHRP machines using the MESH as
part of the "Hydra" ASIC. Nobody sane really uses that, but if one of
the 3 remaining  Longtrail users want to fix that, then move Hydra to
use the "macio" model...

Adapt to the "macio" driver infrastructure, cleanup IO accessors,
remove local list of command/directions, uses infos provided by
the SCSI layer. This driver certainly could use some more work.

The cascaded northbridge MPIC is currently dealt with a special
modified version of open_pic.c (open_pic2.c). A better mecanism
will have to be found for 2.7

Create a low-level synchronous implementation suitable for use
by the early boot platform code or other places where the
asynchronous driver isn't useable. This also exports the locks
used by the real driver to avoid collisions.
Use this new implementation to properly setup the clock chip
at boot on Apple latest laptops

add support for newer laptops and G5 desktops

move drivers/macintosh/nvram.c to drivers/char/generic_nvram.c,
update platform hooks,
fix powermac nvram driver for newer machines

especially related to the use of the btext early debug text
engine

It would fail to properly release the resource if taken over
by the macio device resource hierarchy. This could still use
some locking, but the io resource lock isn't exported

Without this, page aging is broken on ppc32

Another processor could be walking the page table in the middle of the
PTE page to be freeded. Synchronize with hash_page using the lock.

Add a fix fox machines that don't have HW timebase sync facility

used on machines that don't have a HW facility (or we don't drive
it yet like G5s)

contains a hack that is unfixable at the moment for getting the
IO base which is hard coded to bus number 0 (AGP on earlier machines).
We work around this by passing the IO base of bus 0xf0 when asked
for bus 0 in pciconfig_iobase on those machines. Bus 0 is the HT
root and has no IOs, so that is safe.

We no longer modify the device tree, we use an initdata static
array instead.

TI controller, add some for fixing up ATA & SATA controllers (switch normal
ATA to fully native mode and disable unused function on G5 K2 SATA)

Now that Al Viro fixed cramfs, it works beautifully as an initrd
filesystem.

So finally plumb it in.

into kernel.bkbits.net:/home/davem/sparc-2.6

o Cleanup reduced and faster code

o gcc-3.4 warning fix.

o Deleted obsolute header include

into home.osdl.org:/home/torvalds/v2.5/linux

into home.osdl.org:/home/torvalds/v2.5/linux