- 27 Jun, 2024 1 commit
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Venkata Prahlad Valluru authored
Rb3Gen2 has a lt9611uxc DSI-to-HDMI bridge on i2c0, with reset gpio from pm7250b gpio2 and irq gpio from tlmm gpio24. Bridge supplies are Vdd connected to input supply directly and vcc to L11c. Enable HDMI output, bridge and corresponding DSI output. Signed-off-by:
Venkata Prahlad Valluru <quic_vvalluru@quicinc.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240528141954.7567-1-quic_vvalluru@quicinc.comSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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- 26 Jun, 2024 8 commits
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Caleb Connolly authored
These are documented and supported everywhere, but not described in DT. Add them. Signed-off-by:
Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240624120849.2550621-2-caleb.connolly@linaro.orgSigned-off-by:
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Sibi Sankar authored
Add fastrpc nodes for ADSP and CDSP on X1E80100 SoC. Signed-off-by:
Sibi Sankar <quic_sibis@quicinc.com> Link: https://lore.kernel.org/r/20240624100214.189991-1-quic_sibis@quicinc.comSigned-off-by:
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Sibi Sankar authored
Add the CPU and LLCC BWMONs on X1E80100 SoCs. Tested-by:
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Chukun Pan authored
Add node to support mmc controller inside of IPQ6018. This controller supports both eMMC and SD cards. Tested with: eMMC (HS200) SD Card (SDR50/SDR104) Signed-off-by:
Chukun Pan <amadeus@jmu.edu.cn> Link: https://lore.kernel.org/r/20240620150122.1406631-3-amadeus@jmu.edu.cnSigned-off-by:
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Odelu Kukatla authored
Add clocks which need to be enbaled for configuring QoS on sc7280. Signed-off-by:
Odelu Kukatla <quic_okukatla@quicinc.com> Reviewed-by:
Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20240607173927.26321-5-quic_okukatla@quicinc.comSigned-off-by:
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Jagadeesh Kona authored
Add device nodes for video and camera clock controllers on Qualcomm SM8650 platform. Signed-off-by:
Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by:
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Bjorn Andersson authored
Merge the SM8650 video and clock controller drivers to gain access to the constants from the DeviceTree binding.
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Jagadeesh Kona authored
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8650 platform. Signed-off-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by:
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- 25 Jun, 2024 8 commits
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Jagadeesh Kona authored
Add device tree bindings for the camera clock controller on Qualcomm SM8650 platform. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
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Jagadeesh Kona authored
Update the order of SC8280XP camcc header file in SM8450 camcc bindings. Signed-off-by:
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Jagadeesh Kona authored
Add support to the SM8650 video clock controller by extending the SM8550 video clock controller, which is mostly identical but SM8650 has few additional clocks and minor differences. Signed-off-by:
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Jagadeesh Kona authored
Add support for videocc XO clk ares for consumer drivers to be able to request this reset. Fixes: f53153a3 ("clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550") Signed-off-by:
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Jagadeesh Kona authored
SM8650 video clock controller has most clocks same as SM8450, but it also has few additional clocks and resets. Add device tree bindings for the video clock controller on Qualcomm SM8650 platform by defining these additional clocks and resets on top of SM8450. Signed-off-by:
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Jagadeesh Kona authored
Correct the videocc header file name in SM8450 videocc bindings. Fixes: 1e910b2b ("dt-bindings: clock: qcom: Add SM8450 video clock controller") Signed-off-by:
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Dmitry Baryshkov authored
Define the themal zones using the temperature values in stage1 for this platform so that the spmi-temp-alarm driver becomes active. Signed-off-by:
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Srinivas Kandagatla authored
Add audio support to QCP platform which includes 2 x Speakers Headset Mic and Headset support. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20240624-qcp-audio-v1-1-323a6b5e1fe5@linaro.orgSigned-off-by:
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- 23 Jun, 2024 10 commits
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Bartosz Golaszewski authored
Add a 20MB reserved memory region for use by SCM calls. Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240527-shm-bridge-v10-15-ce7afaa58d3a@linaro.orgSigned-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
Luca Weiss <luca@lucaweiss.eu> Reviewed-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Rajendra Nayak authored
Add tsens and thermal zones nodes for x1e80100 SoC. Signed-off-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Reviewed-by:
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Luca Weiss authored
PM8008 regulators are used for the cameras found on FP5. Configure the chip and its voltages. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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Luca Weiss authored
PM8008 regulators are used for the cameras found on FP4. Configure the chip and its voltages. Signed-off-by:
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Lin, Meng-Bo authored
There is PM8916 Battery voltage monitor on GPLUS FL8005A. Add PM8916 BMS and the battery to the device tree. Signed-off-by:
Lin, Meng-Bo <linmengbo06890@proton.me> Reviewed-by:
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Valeriy Klimin authored
Add the compatible for this device. Signed-off-by:
Valeriy Klimin <vdos63@gmail.com> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
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- 21 Jun, 2024 13 commits
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Johan Hovold authored
Enable the PM8008 PMIC which is used to power the camera sensors. Reviewed-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Tengfei Fan authored
Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe, I2C functions support. Here is a diagram of AIM300 AIoT Carrie Board and SoM +--------------------------------------------------+ | AIM300 AIOT Carrier Board | | | | +-----------------+ | |power----->| Fixed regulator |---------+ | | +-----------------+ | | | | | | v VPH_PWR | | +----------------------------------------------+ | | | AIM300 SOM | | | | | |VPH_PWR | | | | v | | | | +-------+ +--------+ +------+ | | | | | UFS | | QCS8550| |PMIC | | | | | +-------+ +--------+ +------+ | | | | | | | +----------------------------------------------+ | | | | +----+ +------+ | | |USB | | UART | | | +----+ +------+ | +--------------------------------------------------+ Co-developed-by:
Qiang Yu <quic_qianyu@quicinc.com> Signed-off-by:
Ziyue Zhang <quic_ziyuzhan@quicinc.com> Signed-off-by:
Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20240618072202.2516025-5-quic_tengfan@quicinc.comSigned-off-by:
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Tengfei Fan authored
AIM300 Series is a highly optimized family of modules designed to support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip etc. Here is a diagram of AIM300 SoM: +----------------------------------------+ |AIM300 SoM | | | | +-----+ | | |--->| UFS | | | | +-----+ | | | | | | | 3.7v | +-----------------+ | +---------+ | ---------->| PMIC |----->| QCS8550 | | | +-----------------+ +---------+ | | | | | | | | | +-----+ | | |--->| ... | | | +-----+ | | | +----------------------------------------+ Co-developed-by:Fenglin Wu <quic_fenglinw@quicinc.com> Signed-off-by:
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Tengfei Fan authored
QCS8550 is derived from SM8550. The difference between SM8550 and QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used in IoT products. QCS8550 firmware has different memory map compared to SM8550. The memory map will be runtime added through bootloader. There are 3 types of reserved memory regions here: 1. Firmware related regions which aren't shared with kernel. The device tree source in kernel doesn't need to have node to indicate the firmware related reserved information. Bootloader converys the information by updating devicetree at runtime. This will be described as: UEFI saves the physical address of the UEFI System Table to dts file's chosen node. Kernel read this table and add reserved memory regions to efi config table. Current reserved memory region may have reserved region which was not yet used, release note of the firmware have such kind of information. 2. Firmware related memory regions which are shared with Kernel The device tree source in the kernel needs to include nodes that indicate fimware-related shared information. A label name is suggested because this type of shared information needs to be referenced by specific drivers for handling purposes. Unlike previous platforms, QCS8550 boots using EFI and describes most reserved regions in the ESRT memory map. As a result, reserved memory regions which aren't relevant to the kernel(like the hypervisor region) don't need to be described in DT. 3. Remoteproc regions. Remoteproc regions will be reserved and then assigned to subsystem firmware later. Here is a reserved memory map for this platform: 0x80000000 +-------------------+ | | | Firmware Related | | | 0x8a800000 +-------------------+ | | | Remoteproc Region | | | 0xa7000000 +-------------------+ | | | Kernel Available | | | 0xd4d00000 +-------------------+ | | | Firmware Related | | | 0x100000000 +-------------------+ Reviewed-by: -
Tengfei Fan authored
Document QCS8550 SoC and the AIM300 AIoT board bindings. QCS8550 is derived from SM8550. The difference between SM8550 and QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used in IoT scenarios. AIM300 Series is a highly optimized family of modules designed to support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip etc. AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT. Reviewed-by:
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Komal Bajaj authored
Update the usb interrupts properties to fix the following bindings check errors: usb@a6f8800: interrupt-names:0: 'pwr_event' was expected from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# usb@a6f8800: interrupt-names:1: 'hs_phy_irq' was expected from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# usb@a6f8800: interrupt-names: ['hs_phy_irq', 'ss_phy_irq', 'dm_hs_phy_irq', 'dp_hs_phy_irq'] is too short from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# Fixes: dd1bd5bf ("arm64: dts: qcom: qdu1000: Add USB3 and PHY support") Cc: Krishna Kurapati <quic_kriskura@quicinc.com> Reported-by:kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202406171241.YKuCm3SC-lkp@intel.com/Signed-off-by:
Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by:
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Bartosz Golaszewski authored
Add a node for the PMU module of the QCA6391 present on the RB5 board. Assign its LDO power outputs to the existing Bluetooth module. Add a node for the PCIe port to sm8250.dtsi and define the WLAN node on it in the board's .dts and also make it consume the power outputs of the PMU. Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # OnePlus 8T Signed-off-by:
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Neil Armstrong authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by:
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Bartosz Golaszewski authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. [Neil: authored the initial version of the change] Co-developed-by:
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Bartosz Golaszewski authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. [Neil: authored the initial version of the change] Co-developed-by:
Amit Pundir <amit.pundir@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Signed-off-by:
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Lin, Meng-Bo authored
Enable sound and modem for the GPLUS FL8005A. The setup is similar to most MSM8916 devices, i.e.: - QDSP6 audio - Earpiece/headphones/microphones via digital/analog codec in MSM8916/PM8916 - WWAN Internet via BAM-DMUX Signed-off-by:
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Luca Weiss authored
Without explicitly specifying names for the regulators they are named based on the DeviceTree node name. This results in multiple regulators with the same name, making debug prints and regulator_summary impossible to reason about. Signed-off-by:
Caleb Connolly <caleb@postmarketos.org> Link: https://lore.kernel.org/r/20240618-qcm6490-regulator-name-v1-2-69fa05e9f58e@fairphone.comSigned-off-by:
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Luca Weiss authored
Without explicitly specifying names for the regulators they are named based on the DeviceTree node name. This results in multiple regulators with the same name, making debug prints and regulator_summary impossible to reason about. Signed-off-by:
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