marvell.c 61.7 KB
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// SPDX-License-Identifier: GPL-2.0+
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/*
 * drivers/net/phy/marvell.c
 *
 * Driver for Marvell PHYs
 *
 * Author: Andy Fleming
 *
 * Copyright (c) 2004 Freescale Semiconductor, Inc.
 *
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 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
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 */
#include <linux/kernel.h>
#include <linux/string.h>
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#include <linux/ctype.h>
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#include <linux/errno.h>
#include <linux/unistd.h>
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#include <linux/hwmon.h>
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#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
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#include <linux/marvell_phy.h>
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#include <linux/bitfield.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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#define MII_MARVELL_PHY_PAGE		22
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#define MII_MARVELL_COPPER_PAGE		0x00
#define MII_MARVELL_FIBER_PAGE		0x01
#define MII_MARVELL_MSCR_PAGE		0x02
#define MII_MARVELL_LED_PAGE		0x03
#define MII_MARVELL_MISC_TEST_PAGE	0x06
#define MII_MARVELL_WOL_PAGE		0x11
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#define MII_M1011_IEVENT		0x13
#define MII_M1011_IEVENT_CLEAR		0x0000

#define MII_M1011_IMASK			0x12
#define MII_M1011_IMASK_INIT		0x6400
#define MII_M1011_IMASK_CLEAR		0x0000

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#define MII_M1011_PHY_SCR			0x10
#define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
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#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
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#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
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#define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
#define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
#define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
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#define MII_M1011_PHY_SSR			0x11
#define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)

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#define MII_M1111_PHY_LED_CONTROL	0x18
#define MII_M1111_PHY_LED_DIRECT	0x4100
#define MII_M1111_PHY_LED_COMBINE	0x411c
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#define MII_M1111_PHY_EXT_CR		0x14
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#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
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#define MII_M1111_RGMII_RX_DELAY	BIT(7)
#define MII_M1111_RGMII_TX_DELAY	BIT(1)
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#define MII_M1111_PHY_EXT_SR		0x1b
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#define MII_M1111_HWCFG_MODE_MASK		0xf
#define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
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#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
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#define MII_M1111_HWCFG_MODE_RTBI		0x7
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#define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
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#define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
#define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
#define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
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#define MII_88E1121_PHY_MSCR_REG	21
#define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
#define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
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#define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
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#define MII_88E1121_MISC_TEST				0x1a
#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
#define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
#define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f

#define MII_88E1510_TEMP_SENSOR		0x1b
#define MII_88E1510_TEMP_SENSOR_MASK	0xff

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#define MII_88E1540_COPPER_CTRL3	0x1a
#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)

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#define MII_88E6390_MISC_TEST		0x1b
#define MII_88E6390_MISC_TEST_SAMPLE_1S		0
#define MII_88E6390_MISC_TEST_SAMPLE_10MS	BIT(14)
#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE	BIT(15)
#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE	0
#define MII_88E6390_MISC_TEST_SAMPLE_MASK	(0x3 << 14)

#define MII_88E6390_TEMP_SENSOR		0x1c
#define MII_88E6390_TEMP_SENSOR_MASK	0xff
#define MII_88E6390_TEMP_SENSOR_SAMPLES 10

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#define MII_88E1318S_PHY_MSCR1_REG	16
#define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
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/* Copper Specific Interrupt Enable Register */
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#define MII_88E1318S_PHY_CSIER				0x12
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/* WOL Event Interrupt Enable */
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#define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
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/* LED Timer Control Register */
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#define MII_88E1318S_PHY_LED_TCR			0x12
#define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
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/* Magic Packet MAC address registers */
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#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
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#define MII_88E1318S_PHY_WOL_CTRL				0x10
#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
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#define MII_PHY_LED_CTRL	        16
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#define MII_88E1121_PHY_LED_DEF		0x0030
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#define MII_88E1510_PHY_LED_DEF		0x1177
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#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
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#define MII_M1011_PHY_STATUS		0x11
#define MII_M1011_PHY_STATUS_1000	0x8000
#define MII_M1011_PHY_STATUS_100	0x4000
#define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
#define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
#define MII_M1011_PHY_STATUS_RESOLVED	0x0800
#define MII_M1011_PHY_STATUS_LINK	0x0400

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#define MII_88E3016_PHY_SPEC_CTRL	0x10
#define MII_88E3016_DISABLE_SCRAMBLER	0x0200
#define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
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#define MII_88E1510_GEN_CTRL_REG_1		0x14
#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
#define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */

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#define LPA_FIBER_1000HALF	0x40
#define LPA_FIBER_1000FULL	0x20

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#define LPA_PAUSE_FIBER		0x180
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#define LPA_PAUSE_ASYM_FIBER	0x100

#define ADVERTISE_FIBER_1000HALF	0x40
#define ADVERTISE_FIBER_1000FULL	0x20

#define ADVERTISE_PAUSE_FIBER		0x180
#define ADVERTISE_PAUSE_ASYM_FIBER	0x100

#define REGISTER_LINK_STATUS	0x400
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#define NB_FIBER_STATS	1
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MODULE_DESCRIPTION("Marvell PHY driver");
MODULE_AUTHOR("Andy Fleming");
MODULE_LICENSE("GPL");

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struct marvell_hw_stat {
	const char *string;
	u8 page;
	u8 reg;
	u8 bits;
};

static struct marvell_hw_stat marvell_hw_stats[] = {
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	{ "phy_receive_errors_copper", 0, 21, 16},
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	{ "phy_idle_errors", 0, 10, 8 },
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	{ "phy_receive_errors_fiber", 1, 21, 16},
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};

struct marvell_priv {
	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
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	char *hwmon_name;
	struct device *hwmon_dev;
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};

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static int marvell_read_page(struct phy_device *phydev)
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{
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	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
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}

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static int marvell_write_page(struct phy_device *phydev, int page)
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{
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	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
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}

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static int marvell_set_page(struct phy_device *phydev, int page)
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{
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	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
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}

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static int marvell_ack_interrupt(struct phy_device *phydev)
{
	int err;

	/* Clear the interrupts by reading the reg */
	err = phy_read(phydev, MII_M1011_IEVENT);

	if (err < 0)
		return err;

	return 0;
}

static int marvell_config_intr(struct phy_device *phydev)
{
	int err;

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	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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		err = phy_write(phydev, MII_M1011_IMASK,
				MII_M1011_IMASK_INIT);
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	else
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		err = phy_write(phydev, MII_M1011_IMASK,
				MII_M1011_IMASK_CLEAR);
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	return err;
}

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static int marvell_set_polarity(struct phy_device *phydev, int polarity)
{
	int reg;
	int err;
	int val;

	/* get the current settings */
	reg = phy_read(phydev, MII_M1011_PHY_SCR);
	if (reg < 0)
		return reg;

	val = reg;
	val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
	switch (polarity) {
	case ETH_TP_MDI:
		val |= MII_M1011_PHY_SCR_MDI;
		break;
	case ETH_TP_MDI_X:
		val |= MII_M1011_PHY_SCR_MDI_X;
		break;
	case ETH_TP_MDI_AUTO:
	case ETH_TP_MDI_INVALID:
	default:
		val |= MII_M1011_PHY_SCR_AUTO_CROSS;
		break;
	}

	if (val != reg) {
		/* Set the new polarity value in the register */
		err = phy_write(phydev, MII_M1011_PHY_SCR, val);
		if (err)
			return err;
	}

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	return val != reg;
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}

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static int marvell_config_aneg(struct phy_device *phydev)
{
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	int changed = 0;
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	int err;

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	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
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	if (err < 0)
		return err;

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	changed = err;

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	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
			MII_M1111_PHY_LED_DIRECT);
	if (err < 0)
		return err;
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	err = genphy_config_aneg(phydev);
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	if (err < 0)
		return err;
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	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
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		/* A write to speed/duplex bits (that is performed by
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		 * genphy_config_aneg() call above) must be followed by
		 * a software reset. Otherwise, the write has no effect.
		 */
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		err = genphy_soft_reset(phydev);
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		if (err < 0)
			return err;
	}

	return 0;
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}

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static int m88e1101_config_aneg(struct phy_device *phydev)
{
	int err;

	/* This Marvell PHY has an errata which requires
	 * that certain registers get written in order
	 * to restart autonegotiation
	 */
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	err = genphy_soft_reset(phydev);
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	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x1f);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x200c);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x5);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x100);
	if (err < 0)
		return err;

	return marvell_config_aneg(phydev);
}

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#ifdef CONFIG_OF_MDIO
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/* Set and/or override some configuration registers based on the
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 * marvell,reg-init property stored in the of_node for the phydev.
 *
 * marvell,reg-init = <reg-page reg mask value>,...;
 *
 * There may be one or more sets of <reg-page reg mask value>:
 *
 * reg-page: which register bank to use.
 * reg: the register.
 * mask: if non-zero, ANDed with existing register value.
 * value: ORed with the masked value and written to the regiser.
 *
 */
static int marvell_of_reg_init(struct phy_device *phydev)
{
	const __be32 *paddr;
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	int len, i, saved_page, current_page, ret = 0;
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	if (!phydev->mdio.dev.of_node)
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		return 0;

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	paddr = of_get_property(phydev->mdio.dev.of_node,
				"marvell,reg-init", &len);
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	if (!paddr || len < (4 * sizeof(*paddr)))
		return 0;

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	saved_page = phy_save_page(phydev);
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	if (saved_page < 0)
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		goto err;
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	current_page = saved_page;

	len /= sizeof(*paddr);
	for (i = 0; i < len - 3; i += 4) {
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		u16 page = be32_to_cpup(paddr + i);
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		u16 reg = be32_to_cpup(paddr + i + 1);
		u16 mask = be32_to_cpup(paddr + i + 2);
		u16 val_bits = be32_to_cpup(paddr + i + 3);
		int val;

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		if (page != current_page) {
			current_page = page;
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			ret = marvell_write_page(phydev, page);
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			if (ret < 0)
				goto err;
		}

		val = 0;
		if (mask) {
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			val = __phy_read(phydev, reg);
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			if (val < 0) {
				ret = val;
				goto err;
			}
			val &= mask;
		}
		val |= val_bits;

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		ret = __phy_write(phydev, reg, val);
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		if (ret < 0)
			goto err;
	}
err:
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	return phy_restore_page(phydev, saved_page, ret);
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}
#else
static int marvell_of_reg_init(struct phy_device *phydev)
{
	return 0;
}
#endif /* CONFIG_OF_MDIO */

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static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
423
{
424
	int mscr;
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	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
		       MII_88E1121_PHY_MSCR_TX_DELAY;
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	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
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	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
	else
		mscr = 0;
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	return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
				MII_88E1121_PHY_MSCR_REG,
				MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
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}

static int m88e1121_config_aneg(struct phy_device *phydev)
{
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	int changed = 0;
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	int err = 0;

	if (phy_interface_is_rgmii(phydev)) {
		err = m88e1121_config_aneg_rgmii_delays(phydev);
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		if (err < 0)
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			return err;
	}

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	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
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	if (err < 0)
		return err;

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	changed = err;

	err = genphy_config_aneg(phydev);
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	if (err < 0)
		return err;

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	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
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		/* A software reset is used to ensure a "commit" of the
		 * changes is done.
		 */
		err = genphy_soft_reset(phydev);
		if (err < 0)
			return err;
	}

	return 0;
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}

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static int m88e1318_config_aneg(struct phy_device *phydev)
475
{
476
	int err;
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	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
			       MII_88E1318S_PHY_MSCR1_REG,
			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
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	if (err < 0)
		return err;

	return m88e1121_config_aneg(phydev);
}

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/**
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 * linkmode_adv_to_fiber_adv_t
 * @advertise: the linkmode advertisement settings
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 *
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 * A small helper function that translates linkmode advertisement
 * settings to phy autonegotiation advertisements for the MII_ADV
 * register for fiber link.
494
 */
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static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
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{
	u32 result = 0;

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	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
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		result |= ADVERTISE_FIBER_1000HALF;
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	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
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		result |= ADVERTISE_FIBER_1000FULL;

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	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
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		result |= LPA_PAUSE_ASYM_FIBER;
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	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
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		result |= (ADVERTISE_PAUSE_FIBER
			   & (~ADVERTISE_PAUSE_ASYM_FIBER));

	return result;
}

/**
 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
 * @phydev: target phy_device struct
 *
 * Description: If auto-negotiation is enabled, we configure the
 *   advertising, and then restart auto-negotiation.  If it is not
 *   enabled, then we write the BMCR. Adapted for fiber link in
 *   some Marvell's devices.
 */
static int marvell_config_aneg_fiber(struct phy_device *phydev)
{
	int changed = 0;
	int err;
	int adv, oldadv;

	if (phydev->autoneg != AUTONEG_ENABLE)
		return genphy_setup_forced(phydev);

	/* Only allow advertising what this PHY supports */
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	linkmode_and(phydev->advertising, phydev->advertising,
		     phydev->supported);
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	/* Setup fiber advertisement */
	adv = phy_read(phydev, MII_ADVERTISE);
	if (adv < 0)
		return adv;

	oldadv = adv;
	adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
		| LPA_PAUSE_FIBER);
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	adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
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	if (adv != oldadv) {
		err = phy_write(phydev, MII_ADVERTISE, adv);
		if (err < 0)
			return err;

		changed = 1;
	}

	if (changed == 0) {
		/* Advertisement hasn't changed, but maybe aneg was never on to
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		 * begin with?	Or maybe phy was isolated?
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		 */
		int ctl = phy_read(phydev, MII_BMCR);

		if (ctl < 0)
			return ctl;

		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
			changed = 1; /* do restart aneg */
	}

	/* Only restart aneg if we are advertising something different
	 * than we were before.
	 */
	if (changed > 0)
		changed = genphy_restart_aneg(phydev);

	return changed;
}

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static int m88e1510_config_aneg(struct phy_device *phydev)
{
	int err;

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	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
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	if (err < 0)
		goto error;

	/* Configure the copper link first */
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	err = m88e1318_config_aneg(phydev);
	if (err < 0)
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		goto error;
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	/* Do not touch the fiber page if we're in copper->sgmii mode */
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
		return 0;

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	/* Then the fiber link */
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	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
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	if (err < 0)
		goto error;

	err = marvell_config_aneg_fiber(phydev);
	if (err < 0)
		goto error;

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	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
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error:
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	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
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	return err;
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}

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static void marvell_config_led(struct phy_device *phydev)
{
	u16 def_config;
	int err;

	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
		def_config = MII_88E1121_PHY_LED_DEF;
		break;
	/* Default PHY LED config:
	 * LED[0] .. 1000Mbps Link
	 * LED[1] .. 100Mbps Link
	 * LED[2] .. Blink, Activity
	 */
	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
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		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
		else
			def_config = MII_88E1510_PHY_LED_DEF;
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		break;
	default:
		return;
	}

	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
			      def_config);
	if (err < 0)
Andrew Lunn's avatar
Andrew Lunn committed
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		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
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}

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static int marvell_config_init(struct phy_device *phydev)
{
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	/* Set defalut LED */
	marvell_config_led(phydev);

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	/* Set registers from marvell,reg-init DT property */
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	return marvell_of_reg_init(phydev);
}

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static int m88e3016_config_init(struct phy_device *phydev)
{
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	int ret;
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	/* Enable Scrambler and Auto-Crossover */
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	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
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			 MII_88E3016_DISABLE_SCRAMBLER,
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			 MII_88E3016_AUTO_MDIX_CROSSOVER);
	if (ret < 0)
		return ret;
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	return marvell_config_init(phydev);
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}

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static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
					   u16 mode,
					   int fibre_copper_auto)
{
	if (fibre_copper_auto)
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		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
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	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
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			  MII_M1111_HWCFG_MODE_MASK |
			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
			  MII_M1111_HWCFG_FIBER_COPPER_RES,
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			  mode);
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}

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static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
679
{
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	int delay;
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682
	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
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		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
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	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
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		delay = MII_M1111_RGMII_RX_DELAY;
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	} else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
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		delay = MII_M1111_RGMII_TX_DELAY;
	} else {
		delay = 0;
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	}
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	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
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			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
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			  delay);
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}

static int m88e1111_config_init_rgmii(struct phy_device *phydev)
{
	int temp;
	int err;

	err = m88e1111_config_init_rgmii_delays(phydev);
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	if (err < 0)
		return err;
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	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
	if (temp < 0)
		return temp;
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	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
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	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
	else
		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
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	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
}
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static int m88e1111_config_init_sgmii(struct phy_device *phydev)
{
	int err;
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	err = m88e1111_config_init_hwcfg_mode(
		phydev,
		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
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	if (err < 0)
		return err;
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	/* make sure copper is selected */
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	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
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}
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static int m88e1111_config_init_rtbi(struct phy_device *phydev)
{
737
	int err;
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739
	err = m88e1111_config_init_rgmii_delays(phydev);
740
	if (err < 0)
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		return err;

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	err = m88e1111_config_init_hwcfg_mode(
		phydev,
		MII_M1111_HWCFG_MODE_RTBI,
		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
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	if (err < 0)
		return err;

	/* soft reset */
751
	err = genphy_soft_reset(phydev);
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	if (err < 0)
		return err;

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	return m88e1111_config_init_hwcfg_mode(
		phydev,
		MII_M1111_HWCFG_MODE_RTBI,
		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
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}

static int m88e1111_config_init(struct phy_device *phydev)
{
	int err;

	if (phy_interface_is_rgmii(phydev)) {
		err = m88e1111_config_init_rgmii(phydev);
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		if (err < 0)
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			return err;
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	}
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	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
		err = m88e1111_config_init_sgmii(phydev);
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		if (err < 0)
			return err;
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	}
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777 778
	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
		err = m88e1111_config_init_rtbi(phydev);
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		if (err < 0)
			return err;
	}

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	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;
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787
	return genphy_soft_reset(phydev);
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}

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static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
{
	int val, cnt, enable;

	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
	if (val < 0)
		return val;

	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;

	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;

	return 0;
}

static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
{
	int val;

	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
		return -E2BIG;

	if (!cnt)
		return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
				      MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);

	val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
	val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);

	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
			  MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
			  MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
			  val);
}

static int m88e1111_get_tunable(struct phy_device *phydev,
				struct ethtool_tunable *tuna, void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return m88e1111_get_downshift(phydev, data);
	default:
		return -EOPNOTSUPP;
	}
}

static int m88e1111_set_tunable(struct phy_device *phydev,
				struct ethtool_tunable *tuna, const void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
		return m88e1111_set_downshift(phydev, *(const u8 *)data);
	default:
		return -EOPNOTSUPP;
	}
}

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static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
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{
	int val, cnt, enable;

	val = phy_read(phydev, MII_M1011_PHY_SCR);
	if (val < 0)
		return val;

	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
857
	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
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	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;

	return 0;
}

864
static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
865 866 867 868 869 870 871 872 873 874 875
{
	int val;

	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
		return -E2BIG;

	if (!cnt)
		return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
				      MII_M1011_PHY_SCR_DOWNSHIFT_EN);

	val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
876
	val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
877 878 879

	return phy_modify(phydev, MII_M1011_PHY_SCR,
			  MII_M1011_PHY_SCR_DOWNSHIFT_EN |
880
			  MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
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			  val);
}

884
static int m88e1011_get_tunable(struct phy_device *phydev,
885 886 887 888
				struct ethtool_tunable *tuna, void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
889
		return m88e1011_get_downshift(phydev, data);
890 891 892 893 894
	default:
		return -EOPNOTSUPP;
	}
}

895
static int m88e1011_set_tunable(struct phy_device *phydev,
896 897 898 899
				struct ethtool_tunable *tuna, const void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_DOWNSHIFT:
900
		return m88e1011_set_downshift(phydev, *(const u8 *)data);
901 902 903 904 905
	default:
		return -EOPNOTSUPP;
	}
}

906
static void m88e1011_link_change_notify(struct phy_device *phydev)
907 908 909 910 911 912 913 914 915 916 917 918 919 920
{
	int status;

	if (phydev->state != PHY_RUNNING)
		return;

	/* we may be on fiber page currently */
	status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
				MII_M1011_PHY_SSR);

	if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
		phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
}

921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938
static int m88e1116r_config_init(struct phy_device *phydev)
{
	int err;

	err = genphy_soft_reset(phydev);
	if (err < 0)
		return err;

	msleep(500);

	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
	if (err < 0)
		return err;

	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
	if (err < 0)
		return err;

939
	err = m88e1011_set_downshift(phydev, 8);
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	if (err < 0)
		return err;

	if (phy_interface_is_rgmii(phydev)) {
		err = m88e1121_config_aneg_rgmii_delays(phydev);
		if (err < 0)
			return err;
	}

	err = genphy_soft_reset(phydev);
	if (err < 0)
		return err;

	return marvell_config_init(phydev);
}

956 957 958 959 960 961 962 963 964 965 966 967 968
static int m88e1318_config_init(struct phy_device *phydev)
{
	if (phy_interrupt_is_valid(phydev)) {
		int err = phy_modify_paged(
			phydev, MII_MARVELL_LED_PAGE,
			MII_88E1318S_PHY_LED_TCR,
			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
		if (err < 0)
			return err;
	}

969
	return marvell_config_init(phydev);
970 971
}

972 973 974 975 976 977 978
static int m88e1510_config_init(struct phy_device *phydev)
{
	int err;

	/* SGMII-to-Copper mode initialization */
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
		/* Select page 18 */
979
		err = marvell_set_page(phydev, 18);
980 981 982 983
		if (err < 0)
			return err;

		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
984
		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
985
				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
986
				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
987 988 989 990
		if (err < 0)
			return err;

		/* PHY reset is necessary after changing MODE[2:0] */
991 992
		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
				 MII_88E1510_GEN_CTRL_REG_1_RESET);
993 994 995 996
		if (err < 0)
			return err;

		/* Reset page selection */
997
		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
998 999 1000 1001
		if (err < 0)
			return err;
	}

1002
	return m88e1318_config_init(phydev);
1003 1004
}

1005 1006 1007 1008
static int m88e1118_config_aneg(struct phy_device *phydev)
{
	int err;

1009
	err = genphy_soft_reset(phydev);
1010 1011 1012
	if (err < 0)
		return err;

1013
	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025
	if (err < 0)
		return err;

	err = genphy_config_aneg(phydev);
	return 0;
}

static int m88e1118_config_init(struct phy_device *phydev)
{
	int err;

	/* Change address */
1026
	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1027 1028 1029 1030 1031 1032 1033 1034 1035
	if (err < 0)
		return err;

	/* Enable 1000 Mbit */
	err = phy_write(phydev, 0x15, 0x1070);
	if (err < 0)
		return err;

	/* Change address */
1036
	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1037 1038 1039 1040
	if (err < 0)
		return err;

	/* Adjust LED Control */
1041 1042 1043 1044
	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
		err = phy_write(phydev, 0x10, 0x1100);
	else
		err = phy_write(phydev, 0x10, 0x021e);
1045 1046 1047
	if (err < 0)
		return err;

1048 1049 1050 1051
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

1052
	/* Reset address */
1053
	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1054 1055 1056
	if (err < 0)
		return err;

1057
	return genphy_soft_reset(phydev);
1058 1059
}

1060 1061 1062 1063 1064
static int m88e1149_config_init(struct phy_device *phydev)
{
	int err;

	/* Change address */
1065
	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1066 1067 1068 1069 1070 1071 1072 1073
	if (err < 0)
		return err;

	/* Enable 1000 Mbit */
	err = phy_write(phydev, 0x15, 0x1048);
	if (err < 0)
		return err;

1074 1075 1076 1077
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

1078
	/* Reset address */
1079
	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1080 1081 1082
	if (err < 0)
		return err;

1083
	return genphy_soft_reset(phydev);
1084 1085
}

1086 1087 1088 1089
static int m88e1145_config_init_rgmii(struct phy_device *phydev)
{
	int err;

1090
	err = m88e1111_config_init_rgmii_delays(phydev);
1091 1092 1093 1094 1095 1096 1097 1098
	if (err < 0)
		return err;

	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
		err = phy_write(phydev, 0x1d, 0x0012);
		if (err < 0)
			return err;

1099
		err = phy_modify(phydev, 0x1e, 0x0fc0,
1100 1101
				 2 << 9 | /* 36 ohm */
				 2 << 6); /* 39 ohm */
1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115
		if (err < 0)
			return err;

		err = phy_write(phydev, 0x1d, 0x3);
		if (err < 0)
			return err;

		err = phy_write(phydev, 0x1e, 0x8000);
	}
	return err;
}

static int m88e1145_config_init_sgmii(struct phy_device *phydev)
{
1116 1117 1118
	return m88e1111_config_init_hwcfg_mode(
		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1119 1120
}

1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141
static int m88e1145_config_init(struct phy_device *phydev)
{
	int err;

	/* Take care of errata E0 & E1 */
	err = phy_write(phydev, 0x1d, 0x001b);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0x418f);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1d, 0x0016);
	if (err < 0)
		return err;

	err = phy_write(phydev, 0x1e, 0xa2da);
	if (err < 0)
		return err;

1142
	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1143
		err = m88e1145_config_init_rgmii(phydev);
1144 1145 1146 1147
		if (err < 0)
			return err;
	}

1148
	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1149
		err = m88e1145_config_init_sgmii(phydev);
1150 1151 1152 1153
		if (err < 0)
			return err;
	}

1154 1155 1156 1157
	err = marvell_of_reg_init(phydev);
	if (err < 0)
		return err;

1158 1159
	return 0;
}
1160

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static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
{
	int val;

	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
	if (val < 0)
		return val;

	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
		return 0;
	}

	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);

	switch (val) {
	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
		*msecs = 0;
		break;
	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
		*msecs = 10;
		break;
	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
		*msecs = 20;
		break;
	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
		*msecs = 40;
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
{
	struct ethtool_eee eee;
	int val, ret;

	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);

	/* According to the Marvell data sheet EEE must be disabled for
	 * Fast Link Down detection to work properly
	 */
	ret = phy_ethtool_get_eee(phydev, &eee);
	if (!ret && eee.eee_enabled) {
		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
		return -EBUSY;
	}

	if (*msecs <= 5)
		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
	else if (*msecs <= 15)
		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
	else if (*msecs <= 30)
		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
	else
		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;

	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);

	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
	if (ret)
		return ret;

	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
}

static int m88e1540_get_tunable(struct phy_device *phydev,
				struct ethtool_tunable *tuna, void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_FAST_LINK_DOWN:
		return m88e1540_get_fld(phydev, data);
1240
	case ETHTOOL_PHY_DOWNSHIFT:
1241
		return m88e1011_get_downshift(phydev, data);
1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252
	default:
		return -EOPNOTSUPP;
	}
}

static int m88e1540_set_tunable(struct phy_device *phydev,
				struct ethtool_tunable *tuna, const void *data)
{
	switch (tuna->id) {
	case ETHTOOL_PHY_FAST_LINK_DOWN:
		return m88e1540_set_fld(phydev, data);
1253
	case ETHTOOL_PHY_DOWNSHIFT:
1254
		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1255 1256 1257 1258 1259
	default:
		return -EOPNOTSUPP;
	}
}

1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292
/* The VOD can be out of specification on link up. Poke an
 * undocumented register, in an undocumented page, with a magic value
 * to fix this.
 */
static int m88e6390_errata(struct phy_device *phydev)
{
	int err;

	err = phy_write(phydev, MII_BMCR,
			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
	if (err)
		return err;

	usleep_range(300, 400);

	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
	if (err)
		return err;

	return genphy_soft_reset(phydev);
}

static int m88e6390_config_aneg(struct phy_device *phydev)
{
	int err;

	err = m88e6390_errata(phydev);
	if (err)
		return err;

	return m88e1510_config_aneg(phydev);
}

1293
/**
1294
 * fiber_lpa_mod_linkmode_lpa_t
1295
 * @advertising: the linkmode advertisement settings
1296 1297
 * @lpa: value of the MII_LPA register for fiber link
 *
1298 1299 1300
 * A small helper function that translates MII_LPA bits to linkmode LP
 * advertisement settings. Other bits in advertising are left
 * unchanged.
1301
 */
1302
static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1303
{
1304 1305 1306 1307 1308
	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
			 advertising, lpa & LPA_FIBER_1000HALF);

	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
			 advertising, lpa & LPA_FIBER_1000FULL);
1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322
}

/**
 * marvell_update_link - update link status in real time in @phydev
 * @phydev: target phy_device struct
 *
 * Description: Update the value in phydev->link to reflect the
 *   current link value.
 */
static int marvell_update_link(struct phy_device *phydev, int fiber)
{
	int status;

	/* Use the generic register for copper link, or specific
1323 1324
	 * register for fiber case
	 */
1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340
	if (fiber) {
		status = phy_read(phydev, MII_M1011_PHY_STATUS);
		if (status < 0)
			return status;

		if ((status & REGISTER_LINK_STATUS) == 0)
			phydev->link = 0;
		else
			phydev->link = 1;
	} else {
		return genphy_update_link(phydev);
	}

	return 0;
}

1341 1342 1343 1344 1345
static int marvell_read_status_page_an(struct phy_device *phydev,
				       int fiber)
{
	int status;
	int lpa;
1346
	int err;
1347 1348 1349 1350 1351 1352

	status = phy_read(phydev, MII_M1011_PHY_STATUS);
	if (status < 0)
		return status;

	if (!fiber) {
1353 1354 1355
		err = genphy_read_lpa(phydev);
		if (err < 0)
			return err;
1356

1357
		phy_resolve_aneg_pause(phydev);
1358
	} else {
1359 1360 1361 1362
		lpa = phy_read(phydev, MII_LPA);
		if (lpa < 0)
			return lpa;

1363
		/* The fiber link is only 1000M capable */
1364
		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378

		if (phydev->duplex == DUPLEX_FULL) {
			if (!(lpa & LPA_PAUSE_FIBER)) {
				phydev->pause = 0;
				phydev->asym_pause = 0;
			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
				phydev->pause = 1;
				phydev->asym_pause = 1;
			} else {
				phydev->pause = 1;
				phydev->asym_pause = 0;
			}
		}
	}
1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398

	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
		phydev->duplex = DUPLEX_FULL;
	else
		phydev->duplex = DUPLEX_HALF;

	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
	case MII_M1011_PHY_STATUS_1000:
		phydev->speed = SPEED_1000;
		break;

	case MII_M1011_PHY_STATUS_100:
		phydev->speed = SPEED_100;
		break;

	default:
		phydev->speed = SPEED_10;
		break;
	}

1399 1400 1401
	return 0;
}

1402
/* marvell_read_status_page
1403
 *
1404
 * Description:
1405 1406 1407 1408 1409
 *   Check the link, then figure out the current state
 *   by comparing what we advertise with what the link partner
 *   advertises.  Start by checking the gigabit possibilities,
 *   then move on to 10/100.
 */
1410
static int marvell_read_status_page(struct phy_device *phydev, int page)
1411
{
1412
	int fiber;
1413
	int err;
1414

1415
	/* Detect and update the link, but return if there
1416 1417
	 * was an error
	 */
1418
	if (page == MII_MARVELL_FIBER_PAGE)
1419 1420 1421 1422 1423
		fiber = 1;
	else
		fiber = 0;

	err = marvell_update_link(phydev, fiber);
1424 1425 1426
	if (err)
		return err;

1427 1428 1429 1430
	linkmode_zero(phydev->lp_advertising);
	phydev->pause = 0;
	phydev->asym_pause = 0;

1431 1432 1433
	if (phydev->autoneg == AUTONEG_ENABLE)
		err = marvell_read_status_page_an(phydev, fiber);
	else
1434
		err = genphy_read_status_fixed(phydev);
1435

1436
	return err;
1437 1438
}

1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452
/* marvell_read_status
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need status checked.
 * Description:
 *   First, check the fiber link and status.
 *   If the fiber link is down, check the copper link and status which
 *   will be the default value if both link are down.
 */
static int marvell_read_status(struct phy_device *phydev)
{
	int err;

	/* Check the fiber mode first */
1453 1454
	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
			      phydev->supported) &&
1455
	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1456
		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1457 1458 1459
		if (err < 0)
			goto error;

1460
		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1461 1462 1463
		if (err < 0)
			goto error;

1464 1465 1466 1467 1468 1469 1470
		/* If the fiber link is up, it is the selected and
		 * used link. In this case, we need to stay in the
		 * fiber page. Please to be careful about that, avoid
		 * to restore Copper page in other functions which
		 * could break the behaviour for some fiber phy like
		 * 88E1512.
		 */
1471 1472 1473 1474
		if (phydev->link)
			return 0;

		/* If fiber link is down, check and save copper mode state */
1475
		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1476 1477 1478 1479
		if (err < 0)
			goto error;
	}

1480
	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1481 1482

error:
1483
	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1484 1485
	return err;
}
1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496

/* marvell_suspend
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need to be suspended
 */
static int marvell_suspend(struct phy_device *phydev)
{
	int err;

	/* Suspend the fiber mode first */
1497 1498
	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
			       phydev->supported)) {
1499
		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1500 1501 1502 1503 1504 1505 1506 1507 1508
		if (err < 0)
			goto error;

		/* With the page set, use the generic suspend */
		err = genphy_suspend(phydev);
		if (err < 0)
			goto error;

		/* Then, the copper link */
1509
		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1510 1511 1512 1513 1514 1515 1516 1517
		if (err < 0)
			goto error;
	}

	/* With the page set, use the generic suspend */
	return genphy_suspend(phydev);

error:
1518
	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531
	return err;
}

/* marvell_resume
 *
 * Some Marvell's phys have two modes: fiber and copper.
 * Both need to be resumed
 */
static int marvell_resume(struct phy_device *phydev)
{
	int err;

	/* Resume the fiber mode first */
1532 1533
	if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
			       phydev->supported)) {
1534
		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1535 1536 1537 1538 1539 1540 1541 1542 1543
		if (err < 0)
			goto error;

		/* With the page set, use the generic resume */
		err = genphy_resume(phydev);
		if (err < 0)
			goto error;

		/* Then, the copper link */
1544
		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1545 1546 1547 1548 1549 1550 1551 1552
		if (err < 0)
			goto error;
	}

	/* With the page set, use the generic resume */
	return genphy_resume(phydev);

error:
1553
	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1554 1555 1556
	return err;
}

1557 1558 1559
static int marvell_aneg_done(struct phy_device *phydev)
{
	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1560

1561 1562 1563
	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
}

1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575
static int m88e1121_did_interrupt(struct phy_device *phydev)
{
	int imask;

	imask = phy_read(phydev, MII_M1011_IEVENT);

	if (imask & MII_M1011_IMASK_INIT)
		return 1;

	return 0;
}

1576 1577
static void m88e1318_get_wol(struct phy_device *phydev,
			     struct ethtool_wolinfo *wol)
1578
{
1579 1580
	int oldpage, ret = 0;

1581 1582 1583
	wol->supported = WAKE_MAGIC;
	wol->wolopts = 0;

1584 1585 1586
	oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
	if (oldpage < 0)
		goto error;
1587

1588 1589
	ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1590 1591
		wol->wolopts |= WAKE_MAGIC;

1592 1593
error:
	phy_restore_page(phydev, oldpage, ret);
1594 1595
}

1596 1597
static int m88e1318_set_wol(struct phy_device *phydev,
			    struct ethtool_wolinfo *wol)
1598
{
1599
	int err = 0, oldpage;
1600

1601 1602 1603
	oldpage = phy_save_page(phydev);
	if (oldpage < 0)
		goto error;
1604 1605 1606

	if (wol->wolopts & WAKE_MAGIC) {
		/* Explicitly switch to page 0x00, just to be sure */
1607
		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1608
		if (err < 0)
1609
			goto error;
1610

1611 1612 1613 1614 1615 1616 1617
		/* If WOL event happened once, the LED[2] interrupt pin
		 * will not be cleared unless we reading the interrupt status
		 * register. If interrupts are in use, the normal interrupt
		 * handling will clear the WOL event. Clear the WOL event
		 * before enabling it if !phy_interrupt_is_valid()
		 */
		if (!phy_interrupt_is_valid(phydev))
1618
			__phy_read(phydev, MII_M1011_IEVENT);
1619

1620
		/* Enable the WOL interrupt */
1621 1622
		err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
				   MII_88E1318S_PHY_CSIER_WOL_EIE);
1623
		if (err < 0)
1624
			goto error;
1625

1626
		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1627
		if (err < 0)
1628
			goto error;
1629 1630

		/* Setup LED[2] as interrupt pin (active low) */
1631
		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1632
				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1633 1634
				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1635
		if (err < 0)
1636
			goto error;
1637

1638
		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1639
		if (err < 0)
1640
			goto error;
1641 1642

		/* Store the device address for the magic packet */
1643
		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1644 1645 1646
				((phydev->attached_dev->dev_addr[5] << 8) |
				 phydev->attached_dev->dev_addr[4]));
		if (err < 0)
1647 1648
			goto error;
		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1649 1650 1651
				((phydev->attached_dev->dev_addr[3] << 8) |
				 phydev->attached_dev->dev_addr[2]));
		if (err < 0)
1652 1653
			goto error;
		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1654 1655 1656
				((phydev->attached_dev->dev_addr[1] << 8) |
				 phydev->attached_dev->dev_addr[0]));
		if (err < 0)
1657
			goto error;
1658 1659

		/* Clear WOL status and enable magic packet matching */
1660 1661 1662
		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1663
		if (err < 0)
1664
			goto error;
1665
	} else {
1666
		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1667
		if (err < 0)
1668
			goto error;
1669 1670

		/* Clear WOL status and disable magic packet matching */
1671
		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1672
				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1673
				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1674
		if (err < 0)
1675
			goto error;
1676 1677
	}

1678 1679
error:
	return phy_restore_page(phydev, oldpage, err);
1680 1681
}

1682 1683
static int marvell_get_sset_count(struct phy_device *phydev)
{
1684 1685
	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
			      phydev->supported))
1686 1687 1688
		return ARRAY_SIZE(marvell_hw_stats);
	else
		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1689 1690 1691 1692
}

static void marvell_get_strings(struct phy_device *phydev, u8 *data)
{
1693
	int count = marvell_get_sset_count(phydev);
1694 1695
	int i;

1696
	for (i = 0; i < count; i++) {
1697 1698
		strlcpy(data + i * ETH_GSTRING_LEN,
			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1699 1700 1701 1702 1703 1704 1705
	}
}

static u64 marvell_get_stat(struct phy_device *phydev, int i)
{
	struct marvell_hw_stat stat = marvell_hw_stats[i];
	struct marvell_priv *priv = phydev->priv;
1706
	int val;
1707
	u64 ret;
1708

1709
	val = phy_read_paged(phydev, stat.page, stat.reg);
1710
	if (val < 0) {
1711
		ret = U64_MAX;
1712 1713 1714
	} else {
		val = val & ((1 << stat.bits) - 1);
		priv->stats[i] += val;
1715
		ret = priv->stats[i];
1716 1717
	}

1718
	return ret;
1719 1720 1721 1722 1723
}

static void marvell_get_stats(struct phy_device *phydev,
			      struct ethtool_stats *stats, u64 *data)
{
1724
	int count = marvell_get_sset_count(phydev);
1725 1726
	int i;

1727
	for (i = 0; i < count; i++)
1728 1729 1730
		data[i] = marvell_get_stat(phydev, i);
}

1731 1732 1733
#ifdef CONFIG_HWMON
static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
{
1734
	int oldpage;
1735
	int ret = 0;
1736 1737 1738 1739
	int val;

	*temp = 0;

1740 1741 1742
	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
	if (oldpage < 0)
		goto error;
1743

1744
	/* Enable temperature sensor */
1745
	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1746 1747 1748
	if (ret < 0)
		goto error;

1749 1750
	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1751 1752 1753 1754 1755 1756
	if (ret < 0)
		goto error;

	/* Wait for temperature to stabilize */
	usleep_range(10000, 12000);

1757
	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1758 1759 1760 1761 1762 1763
	if (val < 0) {
		ret = val;
		goto error;
	}

	/* Disable temperature sensor */
1764 1765
	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1766 1767 1768 1769 1770 1771
	if (ret < 0)
		goto error;

	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;

error:
1772
	return phy_restore_page(phydev, oldpage, ret);
1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849
}

static int m88e1121_hwmon_read(struct device *dev,
			       enum hwmon_sensor_types type,
			       u32 attr, int channel, long *temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = m88e1121_get_temp(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}

	return err;
}

static umode_t m88e1121_hwmon_is_visible(const void *data,
					 enum hwmon_sensor_types type,
					 u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
		return 0444;
	default:
		return 0;
	}
}

static u32 m88e1121_hwmon_chip_config[] = {
	HWMON_C_REGISTER_TZ,
	0
};

static const struct hwmon_channel_info m88e1121_hwmon_chip = {
	.type = hwmon_chip,
	.config = m88e1121_hwmon_chip_config,
};

static u32 m88e1121_hwmon_temp_config[] = {
	HWMON_T_INPUT,
	0
};

static const struct hwmon_channel_info m88e1121_hwmon_temp = {
	.type = hwmon_temp,
	.config = m88e1121_hwmon_temp_config,
};

static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
	&m88e1121_hwmon_chip,
	&m88e1121_hwmon_temp,
	NULL
};

static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
	.is_visible = m88e1121_hwmon_is_visible,
	.read = m88e1121_hwmon_read,
};

static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
	.ops = &m88e1121_hwmon_hwmon_ops,
	.info = m88e1121_hwmon_info,
};

static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
{
	int ret;

	*temp = 0;

1850 1851
	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
			     MII_88E1510_TEMP_SENSOR);
1852
	if (ret < 0)
1853
		return ret;
1854 1855 1856

	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;

1857
	return 0;
1858 1859
}

1860
static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1861 1862 1863 1864 1865
{
	int ret;

	*temp = 0;

1866 1867
	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
			     MII_88E1121_MISC_TEST);
1868
	if (ret < 0)
1869
		return ret;
1870 1871 1872 1873 1874 1875

	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
	/* convert to mC */
	*temp *= 1000;

1876
	return 0;
1877 1878
}

1879
static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1880 1881 1882 1883
{
	temp = temp / 1000;
	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);

1884 1885 1886 1887
	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
				MII_88E1121_MISC_TEST,
				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1888 1889
}

1890
static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1891 1892 1893 1894 1895
{
	int ret;

	*alarm = false;

1896 1897
	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
			     MII_88E1121_MISC_TEST);
1898
	if (ret < 0)
1899
		return ret;
1900

1901
	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1902

1903
	return 0;
1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991
}

static int m88e1510_hwmon_read(struct device *dev,
			       enum hwmon_sensor_types type,
			       u32 attr, int channel, long *temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = m88e1510_get_temp(phydev, temp);
		break;
	case hwmon_temp_crit:
		err = m88e1510_get_temp_critical(phydev, temp);
		break;
	case hwmon_temp_max_alarm:
		err = m88e1510_get_temp_alarm(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}

	return err;
}

static int m88e1510_hwmon_write(struct device *dev,
				enum hwmon_sensor_types type,
				u32 attr, int channel, long temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_crit:
		err = m88e1510_set_temp_critical(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}
	return err;
}

static umode_t m88e1510_hwmon_is_visible(const void *data,
					 enum hwmon_sensor_types type,
					 u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
	case hwmon_temp_max_alarm:
		return 0444;
	case hwmon_temp_crit:
		return 0644;
	default:
		return 0;
	}
}

static u32 m88e1510_hwmon_temp_config[] = {
	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
	0
};

static const struct hwmon_channel_info m88e1510_hwmon_temp = {
	.type = hwmon_temp,
	.config = m88e1510_hwmon_temp_config,
};

static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
	&m88e1121_hwmon_chip,
	&m88e1510_hwmon_temp,
	NULL
};

static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
	.is_visible = m88e1510_hwmon_is_visible,
	.read = m88e1510_hwmon_read,
	.write = m88e1510_hwmon_write,
};

static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
	.ops = &m88e1510_hwmon_hwmon_ops,
	.info = m88e1510_hwmon_info,
};

1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108
static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
{
	int sum = 0;
	int oldpage;
	int ret = 0;
	int i;

	*temp = 0;

	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
	if (oldpage < 0)
		goto error;

	/* Enable temperature sensor */
	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
	if (ret < 0)
		goto error;

	ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
	ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
		MII_88E6390_MISC_TEST_SAMPLE_1S;

	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
	if (ret < 0)
		goto error;

	/* Wait for temperature to stabilize */
	usleep_range(10000, 12000);

	/* Reading the temperature sense has an errata. You need to read
	 * a number of times and take an average.
	 */
	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
		if (ret < 0)
			goto error;
		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
	}

	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
	*temp = (sum  - 75) * 1000;

	/* Disable temperature sensor */
	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
	if (ret < 0)
		goto error;

	ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
	ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;

	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);

error:
	phy_restore_page(phydev, oldpage, ret);

	return ret;
}

static int m88e6390_hwmon_read(struct device *dev,
			       enum hwmon_sensor_types type,
			       u32 attr, int channel, long *temp)
{
	struct phy_device *phydev = dev_get_drvdata(dev);
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = m88e6390_get_temp(phydev, temp);
		break;
	default:
		return -EOPNOTSUPP;
	}

	return err;
}

static umode_t m88e6390_hwmon_is_visible(const void *data,
					 enum hwmon_sensor_types type,
					 u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
		return 0444;
	default:
		return 0;
	}
}

static u32 m88e6390_hwmon_temp_config[] = {
	HWMON_T_INPUT,
	0
};

static const struct hwmon_channel_info m88e6390_hwmon_temp = {
	.type = hwmon_temp,
	.config = m88e6390_hwmon_temp_config,
};

static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
	&m88e1121_hwmon_chip,
	&m88e6390_hwmon_temp,
	NULL
};

static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
	.is_visible = m88e6390_hwmon_is_visible,
	.read = m88e6390_hwmon_read,
};

static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
	.ops = &m88e6390_hwmon_hwmon_ops,
	.info = m88e6390_hwmon_info,
};

2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154
static int marvell_hwmon_name(struct phy_device *phydev)
{
	struct marvell_priv *priv = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	const char *devname = dev_name(dev);
	size_t len = strlen(devname);
	int i, j;

	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
	if (!priv->hwmon_name)
		return -ENOMEM;

	for (i = j = 0; i < len && devname[i]; i++) {
		if (isalnum(devname[i]))
			priv->hwmon_name[j++] = devname[i];
	}

	return 0;
}

static int marvell_hwmon_probe(struct phy_device *phydev,
			       const struct hwmon_chip_info *chip)
{
	struct marvell_priv *priv = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	int err;

	err = marvell_hwmon_name(phydev);
	if (err)
		return err;

	priv->hwmon_dev = devm_hwmon_device_register_with_info(
		dev, priv->hwmon_name, phydev, chip, NULL);

	return PTR_ERR_OR_ZERO(priv->hwmon_dev);
}

static int m88e1121_hwmon_probe(struct phy_device *phydev)
{
	return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
}

static int m88e1510_hwmon_probe(struct phy_device *phydev)
{
	return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
}
2155 2156 2157 2158 2159

static int m88e6390_hwmon_probe(struct phy_device *phydev)
{
	return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
}
2160 2161 2162 2163 2164 2165 2166 2167 2168 2169
#else
static int m88e1121_hwmon_probe(struct phy_device *phydev)
{
	return 0;
}

static int m88e1510_hwmon_probe(struct phy_device *phydev)
{
	return 0;
}
2170 2171 2172 2173 2174

static int m88e6390_hwmon_probe(struct phy_device *phydev)
{
	return 0;
}
2175 2176
#endif

2177 2178 2179 2180
static int marvell_probe(struct phy_device *phydev)
{
	struct marvell_priv *priv;

2181
	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2182 2183 2184 2185 2186 2187 2188 2189
	if (!priv)
		return -ENOMEM;

	phydev->priv = priv;

	return 0;
}

2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211
static int m88e1121_probe(struct phy_device *phydev)
{
	int err;

	err = marvell_probe(phydev);
	if (err)
		return err;

	return m88e1121_hwmon_probe(phydev);
}

static int m88e1510_probe(struct phy_device *phydev)
{
	int err;

	err = marvell_probe(phydev);
	if (err)
		return err;

	return m88e1510_hwmon_probe(phydev);
}

2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222
static int m88e6390_probe(struct phy_device *phydev)
{
	int err;

	err = marvell_probe(phydev);
	if (err)
		return err;

	return m88e6390_hwmon_probe(phydev);
}

2223 2224
static struct phy_driver marvell_drivers[] = {
	{
2225 2226
		.phy_id = MARVELL_PHY_ID_88E1101,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2227
		.name = "Marvell 88E1101",
2228
		/* PHY_GBIT_FEATURES */
2229
		.probe = marvell_probe,
2230
		.config_init = &marvell_config_init,
2231
		.config_aneg = &m88e1101_config_aneg,
2232 2233
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2234 2235
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2236 2237
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2238 2239 2240
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2241
	},
2242
	{
2243 2244
		.phy_id = MARVELL_PHY_ID_88E1112,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2245
		.name = "Marvell 88E1112",
2246
		/* PHY_GBIT_FEATURES */
2247
		.probe = marvell_probe,
2248 2249 2250 2251
		.config_init = &m88e1111_config_init,
		.config_aneg = &marvell_config_aneg,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2252 2253
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2254 2255
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2256 2257 2258
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2259 2260 2261
		.get_tunable = m88e1011_get_tunable,
		.set_tunable = m88e1011_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2262
	},
2263
	{
2264 2265
		.phy_id = MARVELL_PHY_ID_88E1111,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2266
		.name = "Marvell 88E1111",
2267
		/* PHY_GBIT_FEATURES */
2268
		.probe = marvell_probe,
2269
		.config_init = &m88e1111_config_init,
2270
		.config_aneg = &marvell_config_aneg,
2271
		.read_status = &marvell_read_status,
2272 2273
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2274 2275
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2276 2277
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2278 2279 2280
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2281 2282 2283
		.get_tunable = m88e1111_get_tunable,
		.set_tunable = m88e1111_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2284
	},
2285
	{
2286 2287
		.phy_id = MARVELL_PHY_ID_88E1118,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2288
		.name = "Marvell 88E1118",
2289
		/* PHY_GBIT_FEATURES */
2290
		.probe = marvell_probe,
2291 2292 2293 2294
		.config_init = &m88e1118_config_init,
		.config_aneg = &m88e1118_config_aneg,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2295 2296
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2297 2298
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2299 2300 2301
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2302
	},
2303
	{
2304 2305
		.phy_id = MARVELL_PHY_ID_88E1121R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2306
		.name = "Marvell 88E1121R",
2307
		/* PHY_GBIT_FEATURES */
2308
		.probe = &m88e1121_probe,
2309
		.config_init = &marvell_config_init,
2310 2311 2312 2313
		.config_aneg = &m88e1121_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2314
		.did_interrupt = &m88e1121_did_interrupt,
2315 2316
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2317 2318
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2319 2320 2321
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2322 2323 2324
		.get_tunable = m88e1011_get_tunable,
		.set_tunable = m88e1011_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2325
	},
2326
	{
2327
		.phy_id = MARVELL_PHY_ID_88E1318S,
2328
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2329
		.name = "Marvell 88E1318S",
2330
		/* PHY_GBIT_FEATURES */
2331
		.probe = marvell_probe,
2332
		.config_init = &m88e1318_config_init,
2333
		.config_aneg = &m88e1318_config_aneg,
2334 2335 2336 2337
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
2338 2339
		.get_wol = &m88e1318_get_wol,
		.set_wol = &m88e1318_set_wol,
2340 2341
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2342 2343
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2344 2345 2346
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2347
	},
2348
	{
2349 2350
		.phy_id = MARVELL_PHY_ID_88E1145,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2351
		.name = "Marvell 88E1145",
2352
		/* PHY_GBIT_FEATURES */
2353
		.probe = marvell_probe,
2354
		.config_init = &m88e1145_config_init,
2355
		.config_aneg = &m88e1101_config_aneg,
2356 2357 2358
		.read_status = &genphy_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2359 2360
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2361 2362
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2363 2364 2365
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2366 2367 2368
		.get_tunable = m88e1111_get_tunable,
		.set_tunable = m88e1111_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2369
	},
2370 2371 2372 2373
	{
		.phy_id = MARVELL_PHY_ID_88E1149R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1149R",
2374
		/* PHY_GBIT_FEATURES */
2375
		.probe = marvell_probe,
2376 2377 2378 2379
		.config_init = &m88e1149_config_init,
		.config_aneg = &m88e1118_config_aneg,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2380 2381
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2382 2383
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2384 2385 2386
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2387
	},
2388
	{
2389 2390
		.phy_id = MARVELL_PHY_ID_88E1240,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
2391
		.name = "Marvell 88E1240",
2392
		/* PHY_GBIT_FEATURES */
2393
		.probe = marvell_probe,
2394 2395 2396 2397
		.config_init = &m88e1111_config_init,
		.config_aneg = &marvell_config_aneg,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2398 2399
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2400 2401
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2402 2403 2404
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2405
	},
2406 2407 2408 2409
	{
		.phy_id = MARVELL_PHY_ID_88E1116R,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1116R",
2410
		/* PHY_GBIT_FEATURES */
2411
		.probe = marvell_probe,
2412 2413 2414
		.config_init = &m88e1116r_config_init,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
2415 2416
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2417 2418
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2419 2420 2421
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2422 2423 2424
		.get_tunable = m88e1011_get_tunable,
		.set_tunable = m88e1011_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2425
	},
2426 2427 2428 2429
	{
		.phy_id = MARVELL_PHY_ID_88E1510,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1510",
2430
		.features = PHY_GBIT_FIBRE_FEATURES,
2431
		.probe = &m88e1510_probe,
2432
		.config_init = &m88e1510_config_init,
2433 2434 2435 2436 2437
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
2438 2439
		.get_wol = &m88e1318_get_wol,
		.set_wol = &m88e1318_set_wol,
2440 2441
		.resume = &marvell_resume,
		.suspend = &marvell_suspend,
2442 2443
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2444 2445 2446
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2447
		.set_loopback = genphy_loopback,
2448 2449 2450
		.get_tunable = m88e1011_get_tunable,
		.set_tunable = m88e1011_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2451
	},
2452 2453 2454 2455
	{
		.phy_id = MARVELL_PHY_ID_88E1540,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1540",
2456
		/* PHY_GBIT_FEATURES */
2457
		.probe = m88e1510_probe,
2458
		.config_init = &marvell_config_init,
2459 2460 2461 2462 2463 2464 2465
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2466 2467
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2468 2469 2470
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2471 2472
		.get_tunable = m88e1540_get_tunable,
		.set_tunable = m88e1540_set_tunable,
2473
		.link_change_notify = m88e1011_link_change_notify,
2474
	},
2475 2476 2477 2478 2479
	{
		.phy_id = MARVELL_PHY_ID_88E1545,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E1545",
		.probe = m88e1510_probe,
2480
		/* PHY_GBIT_FEATURES */
2481 2482 2483 2484 2485 2486 2487 2488
		.config_init = &marvell_config_init,
		.config_aneg = &m88e1510_config_aneg,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2489 2490
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2491 2492 2493
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2494 2495 2496
		.get_tunable = m88e1540_get_tunable,
		.set_tunable = m88e1540_set_tunable,
		.link_change_notify = m88e1011_link_change_notify,
2497
	},
2498 2499 2500 2501
	{
		.phy_id = MARVELL_PHY_ID_88E3016,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E3016",
2502
		/* PHY_BASIC_FEATURES */
2503
		.probe = marvell_probe,
2504 2505 2506 2507 2508 2509 2510 2511
		.config_init = &m88e3016_config_init,
		.aneg_done = &marvell_aneg_done,
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2512 2513
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2514 2515 2516
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2517
	},
2518 2519 2520 2521
	{
		.phy_id = MARVELL_PHY_ID_88E6390,
		.phy_id_mask = MARVELL_PHY_ID_MASK,
		.name = "Marvell 88E6390",
2522
		/* PHY_GBIT_FEATURES */
2523
		.probe = m88e6390_probe,
2524
		.config_init = &marvell_config_init,
2525
		.config_aneg = &m88e6390_config_aneg,
2526 2527 2528 2529 2530 2531
		.read_status = &marvell_read_status,
		.ack_interrupt = &marvell_ack_interrupt,
		.config_intr = &marvell_config_intr,
		.did_interrupt = &m88e1121_did_interrupt,
		.resume = &genphy_resume,
		.suspend = &genphy_suspend,
2532 2533
		.read_page = marvell_read_page,
		.write_page = marvell_write_page,
2534 2535 2536
		.get_sset_count = marvell_get_sset_count,
		.get_strings = marvell_get_strings,
		.get_stats = marvell_get_stats,
2537 2538
		.get_tunable = m88e1540_get_tunable,
		.set_tunable = m88e1540_set_tunable,
2539
		.link_change_notify = m88e1011_link_change_notify,
2540
	},
2541 2542
};

2543
module_phy_driver(marvell_drivers);
2544

2545
static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2546 2547 2548 2549 2550 2551 2552 2553 2554
	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2555
	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2556
	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2557
	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2558
	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2559
	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2560
	{ MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2561 2562 2563 2564
	{ }
};

MODULE_DEVICE_TABLE(mdio, marvell_tbl);