- 02 Nov, 2011 3 commits
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Arnd Bergmann authored
Conflicts: Documentation/devicetree/bindings/arm/fsl.txt arch/arm/Kconfig arch/arm/Kconfig.debug arch/arm/plat-mxc/include/mach/common.h
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Arnd Bergmann authored
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Arnd Bergmann authored
Conflicts: arch/arm/mach-mxs/include/mach/gpio.h arch/arm/mach-omap2/board-generic.c arch/arm/plat-mxc/include/mach/gpio.h
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- 01 Nov, 2011 1 commit
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Arnd Bergmann authored
The board changes in the imx/devel branch conflict with other changes in the device imx/dt branch. Conflicts: arch/arm/mach-mx5/board-mx53_loco.c arch/arm/mach-mx5/board-mx53_smd.c arch/arm/plat-mxc/include/mach/common.h arch/arm/plat-mxc/include/mach/memory.h Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 31 Oct, 2011 30 commits
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Arnd Bergmann authored
The module.h cleanup series is not merged at this point, so use the older header file for now, to make it build either way. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Shawn Guo authored
It adds maintainer for ARM/FREESCALE IMX6. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
The patch merges the build of imx3 and imx6. The Kconfig symbol ARCH_IMX_V6_V7 is introduced to replace ARCH_MX3 and ARCH_MX6. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds suspend/resume support for imx6q. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds generic device tree based machine support for imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds smp and cpu hotplug support for imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds a number of core drivers support for imx6q, including clock, General Power Controller (gpc), Multi Mode DDR Controller(mmdc) and System Reset Controller (src). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
This is a plain translation of assembly gic irq handler to C function for CONFIG_MULTI_IRQ_HANDLER support on imx family. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds the core definitions and low-level debug uart support for imx6q. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It adds device tree source and documentation for imx6q platform. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Arnd Bergmann authored
Conflicts: arch/arm/Kconfig.debug
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Arnd Bergmann authored
Conflicts: arch/arm/plat-mxc/include/mach/memory.h
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Arnd Bergmann authored
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Arnd Bergmann authored
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Rob Herring authored
Add the platform suspend ops for highbank. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Martin Bogomolni authored
This adds cpu hotplug for highbank. On highbank, a core is always reset and boots up the same path as a cold boot. Signed-off-by: Martin Bogomolni <martin@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Rob Herring authored
This enables SMP support on highbank processor. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Rob Herring authored
Adding maintainer for arch/arm/mach-highbank/ Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Rob Herring authored
This adds basic support for the Calxeda Highbank platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Rob Herring authored
This adds the devicetree source and documentation for the Calxeda highbank platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Rob Herring authored
Add empty version of l2x0_of_init for when CONFIG_CACHE_L2X0 is not selected. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Barry Song <21cnbao@gmail.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
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Arnd Bergmann authored
Conflicts: arch/arm/Kconfig
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Arnd Bergmann authored
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Arnd Bergmann authored
Conflicts: arch/arm/include/asm/localtimer.h arch/arm/mach-msm/board-msm8x60.c arch/arm/mach-omap2/board-generic.c
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Arnd Bergmann authored
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Rob Herring authored
Commit "ARM: gic: add irq_domain support" (b49b6ff) breaks SPARSE_IRQ on platforms with GIC. When SPARSE_IRQ is enabled, all NR_IRQS or mach_desc->nr_irqs will be allocated by arch_probe_nr_irqs(). This caused irq_alloc_descs to allocate irq_descs after the pre-allocated space. Make irq_alloc_descs search for an exact irq range and assume it has been pre-allocated on failure. For DT probing dynamic allocation is used. DT enabled platforms should set their nr_irqs to NR_IRQ_LEGACY and have all irq_chips allocate their irq_descs with irq_alloc_descs if SPARSE_IRQ is enabled. gic_init irq_start param is changed to be signed with negative meaning do dynamic Linux irq assigment. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
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Rob Herring authored
This adds ARM gic interrupt controller initialization using device tree data. The initialization function is intended to be called by of_irq_init function like this: const static struct of_device_id irq_match[] = { { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, {} }; static void __init init_irqs(void) { of_irq_init(irq_match); } Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Rob Herring authored
Convert the gic interrupt controller to use irq domains in preparation for device-tree binding and MULTI_IRQ. This allows for translation between GIC interrupt IDs and Linux irq numbers. The meaning of irq_offset has changed. It now is just the number of skipped GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32 for secondary GICs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Rob Herring authored
Interrupt controllers can have non-zero starting value for h/w irq numbers. Adding support in irq_domain allows the domain hwirq numbering to match the interrupt controllers' numbering. As this makes looping over irqs for a domain more complicated, add loop iterators to iterate over all hwirqs and irqs for a domain. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Rob Herring authored
of_irq_init will scan the devicetree for matching interrupt controller nodes. Then it calls an initialization function for each found controller in the proper order with parent nodes initialized before child nodes. Based on initial pseudo code from Grant Likely. Changes in v4: - Drop unnecessary empty list check - Be more verbose on errors - Simplify "if (!desc) WARN_ON(1)" to "if (WARN_ON(!desc))" Changes in v3: - add missing kfree's found by Jamie - Implement Grant's comments to simplify the init loop - fix function comments Changes in v2: - Complete re-write of list searching code from Grant Likely Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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- 30 Oct, 2011 2 commits
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Arnd Bergmann authored
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Arnd Bergmann authored
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- 25 Oct, 2011 2 commits
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
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Nicolas Ferre authored
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
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- 24 Oct, 2011 2 commits
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Rob Herring authored
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Linus Torvalds authored
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