• Stephen Boyd's avatar
    Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into clk-next · 166e4b48
    Stephen Boyd authored
     - Support IDT VersaClock 5P49V5925
     - Bunch of updates for HSDK clock generation unit (CGU) driver
     - New clk driver for Baikal-T1 SoCs
    
    * clk-vc5:
      dt: Add bindings for IDT VersaClock 5P49V5925
      clk: vc5: Add support for IDT VersaClock 5P49V6965
    
    * clk-hsdk:
      CLK: HSDK: CGU: add support for 148.5MHz clock
      CLK: HSDK: CGU: support PLL bypassing
      CLK: HSDK: CGU: check if PLL is bypassed first
    
    * clk-mediatek:
      clk: mediatek: assign the initial value to clk_init_data of mtk_mux
      clk: mediatek: Add MT6765 clock support
      clk: mediatek: add mt6765 clock IDs
      dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC
      dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC
      dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC
    
    * clk-baikal:
      clk: Add Baikal-T1 CCU Dividers driver
      clk: Add Baikal-T1 CCU PLLs driver
      dt-bindings: clk: Add Baikal-T1 CCU Dividers binding
      dt-bindings: clk: Add Baikal-T1 CCU PLLs binding
    166e4b48
Makefile 4.89 KB