- 20 Oct, 2021 1 commit
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Daniel Lezcano authored
The thermal framework accepts now the cpu idle cooling device as an alternative when the cpufreq cooling device fails. Add the node in the DT so the cooling devices will be present and the platforms can extend the thermal zone definition to add them. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20211001161728.1729664-1-daniel.lezcano@linaro.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 18 Oct, 2021 1 commit
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Johan Jonker authored
In the rockchip_thermal.c driver we now get the resets with a devm_reset_control_array_get() function, so remove the reset-names property as it is no longer needed. Although no longer required in rockchip-thermal.yaml sort tsadc-apb as first item. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210930110517.14323-4-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 17 Oct, 2021 3 commits
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Nicolas Frattaroli authored
On the Quartz64 Model A, the I2S1 TDM controller is connected to the rk817 codec in I2S mode. Enabling it and adding the necessary simple-sound-card and codec nodes allows for analog audio output on the PINE64 Quartz64 Model A SBC. Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211016105354.116513-5-frattaroli.nicolas@gmail.com [some property sorting] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Nicolas Frattaroli authored
This adds the necessary device tree node on rk3566 and rk3568 to enable the I2S1 TDM audio controller. I2S0 has not been added, as it is connected to HDMI and there is no way to test that it's working without a functioning video clock (read: VOP2 driver). Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211016105354.116513-4-frattaroli.nicolas@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Johan Jonker authored
Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 16 Oct, 2021 5 commits
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Arnaud Ferraris authored
A new 'chassis-type' root node property has recently been approved for the device-tree specification, in order to provide a simple way for userspace to detect the device form factor and adjust their behavior accordingly. This patch fills in this property for end-user devices (such as laptops, smartphones and tablets) based on Rockchip ARM64 processors. Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com> Link: https://lore.kernel.org/r/20211016102025.23346-5-arnaud.ferraris@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
Add the core io-domain node for rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210925090405.2601792-3-heiko@sntech.de
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Heiko Stuebner authored
Add the compatible for the pmu mfd on rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210925090405.2601792-1-heiko@sntech.de
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Nicolas Frattaroli authored
Add the necessary nodes to enable the spdif output on the RK3566-Quartz-A board. Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211015111303.1365328-2-frattaroli.nicolas@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Peter Geis authored
This adds the spdif node to the rk356x device tree. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Link: https://lore.kernel.org/r/20211015111303.1365328-1-frattaroli.nicolas@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 27 Sep, 2021 1 commit
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Liang Chen authored
Add the pwm controller nodes to the core rk3568 dtsi. Signed-off-by: Liang Chen <cl@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210726090355.1548483-2-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 23 Sep, 2021 3 commits
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Jakob Unterwurzacher authored
Other DTS files that include the dtsi will want to to add children to the i2c buses from the i2c-mus. Without a label they would have to specify the full path. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> [add phandles for first mux as well] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210922230429.2162535-3-heiko@sntech.de
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Jakob Unterwurzacher authored
This is not strictly needed, as 3.3V is the default, but good to have for descriptive purposes nevertheless. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> [fixed ordering] Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210922230429.2162535-2-heiko@sntech.de
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Jakob Unterwurzacher authored
LDO_REG7 is used for generating VCC_18. LDO_REG4 is not connected to anything - delete it. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210922230429.2162535-1-heiko@sntech.de
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- 20 Sep, 2021 6 commits
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Krzysztof Kozlowski authored
Align the name of operating-points node to dtschema to fix warnings like: opp-table0: $nodename:0: 'opp-table0' does not match '^opp-table(-[a-z0-9]+)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210819182311.223443-2-krzysztof.kozlowski@canonical.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
Enable the isp and csi phy on px30-evb and connect it to the board's ov5695 camera. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210830141318.66744-2-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
Add the rkisp1 node and iommu for the px30 soc. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210830141318.66744-1-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Brian Norris authored
Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt. This IP block can be used for sampling the PC of any given CPU, which is useful in certain panic scenarios where you can't get the CPU to stop cleanly (e.g., hard lockup). Reviewed-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Brian Norris <briannorris@chromium.org> Link: https://lore.kernel.org/r/20210908111337.v2.3.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeidSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chris Morgan authored
When writing a battery driver, I noticed that the USB voltage was ~3.7V while running off of battery on a mainline kernel. After consulting the schematics for the Odroid Go Advance, it appears that the BOOST regulator is involved in the process of powering the USB host. Power for the USB host goes from the vccsys regulator into the PMIC, then out from the PMIC BOOST regulator into the FC9516A (which is controlled by GPIO), which then feeds power into the USB host. I named the regulator usb_midu because on the datasheet the pin is described as "MIDU/BOOST - middle point of USB power supply / boost output". Making these changes solved the USB power issue on battery and I'm now reading approximately 5v. Note that on my board at least there is a difference in time from the USB PHY probing and the regulators being powered on. This causes the USB port to be undervolted for a few seconds during boot up. The solutions to this problem are either 1) to add the proper phy-supply on the host port, or to 2) add regulator-boot-on to the regulator. I chose to add regulator-boot-on because there is an issue with the phy clk that causes a warning when booting (see v1 of this patch series). Basically the clock usb480m is a child of the usb480m_phy clock (used by the USB PHY) and also a critical clock. Setting the phy-supply causes this driver to be EPROBE_DEFERed until the regulator is ready, however upon unregistering the driver to be probed later the system cannot remove the usb480m_phy clock due to a child being marked critical. Changes since v2: - Added notes about clk problem and regulator voltage at boot. - Added regulator-boot-on as a workaround for the voltage at boot. - Removed note about fixed regulator warning, as that has been fixed upstream. Changes since v1: - Removed phy-supply, as this generated a warning in dmesg. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20210916190938.6175-1-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Tommaso Merciai authored
Warning (pci_device_reg): /pcie@f8000000/pcie@0,0:reg: PCI reg address is not configuration space Signed-off-by: Tommaso Merciai <tomm.merciai@gmail.com> Link: https://lore.kernel.org/r/20210918164153.207146-1-tomm.merciai@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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- 15 Sep, 2021 20 commits
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Michael Riesch authored
Add the SARADC to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210823110716.10038-1-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Alex Bee authored
As can be seen in RK3328's TRM the register range for the GPU is 0xff300000 to 0xff330000. It would (and does in vendor kernel) overlap with the registers of the HEVC encoder (node/driver do not exist yet in upstream kernel). See already existing h265e_mmu node. Fixes: 752fbc0c ("arm64: dts: rockchip: add rk3328 mali gpu node") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Alex Bee authored
Commit 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes") intended to remove the interrupt-names property for mmu nodes, but it also removed it for the vpu node in rk3399.dtsi. That makes the driver fail probing currently. Fix this by re-adding the property for this node. Fixes: 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210822115755.3171937-1-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
This commit fixes the error messages rockchip_clk_register_muxgrf: regmap not available rockchip_clk_register_branches: failed to register clock clk_ddr1x: -524 during boot by providing the missing rockchip,grf property. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Tested-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210823123911.12095-2-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Brian Norris authored
It's convenient to get nice names for GPIOs. In particular, Chrome OS tooling looks for "AP_FLASH_WP" and "AP_FLASH_WP_L". The rest are provided for convenience. Gru-Bob and Gru-Kevin share the gru-chromebook.dtsi, and for the most part they share pin meanings. I omitted a few areas where components were available only on one or the other. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210820133829.1.Ica46f428de8c3beb600760dbcd63cf879ec24baf@changeidSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chris Morgan authored
This enables the Rockchip Serial Flash Controller for the Odroid Go Advance. Note that while the attached SPI NOR flash and the controller both support quad read mode, only 2 of the required 4 pins are present. The rx bus width is set to 2 for this reason, and tx bus width is set to 1 for compatibility reasons. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chris Morgan authored
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134639.31586-1-jon.lin@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chris Morgan authored
Add a devicetree entry for the Rockchip SFC for the PX30 SOC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134546.31340-4-jon.lin@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Peter Geis authored
Add the thermal nodes for the Quartz64 Model A. The Model A supports a single speed gpio fan. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-9-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Peter Geis authored
Add the thermal and tsadc nodes to the rk3568 device tree. There are two sensors, one for the cpu, one for the gpu. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-6-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Peter Geis authored
The rk356x added a debounce clock to the gpio devices. This clock is necessary for the new v2 gpio driver to bind. Add the clocks to the rk356x device tree. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-4-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Since the EMMC pins can be used for other functions as well, we need to configure the pinctrl. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-8-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Add the SD card reader to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-7-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Add the regulators of the RK809 PMIC to the device tree of the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-6-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Enable the PMU IO domains in the device tree for the RK3568 EVB1. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-5-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Michael Riesch authored
Enable the PMU IO domains for the RK3566 and the RK3568. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20210805120107.27007-4-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Peter Geis authored
The rockpro64 had a fan node since commit 5882d65c ("arm64: dts: rockchip: Add PWM fan for RockPro64") however it was never tied into the thermal driver for automatic control. Add the links to the thermal node to permit the kernel to handle this automatically. Borrowed from the (rk3399-khadas-edge.dtsi). Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210730151727.729822-1-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Dan Johansen authored
Some chargers try to put the charged device into device data role. Before this commit this condition caused the tcpm state machine to issue a hard reset due to a capability missmatch. Signed-off-by: Dan Johansen <strit@manjaro.org> Link: https://lore.kernel.org/r/20210805220426.2693062-1-strit@manjaro.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chen-Yu Tsai authored
Dumo is another variant of Scarlet, also known as the ASUS Chromebook Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a board-specific calibration variant for the WiFi module. Add a new device tree for it. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210812094753.2359087-3-wenst@chromium.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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Chen-Yu Tsai authored
Dumo is another variant of Scarlet, also known as the ASUS Chromebook Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a specific calibration variant for the WiFi module. Add an entry for the board compatibles. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210812094753.2359087-2-wenst@chromium.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>
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