- 22 Dec, 2015 36 commits
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Sean Cross authored
Novena is an open-hardware laptop/desktop/bare board. See http://www.kosagi.com/w/index.php?title=Novena_Main_PageSigned-off-by:
Sean Cross <xobs@kosagi.com> Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Lucas Stach <l.stach@pengutronix.de> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Sean Cross authored
Add a vendor prefix for Sutajio Ko-Usagi PTE Ltd., which goes by the more common name of Kosagi. Signed-off-by:
Sean Cross <xobs@kosagi.com> Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Rob Herring <robh@kernel.org> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Damien Riegel authored
Previously, the device tree mapped the FPGA like any other IPs inside the SoC, but it is actually mapped through the WEIM (Wireless External Interface Module). This patch updates the device tree to make use of it. About the timings: in the image provided by the manufacturer, only CS0GCR1 is changed. The other values are the default ones, but the WEIM bindings expect them to be all explicitly set in the device tree, so I just put the default values in the dt. Signed-off-by:
Damien Riegel <damien.riegel@savoirfairelinux.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Damien Riegel authored
These pins are actually not routed for UARTs, they should not be reserved. Signed-off-by:
Damien Riegel <damien.riegel@savoirfairelinux.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
This adds the device nodes for 2D, 3D and VG GPU cores. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Mans Rullgard authored
Add auart4 2-pin configuration on auart0 rts/cts pads. Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tang Yuantian authored
Added sata node to ls1021aqds and ls1021atwr board to support sata function. Signed-off-by:
Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Damien Riegel authored
This device tree adds support for TS-4800 by Technologic Systems. This board is based on MX51-babbage, but there are some subtle differences in the pins used, and there is an additional FPGA that is memory-mapped. More details here: http://wiki.embeddedarm.com/wiki/TS-4800Signed-off-by:
Damien Riegel <damien.riegel@savoirfairelinux.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Damien Riegel authored
This adds the documentation for the TS-4800 by Technologic Systems. Signed-off-by:
Damien Riegel <damien.riegel@savoirfairelinux.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Damien Riegel authored
Signed-off-by:
Damien Riegel <damien.riegel@savoirfairelinux.com> Acked-by:
Lee Jones <lee.jones@linaro.org> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Haibo Chen authored
Add ADC support for imx7d-sdb board. Signed-off-by:
Haibo Chen <haibo.chen@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Haibo Chen authored
Add imx7d ADC support. Signed-off-by:
Haibo Chen <haibo.chen@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
Add Colibri standard pinmux for FlexCAN controller instances. CAN is not a standard Colibri feature, but the datasheet predefines pins which provide CAN (compatible across some modules). Hence, add the pinmux on module level. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Alexandre Belloni authored
The backlight PWM is actually pwm4. Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
No functional change, just moving the node to the place where it belongs according to its unit address. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Philipp Zabel authored
This allows for consistent numbering of the IPU output and input ports. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
This has been moved to the reg property where it belongs for quite some time. The range has been unused by the kernel since then and with kernel 4.4 it's flagged as an unparsable range, as it does not comply to the PCI ranges DT binding. Fix this by removing the superfluous range. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Shengjiu Wang authored
Audio IP need the spba clock, but original clock name "dma" is not accurate, so change it to name "spba". The audio driver has been using the new name "spba", the binding document has been updated. Signed-off-by:
Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Meng Yi authored
Signed-off-by:
Alison Wang <b18965@freescale.com> Signed-off-by:
Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by:
Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by:
Meng Yi <b56799@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Meng Yi authored
Signed-off-by:
Alison Wang <b18965@freescale.com> Signed-off-by:
Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by:
Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by:
Meng Yi <b56799@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
As on i.MX7D, we using a virtual arm clk for CPU frequency scaling, so correct the clocks info used by the cpufreq driver. Signed-off-by:
Bai Ping <b51503@freescale.com> Acked-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
This addes support for SPI available on an off-board connector available on some models of the GW52xx. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Ventana boards have an off-board connector with signals that can be pinmuxed as either GPIO or PWM. This patch adds pwm device-tree nodes in the disabled state which the bootloader can decide to enable based on bootloader config. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Afzal Mohammed authored
Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via Cortex-A5 running Linux using Stefan Agner's <stefan@agner.ch> "m4boot" utility. Signed-off-by:
Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Cory Tusar authored
Extend the existing Vybrid DSPI devicetree implementation to also describe the dspi2 and dspi3 functional blocks. Signed-off-by:
Cory Tusar <cory.tusar@pid1solutions.com> Acked-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Marc Kleine-Budde authored
This, together with the corresponding patch to pwm-imx.c, allows to order the pwm devices correctly. Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Markus Pargmann authored
imx6qdl.dtsi uses compatibles "fsl,imx6q-gpt", "fsl,imx31-gpt". imx6dl.dtsi uses compatibles "fsl,imx6dl-gpt", "fsl,imx6q-gpt" since commit 4e415ed8 (ARM: dts: imx6dl: add imx6dl gpt specific compatible string) If imx6dl would be compatible with imx6q-gpt it would also have to be compatible with imx31-gpt which is currently missing. Based on the above mentioned patch I assume imx6q-gpt and imx6dl-gpt are not compatible. So imx6q-gpt should be removed as compatible. Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the displays supported by the Ventana boards. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
The GW54xx PMIC swbst regulator is used for LVDS power, CANbus xceiver and HDMI DDC and is enabled by the bootloader. Set the regulator to always-on so that Linux doesn't turn it off thinking its not needed. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Uwe Kleine-König authored
This patch adds some values that are needed for an out-of-tree device tree I'm currently working with. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Add support for ADC1. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Specify the 'adck-max-frequency' property in the adc nodes. According to Documentation/devicetree/bindings/iio/adc/vf610-adc.txt this is a recommended property. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Fugang Duan <B38611@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
It can improve the USB performance when choosing larger burst size at some systems (bus size is larger), there is no side effect if this burst size is larger than bus size. Signed-off-by:
Peter Chen <peter.chen@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
After setting ahb burst configuration as 0, we can increase tx/rx burst size, it will improve the USB performance Signed-off-by:
Peter Chen <peter.chen@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Shawn Guo authored
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- 15 Dec, 2015 2 commits
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Krzysztof Hałasa authored
Gateworks Ventana boards seem to need "RGMII-ID" (internal delay) PHY mode, instead of simple "RGMII", for their Marvell 88E1510 transceiver. Otherwise, the Ethernet MAC doesn't work with Marvell PHY driver (TX doesn't seem to work correctly). Tested on GW5400 rev. C. This bug affects ARM Fedora 23. Signed-off-by:
Krzysztof Hałasa <khalasa@piap.pl> Acked-by:
Tim Harvey <tharvey@gateworks.com> Cc: <stable@vger.kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
The 'assigned-clock-parents' and 'assigned-clock-rates' list should corresponding to the 'assigned-clocks' property clock list. Signed-off-by:
Bai Ping <b51503@freescale.com> Fixes: ed339363 ("ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously") Cc: <stable@vger.kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 11 Dec, 2015 1 commit
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Stefan Agner authored
Linux on Vybrid used several different L2 latencies so far, none of them seem to be the right ones. According to the application note AN4947 ("Understanding Vybrid Architecture"), the tag portion runs on CPU clock and is inside the L2 cache controller, whereas the data portion is stored in the external SRAM running on platform clock. Hence it is likely that the correct value requires a higher data latency then tag latency. These are the values which have been used so far: - The mainline values: arm,data-latency = <1 1 1>; arm,tag-latency = <2 2 2>; Those values have lead to problems on higher clocks. They look like a poor translation from the reset values (missing +1 offset and a mix up between tag/latency values). - The Linux 3.0 (SoC vendor BSP) values (converted to DT notation): arm,data-latency = <4 2 3> arm,tag-latency = <4 2 3> The cache initialization function along with the value matches the i.MX6 code from the same kernel, so it seems that those values have just been copied. - The Colibri values: arm,data-latency = <2 1 2>; arm,tag-latency = <3 2 3>; Those were a mix between the values of the Linux 3.0 based BSP and the mainline values above. - The SoC Reset values (converted to DT notation): arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; So far there is no official statement on what the correct values are. See also the related Freescale community thread: https://community.freescale.com/message/579785#579785 For now, the reset values seem to be the best bet. Remove all other "bogus" values and use the reset value on vf610.dtsi level. Signed-off-by:
Stefan Agner <stefan@agner.ch> Cc: <stable@vger.kernel.org> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 02 Dec, 2015 1 commit
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Patrick Brünn authored
To obtain exact pixel clocks, allow the DI clock selectors to influence the PLLs that they are derived from. Commit 4591b132 ("ARM: i.MX6: ipu_di_sel clocks can set parent rates") did this for i.MX6. Port it to enable high display resolutions on i.MX53 based platforms such as CX9020 Embedded PC, too. Signed-off-by:
Patrick Brünn <p.bruenn@beckhoff.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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