- 15 Nov, 2022 3 commits
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Conor Dooley authored
Emil looks after the downstream StarFive stuff, and agreed to look after the upstream ones too. CC: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Emil Renner Berthing <kernel@esmil.dk> Link: https://lore.kernel.org/r/20221109212219.1598355-4-conor@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Conor Dooley authored
These drivers work on our other FPGAs, for example the non-SoC PolarFire connected to an FU-540 via chiplink. Make the entry a wee bit more generic to match. While at it, remove the / from the heading so that it matches other, neighbouring RISC-V entries. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221109212219.1598355-3-conor@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Conor Dooley authored
Following some discussion both on & off list, I have volunteered to take over maintaining the miscellaneous RISC-V devicetrees & soc drivers from Palmer to ease his load. So far only SiFive and Microchip have stuff in drivers/soc. For the former, a SiFive entry exists with a dead GitHub repo - so remove that to avoid confusion since the patches for drivers/soc & devicetrees will be routed via my tree & other drivers go through their subsystem trees. The Microchip directory only contains a RISC-V driver for now, but is likely to contain drivers for other archs in the future. To that end, change the PolarFire SoC entry to specifically mention the RISC-V driver & the new directory level entry does not mention an architecture. CC: Arnd Bergmann <arnd@arndb.de> CC: Nicolas Ferre <nicolas.ferre@microchip.com> CC: Palmer Dabbelt <palmer@dabbelt.com> Link: https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20221109212219.1598355-2-conor@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 14 Nov, 2022 2 commits
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Arnd Bergmann authored
Merge tag 'at91-fixes-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes for 6.1 It contains: - signal name fix for a pin on SAMA7G5 - memory self-refresh fix for SAMA7G5 by avoid soft resetting AC DLL which can introduce glitches in RAM controller and lead to unexpected behavior - led support fix for lan966x-pcb8291 board by enabling sgpio node * tag 'at91-fixes-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: avoid soft resetting AC DLL ARM: dts: lan966x: Enable sgpio on pcb8291 ARM: dts: at91: sama7g5: fix signal name of pin PB2 Link: https://lore.kernel.org/r/20221110115411.180876-1-claudiu.beznea@microchip.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'qcom-arm64-fixes-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 DTS fixes for 6.1 This fixes the APCS register region on IPQ8074 to not overlap with adjacent nodes. It lists the valid LDO modes on a variety of platforms, as this is not required by the binding and implementation. The reference clocks for the two UFS instances on SC8280XP are corrected, to avoid relying on the state left by most versions of the bootloader. A number of issues are corrected with regards to the QMP PHY register ranges on SC8280XP. SC7280 gains a missing lpass reset region. Lastly cluster idle is termporarily disabled on SM8250 to avoid issues with booting the platform, until the last missing pieces lands. * tag 'qcom-arm64-fixes-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sm8250: Disable the not yet supported cluster idle state arm64: dts: qcom: sc7280: Add the reset reg for lpass audiocc on SC7280 arm64: dts: qcom: sc8280xp: fix UFS PHY serdes size arm64: dts: qcom: sc8280xp: drop broken DP PHY nodes arm64: dts: qcom: sc8280xp: fix USB PHY PCS registers arm64: dts: qcom: sc8280xp: fix USB1 PHY RX1 registers arm64: dts: qcom: sc8280xp: fix USB0 PHY PCS_MISC registers arm64: dts: qcom: sc8280xp: correct ref clock for ufs_mem_phy arm64: dts: qcom: sc8280xp: fix ufs_card_phy ref clock arm64: dts: qcom: sm8350-hdk: Specify which LDO modes are allowed arm64: dts: qcom: sm8250-xperia-edo: Specify which LDO modes are allowed arm64: dts: qcom: sm8150-xperia-kumano: Specify which LDO modes are allowed arm64: dts: qcom: sc8280xp-crd: Specify which LDO modes are allowed arm64: dts: qcom: sa8295p-adp: Specify which LDO modes are allowed arm64: dts: qcom: sa8155p-adp: Specify which LDO modes are allowed Revert "arm64: dts: qcom: msm8996: add missing TCSR syscon compatible" arm64: dts: qcom: ipq8074: correct APCS register space size Link: https://lore.kernel.org/r/20221110040635.795921-1-andersson@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 02 Nov, 2022 2 commits
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Arnd Bergmann authored
Merge tag 'juno-fix-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes Armv8 Juno fix for v6.1 Just a single fix to add the missing critical points in the thermal zones that has been mandatory in the binding but was enforced in the code recently. * tag 'juno-fix-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add thermal critical trip points Link: https://lore.kernel.org/r/20221102140156.2758137-1-sudeep.holla@arm.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'scmi-fixes-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes Arm SCMI fixes for v6.1 A bunch of fixes to handle: 1. A possible resource leak in scmi_remove(). The returned error value gets ignored by the driver core and can remove the device and free the devm-allocated resources. As a simple solution to be able to easily backport, the bind attributes in the driver is suppressed as there is no need to support it. Additionally the remove path is cleaned up by adding device links between the core and the protocol devices so that a proper and complete unbinding happens. 2. A possible spin-loop in the SCMI transmit path in case of misbehaving platform firmware. A timeout is added to the existing loop so that the SCMI stack can bailout aborting the transmission with warnings. 3. Optional Rx channel correctly by reporting any memory errors instead of ignoring the same with other allowed errors. 4. The use of proper device for all the device managed allocations in the virtio transport. 5. Incorrect deferred_tx_wq release on the error paths by using devres API(devm_add_action_or_reset) to manage the release in the error path. * tag 'scmi-fixes-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: firmware: arm_scmi: Fix deferred_tx_wq release on error paths firmware: arm_scmi: Fix devres allocation device in virtio transport firmware: arm_scmi: Make Rx chan_setup fail on memory errors firmware: arm_scmi: Make tx_prepare time out eventually firmware: arm_scmi: Suppress the driver's bind attributes firmware: arm_scmi: Cleanup the core driver removal callback Link: https://lore.kernel.org/r/20221102140142.2758107-1-sudeep.holla@arm.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 01 Nov, 2022 11 commits
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Cristian Marussi authored
When thermnal zones are defined, trip points definitions are mandatory. Define a couple of critical trip points for monitoring of existing PMIC and SOC thermal zones. This was lost between txt to yaml conversion and was re-enforced recently via the commit 8c596324 ("dt-bindings: thermal: Fix missing required property") Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: devicetree@vger.kernel.org Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Fixes: f7b636a8 ("arm64: dts: juno: add thermal zones for scpi sensors") Link: https://lore.kernel.org/r/20221028140833.280091-8-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
Use devres to allocate the dedicated deferred_tx_wq polling workqueue so as to automatically trigger the proper resource release on error path. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Fixes: 5a3b7185 ("firmware: arm_scmi: Add atomic mode support to virtio transport") Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-6-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
SCMI virtio transport device managed allocations must use the main platform device in devres operations instead of the channel devices. Cc: Peter Hilber <peter.hilber@opensynergy.com> Fixes: 46abe13b ("firmware: arm_scmi: Add virtio transport") Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-5-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
SCMI Rx channels are optional and they can fail to be setup when not present but anyway channels setup routines must bail-out on memory errors. Make channels setup, and related probing, fail when memory errors are reported on Rx channels. Fixes: 5c8a47a5 ("firmware: arm_scmi: Make scmi core independent of the transport type") Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-4-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
SCMI transports based on shared memory, at start of transmissions, have to wait for the shared Tx channel area to be eventually freed by the SCMI platform before accessing the channel. In fact the channel is owned by the SCMI platform until marked as free by the platform itself and, as such, cannot be used by the agent until relinquished. As a consequence a badly misbehaving SCMI platform firmware could lock the channel indefinitely and make the kernel side SCMI stack loop forever waiting for such channel to be freed, possibly hanging the whole boot sequence. Add a timeout to the existent Tx waiting spin-loop so that, when the system ends up in this situation, the SCMI stack can at least bail-out, nosily warn the user, and abort the transmission. Reported-by: YaxiongTian <iambestgod@outlook.com> Suggested-by: YaxiongTian <iambestgod@outlook.com> Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Etienne Carriere <etienne.carriere@linaro.org> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-3-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
Suppress the capability to unbind the core SCMI driver since all the SCMI stack protocol drivers depend on it. Fixes: aa4f886f ("firmware: arm_scmi: add basic driver infrastructure for SCMI") Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-2-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Cristian Marussi authored
Platform drivers .remove callbacks are not supposed to fail and report errors. Such errors are indeed ignored by the core platform drivers and the driver unbind process is anyway completed. The SCMI core platform driver as it is now, instead, bails out reporting an error in case of an explicit unbind request. Fix the removal path by adding proper device links between the core SCMI device and the SCMI protocol devices so that a full SCMI stack unbind is triggered when the core driver is removed. The remove process does not bail out anymore on the anomalous conditions triggered by an explicit unbind but the user is still warned. Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Cristian Marussi <cristian.marussi@arm.com> Link: https://lore.kernel.org/r/20221028140833.280091-1-cristian.marussi@arm.comSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>
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Jay Fang authored
Add Jay Fang as the maintainer of the HiSilicon LPC BUS Driver, replacing John Garry. Signed-off-by: Jay Fang <f.fangjian@huawei.com> Link: https://lore.kernel.org/r/20221028105434.1661264-1-f.fangjian@huawei.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Linus Walleij authored
Recent changes to the thermal framework has made the trip points (trips) for thermal zones compulsory, which made the Ux500 DTS files break validation and also stopped probing because of similar changes to the code. Fix this by adding an "outer bounding box": battery thermal zones should not get warmer than 70 degress, then we will shut down. Fixes: 8c596324 ("dt-bindings: thermal: Fix missing required property") Fixes: 3fd6d6e2 ("thermal/of: Rework the thermal device tree initialization") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-pm@vger.kernel.org Link: https://lore.kernel.org/r/20221030210854.346662-1-linus.walleij@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-fixes-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.1: - Fix imx93-pd driver to release resources when error occurs in probe. - A series from Ioana Ciornei to add missing clock frequencies for MDIO controllers on LayerScape SoCs, so that the kernel driver can work independently from bootloader. - A series from Li Jun to fix USB power domain setup in i.MX8MM/N device trees. - Fix CPLD_Dn pull configuration for MX8Menlo board to avoid interfering with CPLD power off functionality. - Fix ctrl_sleep_moci GPIO setup for verdin-imx8mp board. - Fix DT schema check warnings on uSDHC clocks for imx8-ss-conn device tree. - Fix up gpcv2 DT bindings to have an optional `power-domains` property. - A couple of i.MX93 device tree fixes on S4MU interrupt and gpio-ranges of GPIO controllers. - Keep PU regulator on for Quad and QuadPlus based imx6dl-yapp4 boards to work around a hardware design flaw in supply voltage distribution. - Fix user push-button GPIO offset on imx6qdl-gw59 boards. * tag 'imx-fixes-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: ls208xa: specify clock frequencies for the MDIO controllers arm64: dts: ls1088a: specify clock frequencies for the MDIO controllers arm64: dts: lx2160a: specify clock frequencies for the MDIO controllers soc: imx: imx93-pd: Fix the error handling path of imx93_pd_probe() arm64: dts: imx93: correct gpio-ranges arm64: dts: imx93: correct s4mu interrupt names dt-bindings: power: gpcv2: add power-domains property arm64: dts: imx8: correct clock order ARM: dts: imx6dl-yapp4: Do not allow PM to switch PU regulator off on Q/QP ARM: dts: imx6qdl-gw59{10,13}: fix user pushbutton GPIO offset arm64: dts: imx8mn: Correct the usb power domain arm64: dts: imx8mn: remove otg1 power domain dependency on hsio arm64: dts: imx8mm: correct usb power domains arm64: dts: imx8mm: remove otg1/2 power domain dependency on hsio arm64: dts: verdin-imx8mp: fix ctrl_sleep_moci arm64: dts: imx8mm: Enable CPLD_Dn pull down resistor on MX8Menlo Link: https://lore.kernel.org/r/20221101031547.GB125525@dragonSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Claudiu Beznea authored
Do not soft reset AC DLL as controller is buggy and this operation my introduce glitches in the controller leading to undefined behavior. Fixes: f0bbf179 ("ARM: at91: pm: add self-refresh support for sama7g5") Depends-on: a02875c4 ("ARM: at91: pm: fix self-refresh for sama7g5") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-2-claudiu.beznea@microchip.com
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- 31 Oct, 2022 1 commit
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Horatiu Vultur authored
Enable sgpio node on pcb8291 as this is needed to be able to control the LEDs on this board. Otherwise the LEDs support on the board will not be available. On the other board pcb8309 the sgpio is already enabled because it needed to access the SFP ports. Fixes: 0b7baa1a ("ARM: dts: lan966x: add led configuration") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026174303.702919-1-horatiu.vultur@microchip.com
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- 29 Oct, 2022 15 commits
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Ioana Ciornei authored
Up until now, the external MDIO controller frequency values relied either on the default ones out of reset or on those setup by u-boot. Let's just properly specify the MDC frequency in the DTS so that even without u-boot's intervention Linux can drive the MDIO bus. Fixes: 0420dde3 ("arm64: dts: ls208xa: add the external MDIO nodes") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Ioana Ciornei authored
Up until now, the external MDIO controller frequency values relied either on the default ones out of reset or on those setup by u-boot. Let's just properly specify the MDC frequency in the DTS so that even without u-boot's intervention Linux can drive the MDIO bus. Fixes: bbe75af7 ("arm64: dts: ls1088a: add external MDIO device nodes") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Ioana Ciornei authored
Up until now, the external MDIO controller frequency values relied either on the default ones out of reset or on those setup by u-boot. Let's just properly specify the MDC frequency in the DTS so that even without u-boot's intervention Linux can drive the MDIO bus. Fixes: 6e1b8fae ("arm64: dts: lx2160a: add emdio1 node") Fixes: 5705b9dc ("arm64: dts: lx2160a: add emdio2 node") Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Christophe JAILLET authored
In imx93_pd_probe(); if an error occurs, some resources need to be released as done in the remove function. Fixes: 0a0f7cc2 ("soc: imx: add i.MX93 SRC power domain driver") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Per imx93-pinfunc.h and pinctrl-imx93.c, correct gpio-ranges. Fixes: ec8b5b50 ("arm64: dts: freescale: Add i.MX93 dtsi support") Reported-by: David Wolfe <david.wolfe@nxp.com> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Per binding doc, interrupt names should be tx and rx. Fixes: 0dfb380d ("arm64: dts: imx93: add s4 mu node") Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Some pgc power-domain requires a parent power domain, so add an optional power-domains property, otherwise there will be dt check warning: gpc@303a0000: pgc:power-domain@1: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+' Fixes: 30af8513 ("dt-bindings: power: add defines for i.MX8MM power domains") Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
Per bindings/mmc/fsl-imx-esdhc.yaml, the clock order is ipg, ahb, per, otherwise warning: " mmc@5b020000: clock-names:1: 'ahb' was expected mmc@5b020000: clock-names:2: 'per' was expected " Fixes: 16c4ea75 ("arm64: dts: imx8: switch to new lpcg clock binding") Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Petr Benes authored
Fix our design flaw in supply voltage distribution on the Quad and QuadPlus based boards. The problem is that we supply the SoC cache (VDD_CACHE_CAP) from VDD_PU instead of VDD_SOC. The VDD_PU internal regulator can be disabled by PM if VPU or GPU is not used. If that happens the system freezes. To prevent that configure the reg_pu regulator to be always on. Fixes: 0de4ab81 ("ARM: dts: imx6dl-yapp4: Add Y Soft IOTA Crux/Crux+ board") Cc: petrben@gmail.com Cc: stable@vger.kernel.org Signed-off-by: Petr Benes <petr.benes@ysoft.com> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
The GW5910 and GW5913 have a user pushbutton that is tied to the Gateworks System Controller GPIO offset 2. Fix the invalid offset of 0. Fixes: 64bf0a0a ("ARM: dts: imx6qdl-gw: add Gateworks System Controller support") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Jun authored
pgc_otg1 is actual the power domain of usb PHY, usb controller is in hsio power domain, and pgc_otg1 is required to be powered up to detect usb remote wakeup, so move the pgc_otg1 power domain to the usb phy node. Fixes: ea2b5af5 ("arm64: dts: imx8mn: put USB controller into power-domains") Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Jun authored
pgc_otg1 is an independent power domain of hsio, it's for usb phy, so remove hsio power domain from its node. Fixes: 8b8ebec6 ("arm64: dts: imx8mn: add GPC node") Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Jun authored
pgc_otg1/2 is actual the power domain of usb PHY, usb controller is in hsio power domain, and pgc_otg1/2 is required to be powered up to detect usb remote wakeup, so move the pgc_otg1/2 power domain to the usb phy node. Fixes: 01df28d8 ("arm64: dts: imx8mm: put USB controllers into power-domains") Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Jun authored
pgc_otg1/2 are independent power domain of hsio, they for usb phy, so remove hsio power domain dependency from its node. Fixes: d39d4bb1 ("arm64: dts: imx8mm: add GPC node") Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Max Krummenacher authored
The GPIO signaling ctrl_sleep_moci is currently handled as a gpio hog. But the gpio-hog node is made a child of the wrong gpio controller. Move it to the node representing gpio4 so that it actually works. Without this carrier board components jumpered to use the signal are unconditionally switched off. Fixes: a39ed23b ("arm64: dts: freescale: add initial support for verdin imx8m plus") Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 28 Oct, 2022 1 commit
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Ulf Hansson authored
To support the deeper cluster idle state for sm8250 platforms, some additional synchronization is needed between the rpmh-rsc device and the CPU cluster PM domain. Until that is supported, let's disable the cluster idle state. This fixes a problem that has been reported for the Qcom RB5 platform (see below), but most likely other sm8250 platforms suffers from similar issues, so let's make the fix generic for sm8250. vreg_l11c_3p3: failed to enable: -ETIMEDOUT qcom-rpmh-regulator 18200000.rsc:pm8150l-rpmh-regulators: ldo11: devm_regulator_register() failed, ret=-110 qcom-rpmh-regulator: probe of 18200000.rsc:pm8150l-rpmh-regulators failed with error -110 Reported-by: Amit Pundir <amit.pundir@linaro.org> Fixes: 32bc936d ("arm64: dts: qcom: sm8250: Add cpuidle states") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221027115745.240516-1-ulf.hansson@linaro.org
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- 27 Oct, 2022 1 commit
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Arnd Bergmann authored
Merge tag 'arm-soc/for-6.1/maintainers-fixes' of https://github.com/Broadcom/stblinux into arm/fixes This pull request contains MAINTAINERS file updates for Broadcom sections, please pull the following: - Palmer updates the various Broadcom entries to use https instead of git for the git trees listed * tag 'arm-soc/for-6.1/maintainers-fixes' of https://github.com/Broadcom/stblinux: MAINTAINERS: git://github -> https://github.com for broadcom Link: https://lore.kernel.org/r/20221019185514.750684-1-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 24 Oct, 2022 1 commit
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Mihai Sain authored
The signal name of pin PB2 with function F is FLEXCOM11_IO1 as it is defined in the datasheet. Fixes: 7540629e ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221017083119.1643-1-mihai.sain@microchip.com
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- 23 Oct, 2022 3 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds authored
Pull kvm fixes from Paolo Bonzini: "RISC-V: - Fix compilation without RISCV_ISA_ZICBOM - Fix kvm_riscv_vcpu_timer_pending() for Sstc ARM: - Fix a bug preventing restoring an ITS containing mappings for very large and very sparse device topology - Work around a relocation handling error when compiling the nVHE object with profile optimisation - Fix for stage-2 invalidation holding the VM MMU lock for too long by limiting the walk to the largest block mapping size - Enable stack protection and branch profiling for VHE - Two selftest fixes x86: - add compat implementation for KVM_X86_SET_MSR_FILTER ioctl selftests: - synchronize includes between include/uapi and tools/include/uapi" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: tools: include: sync include/api/linux/kvm.h KVM: x86: Add compat handler for KVM_X86_SET_MSR_FILTER KVM: x86: Copy filter arg outside kvm_vm_ioctl_set_msr_filter() kvm: Add support for arch compat vm ioctls RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for Sstc RISC-V: Fix compilation without RISCV_ISA_ZICBOM KVM: arm64: vgic: Fix exit condition in scan_its_table() KVM: arm64: nvhe: Fix build with profile optimization KVM: selftests: Fix number of pages for memory slot in memslot_modification_stress_test KVM: arm64: selftests: Fix multiple versions of GIC creation KVM: arm64: Enable stack protection and branch profiling for VHE KVM: arm64: Limit stage2_apply_range() batch size to largest block KVM: arm64: Work out supported block level at compile time
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Jason A. Donenfeld authored
This reverts commit 72a95859. It broke reboots on big-endian MIPS and MIPS64 malta QEMU instances, which use the syscon driver. Little-endian is not effected, which means likely it's important to handle regmap_get_val_endian() in this function after all. Fixes: 72a95859 ("mfd: syscon: Remove repetition of the regmap_get_val_endian()") Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Lee Jones <lee@kernel.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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