- 22 Jul, 2020 9 commits
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Arnd Bergmann authored
Merge tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 DT updates for v5.9 For SM8250 this adds the main pinctrl/gpio block (TLMM), I2C and SPI controllers, the CPU subsytem watchdog, inter-processor signalling controller (IPCC), always-on power/clock controller (AOSS), inter-processor state machine (SMP2P), defines remoteproc controls for audio, compute and sensor processors and base definition for the PM8009 PMIC. It also does fix up a few minor issues from the initial merge of the platform support. SC7180 and SDM845 gains interconnect paths and performance tables defined for display, QUP, QSPI, SDHC and CPUs. SC7180 gains WiFi support and some cleanups related to the modem remoteproc. SDM845 gains inline crypto engine support for UFS, LAB/IBB regulators for powering display panels, remoteproc relocation debug support SM8150 gains USB controller support and the two related PHYs, as well as thermal zones and throttling support. IPQ8074 gains USB and SDHCI support. MSM8916 is being cleaned up, gains interconnect providers and Samsung A2015 gains accelerometer and magnetometer support. MSM8994 gains PSCI, SDHCI, SPMI support, I2C, SPI, UART gains DMA support and the DTS files are cleaned up. The SDM630 platform DTS is at last merged and initial support for Sony Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra is added. * tag 'qcom-arm64-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (66 commits) arm64: dts: qcom: pmi8998: Add nodes for LAB and IBB regulators arm64: dts: sc7180: Add DSI and MDP OPP tables and power-domains arm64: dts: sdm845: Add DSI and MDP OPP tables and power-domains arm64: dts: qcom: sc7180: Move the fixed-perm property to SoC dtsi arm64: dts: qcom: msm8916-samsung-a2015: Add accelerometer/magnetometer arm64: dts: qcom: msm8916: Use higher I2C drive-strength only on DB410c arm64: dts: qcom: msm8916: Simplify pinctrl configuration arm64: dts: msm8916-samsung/longcheer: Move pinctrl/regulators to end of file arm64: dts: qcom: sm8250: Drop tcsr_mutex syscon arm64: dts: qcom: sc7180: Add missing properties for Wifi node arm64: dts: qcom: Fix WiFi supplies on sc7180-idp arm64: dts: sdm845: add Inline Crypto Engine registers and clock arm64: dts: sc7180: Add sdhc opps and power-domains arm64: dts: sdm845: Add sdhc opps and power-domains arm64: dts: sc7180: Add OPP table for all qup devices arm64: dts: sdm845: Add OPP table for all qup devices arm64: dts: sc7180: Add qspi opps and power-domains arm64: dts: sdm845: Add qspi opps and power-domains arm64: dts: qcom: sdm845: Add cpu OPP tables arm64: dts: qcom: sc7180: Drop the unused non-MSA SID ... Link: https://lore.kernel.org/r/20200721044934.3430084-1-bjorn.andersson@linaro.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
ARM64: DT: Hisilicon SoCs DT updates for 5.9 - Refactor hi6220-hikey dts to use phandles for overriding nodes - Align UART node name to fix dtschema validator warnings for hi6220 - Add basic usb gadget support on hikey960 - Update adv7533 nodes to meet with the binding for hikey and hikey960 * tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding dts: hi3660: Add support for basic usb gadget on Hikey960 arm64: dts: hisilicon: Align UART nodename with dtschema arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220 Link: https://lore.kernel.org/r/5F165E8E.3030503@hisilicon.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
ARM: DT: Hisilicon ARM32 SoCs updates for v5.9 - Update L2 cache controller nodes to fix dtschema validator warnings for hi3620 and hix5hd2 * tag 'hisi-arm32-dt-for-5.9' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/5F165FA1.2030301@hisilicon.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual number of patches to improve the Allwinner Device Tree support, including: - CPUFreq / Thermal throttling support for the H5 - Touchscreen support for the Pinephone - New boards: PinePhone v1.2 * tag 'sunxi-dt-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h5: bananapi-m2-plus-v1.2: Tie in CPU OPPs arm64: dts: allwinner: h5: libretech-all-h3-cc: Tie in CPU OPPs arm64: dts: allwinner: h5: Add CPU Operating Performance Points table arm64: dts: allwinner: h5: Add trip and cooling maps to CPU thermal zones arm64: dts: allwinner: h5: Add clock to CPU cores ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltages ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU cores ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU cores arm64: dts: sun50i-pinephone: dldo4 must not be >= 1.8V arm64: dts: allwinner: Add support for PinePhone revision 1.2 dt-bindings: arm: sunxi: Add PinePhone 1.2 bindings arm64: dts: sun50i-a64-pinephone: Add touchscreen support arm64: dts: sun50i-a64-pinephone: Enable LCD support on PinePhone ARM: dts: orange-pi-zero-plus2: add leds configuration ARM: dts: orange-pi-zero-plus2: enable USB OTG port Link: https://lore.kernel.org/r/fa48ffcb-3404-41bb-b065-a16717cf5688.lettre@localhostSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt Versatile DTS changes for the v5.9 kernel cycle, essentially just a single patch fixing up the node names for schema. * tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree update for 5.9: - Update i.MX8M OCOTP device node name to match .yaml schema. - Add ftm_alarm0 device support for layerscape SoCs. - Add DSPI controller support for lx2160a device. - A series from Peng Fan to add aliases for various devices on i.MX8 SoCs. - Add Hantro G1/G2 VPU device support for imx8mq. - Add more thermal zone support for ls1028a, ls1043a and ls1046a. - Other small random changes. * tag 'imx-dt64-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits) arm64: dts: lx2160a-rdb: fix shunt-resistor value arm64: dts: ls1028a-qds: Add DSPI flash nodes arm64: dts: lx2160a: Increase configuration space size arm64: dts: zii-ultra: update MDIO speed and preamble arm64: dts: ls1043a: update USB nodes status to match board config arm64: dts: imx8mn-evk: add pca9450 for i.mx8mn-evk board arm64: dts: imx8mp: add ddr pmu device node arm64: dts: ls1043a: add more thermal zone support arm64: dts: ls1046a: add more thermal zone support arm64: dts: layerscape: add ftm_alarm0 node arm64: dts: ls1028a: Add ftm_alarm0 DT node arm64: dts: lx2160a: add ftm_alarm0 DT node arm64: dts: lx2160a: add DT node for all DSPI controller arm64: dts: lx2160a: add dspi controller DT nodes arm64: dts: imx8mp: Add fallback compatible to ocotp node arm64: dts: imx8qxp: Add ethernet alias arm64: dts: imx8qxp: add i2c aliases arm64: dts: imx8qxp: add alias for lsio MU arm64: dts: imx8m: add mu node arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs ... Link: https://lore.kernel.org/r/20200720085536.24138-4-shawnguo@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linuxArnd Bergmann authored
i.MX device tree update for 5.9: - New board support: Protonic PRTI6Q/WD2/VT7/RVT and MYiR MYS-6ULX SBC. - Update IIM, OCOTP and SD/MMC device node name to match .yaml bindings. - Make tempmon node as child of anatop node according to hardware architecture. - The vf610-zii device update: configure fiber port to 1000BaseX, add switch watchdog, MDIO speed and preamble. - A series from Fabio Estevam to update imx6qdl-sabresd and imx6q-tbs2910 for using MDIO node and reset-assert-us. - Align L2 cache-controller device node name with .yaml schema. - Enable SATA support for imx6qp-sabreauto and imx6qp-sabresd board. - A series of patches from Shengjiu Wang to enable various audio support on i.MX6 devices. - Add Gateworks System Controller support for imx6qdl-gw devices. - Change default #pwm-cells setting to <3> in the SoC dtsi files. - Other small random changes. * tag 'imx-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (43 commits) ARM: dts: vf610-zii-ssmb-spu3: Add node for switch watchdog ARM: dts: vf610-zii-ssmb-dtu: Add no-sdio/no-sd properties ARM: dts: imx6q-tbs2910: Pass reset-assert-us ARM: dts: imx6q-tbs2910: Add an mdio node ARM: dts: imx6qdl-sabresd: Pass reset-assert-us ARM: dts: imx6qdl-sabresd: Add an mdio node ARM: dts: imx6qdl-gw: add Gateworks System Controller support ARM: dts: imx6ull: add MYiR MYS-6ULX SBC ARM: dts: vf610-zii-spb4: Add node for switch watchdog ARM: dts: colibri-imx6: remove pinctrl-names orphan ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files ARM: dts: vf610-zii-scu4-aib: Configure fibre ports to 1000BaseX ARM: dts: vf610-zii-dev-rev-c: Configure fiber port to 1000BaseX ARM: dts: ZII: update MDIO speed and preamble ARM: dts: vfxxx: Add node for CAAM ARM: dts: imx6qp-sabresd: enable sata ARM: dts: imx6qp-sabreauto: enable sata ARM: dts: add Protonic RVT board ARM: dts: add Protonic VT7 board ARM: dts: add Protonic WD2 board ... Link: https://lore.kernel.org/r/20200720085536.24138-3-shawnguo@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-bindings-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings for 5.9: - Add compatible for Protonic PRTI6Q, WD2, RVT, VT7 boards. - Add compatible for MYiR Tech iMX6ULL Evaluation Board * tag 'imx-bindings-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add MYiR Tech boards dt-bindings: arm: fsl: add different Protonic boards Link: https://lore.kernel.org/r/20200720085536.24138-2-shawnguo@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.9 - Populate clock entries for Agilex platform - Add "reset-names" to SPI entries - Add Maxim max1619 temperature sensor to Arria10 devkit * tag 'socfpga_dts_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit arm: dts: socfpga: add reset-names to spi node arm64: dts: agilex: add nand clocks arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex Link: https://lore.kernel.org/r/20200719011804.15599-1-dinguyen@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 20 Jul, 2020 17 commits
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Chen-Yu Tsai authored
The Bananapi M2 Plus H5 v1.2 can work with the standard H5 OPPs. Tie them in to enable CPU frequency scaling. The original Bananapi M2 Plus H5 is left out for now, as adding the fixed regulator along with the enable pin seemed to cause some glitching in Linux. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-9-wens@kernel.org
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Chen-Yu Tsai authored
The Libre Computer ALL-H3-CC H5 variant can work with the standard H5 OPPs. Tie them in to enable CPU frequency scaling. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-8-wens@kernel.org
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Chen-Yu Tsai authored
Add an OPP (Operating Performance Points) table for the CPU cores for boards to include to DVFS (Dynamic Voltage & Frequency Scaling) on the H5. The table originates from Armbian, but the maximum voltage is raised slightly to account for boards using slightly higher voltages. The table and tie in to the CPU cores are put in a separate dtsi file that board files can include to opt in. Or they can define their own tables if the standard one does not fit. This has been tested on the Libre Computer ALL-H3-CC-H5 and the Bananapi M2+ v1.2 H5, both with adequate cooling. The former has a fixed 1.2V regulator, while the latter has a GPIO controlled regulator switchable between 1.1V and 1.3V. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-7-wens@kernel.org
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Chen-Yu Tsai authored
This enables passive cooling by down-regulating CPU voltage and frequency. The trip points were copied from the H3. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-6-wens@kernel.org
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Chen-Yu Tsai authored
The ARM CPU cores are fed by the CPU clock from the CCU. Add a reference to the clock for each CPU core, along with the clock transition latency. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-5-wens@kernel.org
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Chen-Yu Tsai authored
The Bananapi M2+ uses a GPIO line to change the effective resistance of the CPU supply regulator's feedback resistor network. The voltages described in the device tree were given directly by the vendor. This turns out to be slightly off compared to the real values. The updated voltages are based on calculations of the feedback resistor network, and verified down to three decimal places with a multi-meter. Fixes: 6eeb4180 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
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Chen-Yu Tsai authored
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Fixes: 6eeb4180 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
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Chen-Yu Tsai authored
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
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Chris Healy authored
Add I2C child node for switch watchdog present on SPU3 Signed-off-by: Chris Healy <cphealy@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Chris Healy authored
esdhc0 is connected to an eMMC, so it is safe to pass the "no-sdio"/"no-sd" properties. esdhc1 is wired to a standard SD socket, so pass the "no-sdio" property. Signed-off-by: Chris Healy <cphealy@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Biwen Li authored
Fix value of shunt-resistor property. The LX2160A-RDB has 500 uOhm shunt for the INA220, not 1000 uOhm. Unless it will get wrong power consumption(1/2) Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
According to the AR8035 datasheet: "When using crystal, the clock is generated internally after power is stable. For a reliable power on reset, suggest to keep asserting the reset low long enough (10ms) to ensure the clock is stable and clock-to-reset 1ms requirement is satisfied." Pass the 'reset-assert-us' property to describe such requirement. While at it, use the 'reset-gpios' property inside the the mdio node instead of the deprecated usage of 'phy-reset-gpios'. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
imx6q-tbs2910 has an Atheros AR8035 Ethernet PHY at address 4. The AR8035 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin. Improve the Ethernet representation by adding an mdio node with such information. This fixes an Ethernet regression in U-Boot as U-Boot AR803X driver now expects the 'qca,clk-out-frequency' property to be passed via device tree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Tested-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
According to the AR8031 datasheet: "When using crystal, clock is generated internally after the power is stable. In order to get reliable power-on-reset, it is recommended to keep asserting the reset low signal long enough (10 ms) to ensure the clock is stable and clock-to-reset (1 ms) requirement is satisfied." Pass the 'reset-assert-us' property to describe such requirement. While at it, use the 'reset-gpios' property inside the the mdio node instead of the deprecated usage of 'phy-reset-gpios'. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1. The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin. Improve the Ethernet representation by adding an mdio node with such information. An advantage of adding the mdio node is that the AR8031 initialization code in the mx6sabresd board file in U-Boot can totally be removed. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Parthiban Nallathambi authored
Add entries for MYiR Tech imx6ULL eval boards. Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Add Gateworks System Controller support to Gateworks Ventana boards: - add dt bindings for GSC mfd driver and hwmon driver for ADC's and fan controllers. - add dt bindings for gpio-keys driver for push-button and interrupt events Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 19 Jul, 2020 5 commits
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Nisha Kumari authored
This patch adds devicetree nodes for LAB and IBB regulators. Signed-off-by: Nisha Kumari <nishakumari@codeaurora.org> [sumits: Updated for better compatible strings and names] Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Link: https://lore.kernel.org/r/20200622124110.20971-4-sumit.semwal@linaro.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Dinh Nguyen authored
Add the Maxim max1619 temp sensor that is on the Arria10 devkit. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Dinh Nguyen authored
Add reset-names = "spi" to spi dts nodes. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Dinh Nguyen authored
Add the clock properties for the NAND dts node. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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Dinh Nguyen authored
Add clock dts entries to the Intel SoCFPGA Agilex platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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- 17 Jul, 2020 9 commits
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Rajendra Nayak authored
Add the OPP tables for DSI and MDP based on the perf state/clk requirements, and add the power-domains property to specify the scalable power domain. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1594292674-15632-5-git-send-email-rnayak@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Rajendra Nayak authored
Add the OPP tables for DSI and MDP based on the perf state/clk requirements, and add the power-domains property to specify the scalable power domain. Tested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/1594292674-15632-4-git-send-email-rnayak@codeaurora.orgSigned-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.9-rc1 This contains a slew of fixes in preparation for validating device trees against json-schema bindings. In addition, this enables the CPU complex (for CPU frequency scaling) and GPU on Tegra194. * tag 'tegra-for-5.9-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (56 commits) arm64: tegra: Add the GPU on Tegra194 arm64: tegra: Add compatible string for Tegra194 CPU complex arm64: tegra: Add HDMI supplies on Norrin arm64: tegra: Add #{address,size}-cells for VI I2C on Tegra210 arm64: tegra: Add missing clocks and power-domains to Tegra210 VI I2C arm64: tegra: Add clocks and resets for ISP on Tegra210 arm64: tegra: Fix compatible string for DPAUX on Tegra210 arm64: tegra: Add i2c-bus subnode for DPAUX controllers arm64: tegra: Sort aliases alphabetically arm64: tegra: Remove spurious tabs arm64: tegra: Populate VBUS for USB3 on Jetson TX2 arm64: tegra: Enable DFLL support on Jetson Nano arm64: tegra: Add support for Jetson Xavier NX arm64: tegra: Re-order PCIe aperture mappings arm64: tegra: Enable Tegra VI CSI support for Jetson Nano arm64: tegra: jetson-tx1: Add camera supplies arm64: tegra: Fix order of XUSB controller clocks arm64: tegra: Rename cbb@0 to bus@0 on Tegra194 arm64: tegra: Sort nodes by unit-address on Jetson Nano arm64: tegra: Various fixes for PMICs ... Link: https://lore.kernel.org/r/20200717161300.1661002-7-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.9-rc1 This adds device trees for the ASUS Google Nexus 7 and Acer Iconia Tab A500. In addition there are a slew of fixes to existing device trees in preparation for validating the DTBs against json-schema. * tag 'tegra-for-5.9-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (38 commits) ARM: tegra: Add device-tree for ASUS Google Nexus 7 ARM: tegra: Add device-tree for Acer Iconia Tab A500 ARM: tegra: Add HDMI supplies on Nyan boards ARM: tegra: Add missing DSI controller on Tegra30 ARM: tegra: Add i2c-bus subnode for DPAUX controllers ARM: tegra: The Tegra30 SDHCI is not backwards-compatible ARM: tegra: The Tegra30 DC is not backwards-compatible ARM: tegra: Remove spurious comma from node name ARM: tegra: Add parent clock to DSI output ARM: tegra: Use standard names for SRAM nodes ARM: tegra: seaboard: Use standard battery bindings ARM: tegra: Use standard names for LED nodes ARM: tegra: Use numeric unit-addresses ARM: tegra: medcom-wide: Remove extra panel power supply ARM: tegra: Use proper unit-addresses for OPPs ARM: tegra: Add missing clock-names for SDHCI controllers ARM: tegra: Fix order of XUSB controller clocks ARM: tegra: Add #reset-cells to Tegra124 memory controller ARM: tegra: Add missing panel power supplies ARM: tegra: Add micro-USB A/B port on Jetson TK1 ... Link: https://lore.kernel.org/r/20200717161300.1661002-5-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.9-rc1 This adds compatible strings for some new devices as well as updates and fixes existing bindings. * tag 'tegra-for-5.9-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: fuse: tegra: Add missing compatible strings dt-bindings: i2c: tegra: Document Tegra210 VI I2C clocks and power-domains dt-bindings: Add documentation for GV11B GPU dt-bindings: ARM: tegra: Add ASUS Google Nexus 7 dt-bindings: ARM: tegra: Add Acer Iconia Tab A500 dt-bindings: Add vendor prefix for Acer Inc. dt-bindings: tegra: Document Jetson Xavier NX (and devkit) Link: https://lore.kernel.org/r/20200717161300.1661002-1-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic updates for v5.9 - meson-gx: Switch to the meson-ee-pwrc bindings - add Khadas MCU nodes * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings arm64: dts: meson-khadas-vim3: add Khadas MCU nodes Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: amlogic updates for v5.9 - power-domain and MMC updates * tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: odroidc1: enable the SDHC controller ARM: dts: meson8b: ec100: enable the SDHC controller ARM: dts: meson: add the SDHC MMC controller ARM: dts: meson8b: add power domain controller ARM: dts: meson8m2: add resets for the power domain controller ARM: dts: meson8: add power domain controller Link: https://lore.kernel.org/r/7hd04uf2o8.fsf@baylibre.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Thierry Reding authored
The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called GV11B. Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
The Tegra FUSE device tree bindings haven't been updated in a while. Add compatible strings for the SoC generations that were released since the last update. Signed-off-by: Thierry Reding <treding@nvidia.com>
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