- 28 Jul, 2022 4 commits
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Marcin Wojtas authored
Commit 3c783b83 ("net: dsa: mv88e6xxx: get rid of SPEED_MAX setting") stopped relying on SPEED_MAX constant and hardcoded speed settings for the switch ports and rely on phylink configuration. It turned out, however, that when the relevant code is called, the mac_capabilites of CPU/DSA port remain unset. mv88e6xxx_setup_port() is called via mv88e6xxx_setup() in dsa_tree_setup_switches(), which precedes setting the caps in phylink_get_caps down in the chain of dsa_tree_setup_ports(). As a result the mac_capabilites are 0 and the default speed for CPU/DSA port is 10M at the start. To fix that, execute mv88e6xxx_get_caps() and obtain the capabilities driectly. Fixes: 3c783b83 ("net: dsa: mv88e6xxx: get rid of SPEED_MAX setting") Signed-off-by:
Marcin Wojtas <mw@semihalf.com> Reviewed-by:
Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220726230918.2772378-1-mw@semihalf.comSigned-off-by:
Jakub Kicinski <kuba@kernel.org>
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Jiri Pirko authored
The net_eq() check is already performed inside devlinks_xa_for_each_registered_get() helper, so remove the redundant appearance. Signed-off-by:
Jiri Pirko <jiri@nvidia.com> Link: https://lore.kernel.org/r/20220727055912.568391-1-jiri@resnulli.usSigned-off-by:
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Krzysztof Kozlowski authored
Absolute path to other DT schema is preferred over relative one. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Kurt Kanzenbach <kurt@linutronix.de> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220726115650.100726-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Zhengchao Shao authored
Change the type of cbq_set_lss to void. Signed-off-by:
Zhengchao Shao <shaozhengchao@huawei.com> Link: https://lore.kernel.org/r/20220726030748.243505-1-shaozhengchao@huawei.comSigned-off-by:
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- 27 Jul, 2022 17 commits
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David S. Miller authored
Wenjia Zhang says: ==================== net/smc: updates 2022-07-25 please apply the following patches to netdev's net-next tree. These patches do some preparation to make ISM available for uses beyond SMC-D, and a bunch of cleanups. v2: add "Reviewed-by: Tony Lu <tonylu@linux.alibaba.com>" ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Stefan Raspl authored
Previously, the smc and smc_diag modules were automatically loaded as dependencies of the ism module whenever an ISM device was present. With the pending rework of the ISM API, the smc module will no longer automatically be loaded in presence of an ISM device. Usage of an AF_SMC socket will still trigger loading of the smc modules, but usage of a netlink socket will not. This is addressed by setting the correct module aliases. Signed-off-by:
Stefan Raspl <raspl@linux.ibm.com> Signed-off-by: Wenjia Zhang < wenjia@linux.ibm.com> Reviewed-by:
Tony Lu <tonylu@linux.alibaba.com> Signed-off-by:
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Stefan Raspl authored
Make the DMBE bits, which are passed on individually in ism_move() as parameter idx, available to the receiver. Signed-off-by:
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Stefan Raspl authored
Reworked signature of the function to retrieve the system EID: No plausible reason to use a double pointer. And neither to pass in the device as an argument, as this identifier is by definition per system, not per device. Plus some minor consistency edits. Signed-off-by:
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Heiko Carstens authored
This struct is used in a single place only, and its usage generates inefficient code. Time to clean up! Signed-off-by:
Heiko Carstens <hca@linux.ibm.com> Reviewed-and-tested-by:
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David S. Miller authored
Arun Ramadoss says: ==================== net: dsa: microchip: add support for phylink mac config and link up This patch series add support common phylink mac config and link up for the ksz series switches. At present, ksz8795 and ksz9477 doesn't implement the phylink mac config and link up. It configures the mac interface in the port setup hook. ksz8830 series switch does not mac link configuration. For lan937x switches, in the part support patch series has support only for MII and RMII configuration. Some group of switches have some register address and bit fields common and others are different. So, this patch aims to have common phylink implementation which configures the register based on the chip id. Changes in v2 - combined the modification of duplex, tx_pause and rx_pause into single function. Changes in v1 - Squash the reading rgmii value from dt to patch which apply the rgmii value - Created the new function ksz_port_set_xmii_speed - Seperated the namespace values for xmii_ctrl_0 and xmii_ctrl_1 register - Applied the rgmii delay value based on the rx/tx-internal-delay-ps ==================== Reviewed-by:
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Arun Ramadoss authored
This patch add support for phylink mac config for ksz series of switches. All the files ksz8795, ksz9477 and lan937x uses the ksz common xmii function. Instead of calling from the individual files, it is moved to the ksz common phylink mac config function. Signed-off-by:
Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by:
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Arun Ramadoss authored
This patch updates the ksz8795 cpu configuration to use the ksz common xmii set functions. Signed-off-by:
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Arun Ramadoss authored
In ksz9477.c file, configuring the xmii register is performed based on the flag NEW_XMII. The flag is reset for ksz9893 switch and set for other switch. This patch uses the ksz common xmii set and get function. The bit values are configured based on the chip id. Signed-off-by:
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Arun Ramadoss authored
This patch read the rgmii tx and rx delay from device tree and stored it in the ksz_port. It applies the rgmii delay to the xmii tune adjust register based on the interface selected in phylink mac config. There are two rgmii port in LAN937x and value to be loaded in the register vary depends on the port selected. Signed-off-by:
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Arun Ramadoss authored
This patch add the common ksz_set_xmii function for ksz series switch and update the lan937x code phylink mac config. The register address for the ksz8795 is Port 5 Interface control 6 and for all other switch is xMII Control 1. The bit value for selecting the interface is same for KSZ8795 and KSZ9893 are same. The bit values for KSZ9477 and lan973x are same. So, this patch add the bit value for each switches in ksz_chip_data and configure the registers based on the chip id. Signed-off-by:
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Arun Ramadoss authored
This patch add the support for common phylink mac link up for the ksz series switch. The register address, bit position and values are configured based on the chip id to the dev->info structure. Signed-off-by:
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Arun Ramadoss authored
This patch add common function for configuring the Full/Half duplex and transmit/receive flow control. KSZ8795 uses the Global control register 4 for configuring the duplex and flow control, whereas all other KSZ9477 based switch uses the xMII Control 0 register. Signed-off-by:
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Arun Ramadoss authored
This patch adds the function for configuring the 100/10Mbps speed selection for the ksz switches. KSZ8795 switch uses Global control 4 register 0x06 bit 4 for choosing 100/10Mpbs. Other switches uses xMII control 1 0xN300 for it. For KSZ8795, if the bit is set then 10Mbps is chosen and if bit is clear then 100Mbps chosen. For all other switches it is other way around, if the bit is set then 100Mbps is chosen. So, this patch add the generic function for ksz switch to select the 100/10Mbps speed selection. While configuring, first it disables the gigabit functionality and then configure the respective speed. Signed-off-by:
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Arun Ramadoss authored
This patch add helper function for setting and getting the gigabit enable for the ksz series switch. KSZ8795 switch has different register address compared to all other ksz switches. KSZ8795 series uses the Port 5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps speed selection. All other switches uses the xMII control 1 0xN301 register Bit6 for gigabit. Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen and if bit 0 then 100/10Mbps is chosen. It is other way around for other switches bit 0 is for 1Gbps. So, this patch implements the common function for configuring the gigabit set and get capability. Signed-off-by:
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Slark Xiao authored
Replace 'the the' with 'the' in the comment. Signed-off-by:
Slark Xiao <slark_xiao@163.com> Link: https://lore.kernel.org/r/20220725020124.5760-1-slark_xiao@163.comSigned-off-by:
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Eric Dumazet authored
One rcu_read_unlock() should have been removed in blamed commit. Fixes: 9b1c21d8 ("ip6mr: do not acquire mrt_lock while calling ip6_mr_forward()") Reported-by:
Eric Dumazet <edumazet@google.com> Reviewed-by:
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- 26 Jul, 2022 19 commits
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Jakub Kicinski authored
Jakub Kicinski says: ==================== tls: rx: decrypt from the TCP queue This is the final part of my TLS Rx rework. It switches from strparser to decrypting data from skbs queued in TCP. We don't need the full strparser for TLS, its needs are very basic. This set gives us a small but measurable (6%) performance improvement (continuous stream). ==================== Link: https://lore.kernel.org/r/20220722235033.2594446-1-kuba@kernel.orgSigned-off-by:
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Jakub Kicinski authored
TLS is a relatively poor fit for strparser. We pause the input every time a message is received, wait for a read which will decrypt the message, start the parser, repeat. strparser is built to delineate the messages, wrap them in individual skbs and let them float off into the stack or a different socket. TLS wants the data pages and nothing else. There's no need for TLS to keep cloning (and occasionally skb_unclone()'ing) the TCP rx queue. This patch uses a pre-allocated skb and attaches the skbs from the TCP rx queue to it as frags. TLS is careful never to modify the input skb without CoW'ing / detaching it first. Since we call TCP rx queue cleanup directly we also get back the benefit of skb deferred free. Overall this results in a 6% gain in my benchmarks. Acked-by:
Paolo Abeni <pabeni@redhat.com> Signed-off-by:
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Jakub Kicinski authored
Wrap the remaining skb_cow_data() into a helper, so it's easier to replace down the lane. The new version will change the skb so make sure relevant pointers get reloaded after the call. Signed-off-by: -
Jakub Kicinski authored
Expose TCP rx queue accessor and cleanup, so that TLS can decrypt directly from the TCP queue. The expectation is that the caller can access the skb returned from tcp_recv_skb() and up to inq bytes worth of data (some of which may be in ->next skbs) and then call tcp_read_done() when data has been consumed. The socket lock must be held continuously across those two operations. Signed-off-by: -
Jakub Kicinski authored
The non-zero-copy path assumes a full skb with decrypted contents. This means the device offload would have to CoW the data. Try to keep the zero-copy status instead, copy the data to user space. Signed-off-by: -
Jakub Kicinski authored
In the future we'll want to reuse the input skb in case of zero-copy so we shouldn't always free darg.skb. Move the freeing of darg.skb into the non-zc cases. All cases will now free ctx->recv_pkt (inside let tls_rx_rec_done()). Signed-off-by: -
Jakub Kicinski authored
After recent changes the SW side of tls_rx_one_record() can be nicely encapsulated in its own function. Move the pad handling as well. This will be useful for ->zc handling in tls_decrypt_device(). Signed-off-by: -
Jakub Kicinski authored
To allow for the logic to change later wrap accesses which interrogate the input skb in helper functions. Signed-off-by: -
Jakub Kicinski authored
Jiri Pirko says: ==================== Implement dev info and dev flash for line cards This patchset implements two features: 1) "devlink dev info" is exposed for line card (patches 6-9) 2) "devlink dev flash" is implemented for line card gearbox flashing (patch 10) For every line card, "a nested" auxiliary device is created which allows to bind the features mentioned above (patch 4). The relationship between line card and its auxiliary dev devlink is carried over extra line card netlink attribute (patches 3 and 5). The first patch removes devlink_mutex from devlink_register/unregister() which eliminates possible deadlock during devlink reload command. The second patchset follows up with putting net pointer check into new helper. Examples: $ devlink lc show pci/0000:01:00.0 lc 1 pci/0000:01:00.0: lc 1 state active type 16x100G nested_devlink auxiliary/mlxsw_core.lc.0 supported_types: 16x100G $ devlink dev show auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0 $ devlink dev info auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0: versions: fixed: hw.revision 0 fw.psid MT_0000000749 running: ini.version 4 fw 19.2010.1312 $ devlink dev flash auxiliary/mlxsw_core.lc.0 file mellanox/fw-AGB-rel-19_2010_1312-022-EVB.mfa2 ==================== Link: https://lore.kernel.org/r/20220725082925.366455-1-jiri@resnulli.usSigned-off-by: -
Jiri Pirko authored
Once line card is activated, check the FW version and PSID are exposed. Signed-off-by:
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Jiri Pirko authored
Once line card is provisioned, check if HW revision and INI version are exposed on associated nested auxiliary device. Signed-off-by:
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Jiri Pirko authored
Implement flash_update() devlink op for the line card devlink instance to allow user to update line card gearbox FW using MDDT register and mlxfw. Example: $ devlink dev flash auxiliary/mlxsw_core.lc.0 file mellanox/fw-AGB-rel-19_2010_1312-022-EVB.mfa2 Signed-off-by:
Ido Schimmel <idosch@nvidia.com> Signed-off-by:
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Jiri Pirko authored
Use tunneled MGIR to obtain PSID of line card device and extend device_info_get() op to fill up the info with that. Example: $ devlink dev info auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0: versions: fixed: hw.revision 0 fw.psid MT_0000000749 running: ini.version 4 fw 19.2010.1312 Signed-off-by: -
Jiri Pirko authored
The MDDT register allows to deliver query and request messages (PRM registers, commands) to a DownStream device. Signed-off-by:
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Jiri Pirko authored
In case the line card is active, go over all possible existing devices (gearboxes) on it and expose FW version of the flashable one. Example: $ devlink dev info auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0: versions: fixed: hw.revision 0 running: ini.version 4 fw 19.2010.1312 Signed-off-by: -
Jiri Pirko authored
Extend existing MDDQ register by possibility to query information about devices residing on a line card. Signed-off-by:
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Jiri Pirko authored
Implement info_get() to expose HW revision of a linecard and loaded INI version. Example: $ devlink dev info auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0: versions: fixed: hw.revision 0 running: ini.version 4 Signed-off-by: -
Jiri Pirko authored
In order to be eventually able to expose line card gearbox version and possibility to flash FW, model the line card as a separate device on auxiliary bus. Add the auxiliary device for provisioned line card in order to be able to expose provisioned line card info over devlink dev info. When the line card becomes active, there may be other additional info added to the output. Signed-off-by:
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Jiri Pirko authored
For the purpose of exposing device info and allow flash update which is going to be implemented in follow-up patches, introduce a possibility for a line card to expose relation to nested devlink entity. The nested devlink entity represents the line card. Example: $ devlink lc show pci/0000:01:00.0 lc 1 pci/0000:01:00.0: lc 1 state active type 16x100G nested_devlink auxiliary/mlxsw_core.lc.0 supported_types: 16x100G $ devlink dev show auxiliary/mlxsw_core.lc.0 auxiliary/mlxsw_core.lc.0 Signed-off-by:
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