- 14 Aug, 2017 40 commits
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David Wu authored
There are 3 IP blocks pin routes need to be switched, that are emmc-cmd, spi, i2s. And there are some pins need to be recalced, which are gpio2c4~gpio2c7 and gpio2d0. Signed-off-by:
David Wu <david.wu@rock-chips.com> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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David Wu authored
The other Socs also need the feature of recalced iomux, so make it as a common interface like iomux route feature. Signed-off-by:
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Thierry Reding authored
The irq_group field stores a 1:1 mapping. Use the loop variable to derive the values instead of storing them in an extra array. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Thierry Reding authored
The GPIO offset is never initialized, which means that it will end up being zero as per the devm_kzalloc() of the parent structure. Signed-off-by:
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Rob Herring authored
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Lee Jones <lee@kernel.org> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Barry Song <baohua@kernel.org> Cc: linux-gpio@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Cc: kernel@stlinux.com Cc: linux-samsung-soc@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org Acked-by:
Krzysztof Kozlowski <krzk@kernel.org> Acked-by:
Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by:
Patrice Chotard <patrice.chotard@st.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
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Philipp Zabel authored
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-gpio@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
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Philipp Zabel authored
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Signed-off-by:
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Philipp Zabel authored
Commit a53e35db ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: linux-gpio@vger.kernel.org Signed-off-by:
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Andrew Jeffery authored
Implement the AST2500 USB functions as described by the devicetree bindings. The AST2500 exposes five USB controllers through two USB ports. Similar to the AST2400, the pins exposing USB are outliers with respect to the rest of the pinmux as they not capable of GPIO. Signed-off-by:
Andrew Jeffery <andrew@aj.id.au> Signed-off-by:
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Andrew Jeffery authored
Implement the AST2400 USB functions as described by the devicetree bindings. Three ports are fully documented in the datasheet and exposed through the bindings and pinctrl, though there are remnants of documentation for a fourth port muxed with GPIO pins GPIOQ6 and GPIOQ7. The implementation is updated to reflect this but the function and group are not exposed. Disregarding the mostly undocumented fourth port, the USB functions are an outlier with respect to the rest of the muxed functionality on the AST2400 as GPIO is not supported on these pins. Signed-off-by:
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Andrew Jeffery authored
The Aspeed AST2500 SoC contains a number of USB controllers: * USB 1.1 Host Controller * USB 2.0 Host Controller (x2) * USB 2.0 Virtual Hub * USB 2.0 Device Controller * USB 1.1 HID Controller The controllers are exposed via two USB ports with functionality muxed as required. The following table illustrates the relationships between the ports and the controllers via the mux function names: Port | USB Version | USB Mode | Mux Function ------|--------------|--------------|------------- A | 2.0 | Virtual Hub | USB2AD A | 2.0 | Host | USB2AH B | 1.1 | HID | USB11BHID B | 2.0 | Device | USB2BD B | 2.0 | Host | USB2BH Signed-off-by:
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Andrew Jeffery authored
The AST2400 contains several USB controllers: * USB 1.1 Host Controller * USB 2.0 Host Controller * USB 2.0 Virtual Hub * USB 1.1 HID Controller Pins for three ports are routed to the three controllers such that: * Port 1 is a dedicated USB 1.1 host port * Port 2 is shared between the USB 1.1 host and HID controllers * Port 3 is shared between the USB 2.0 host and Hub controllers As the pins for port 1 are fixed function there is no associated mux function or group described in the bindings. Ports 2 and 3 are muxed as above, and the table below describes the mapping between pinmux function names and ports: Port | USB Version | USB Mode | Mux Function ------|--------------|-----------|------------- 1 | 1.1 | Host | - 2 | 1.1 | Host | USB11H2 2 | 1.1 | HID | USB11D1 3 | 2.0 | Host | USB2H1 3 | 2.0 | Device | USB2D1 Signed-off-by:
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Shawn Guo authored
It fixes the following Smatch static check warning: drivers/pinctrl/zte/pinctrl-zx.c:338 zx_pinctrl_build_state() warn: passing devm_ allocated variable to kfree. As we will be calling krealloc() on pointer 'functions', which means kfree() will be called in there, devm_kzalloc() shouldn't be used with the allocation in the first place. Fix the warning by calling kcalloc() and managing the free procedure in error path on our own. Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Fixes: cbff0c4d ("pinctrl: add ZTE ZX pinctrl driver support") Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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Gustavo A. R. Silva authored
This structure is only used to copy into another structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 15136 5112 0 20248 4f18 drivers/pinctrl/qcom/pinctrl-ssbi-mpp.o after: bss dec hex filename 14849 5024 0 19873 4da1 drivers/pinctrl/qcom/pinctrl-ssbi-mpp.o Signed-off-by:Gustavo A. R. Silva <garsilva@embeddedor.com> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 18958 9000 128 28086 6db6 drivers/pinctrl/bcm/pinctrl-bcm2835.o after: text data bss dec hex filename 18764 8912 128 27804 6c9c drivers/pinctrl/bcm/pinctrl-bcm2835.o Signed-off-by: -
Nava kishore Manne authored
This patch fixes the below warning --> Prefer 'unsigned int' to bare use of 'unsigned'. --> line over 80 characters. --> Prefer 'unsigned int **' to bare use of 'unsigned **'. Signed-off-by:Nava kishore Manne <navam@xilinx.com> Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Signed-off-by:
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Nava kishore Manne authored
This patch fixes the kernel doc warnings in the driver. Signed-off-by:
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Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 21671 3632 128 25431 6357 drivers/pinctrl/pinctrl-st.o after: text data bss dec hex filename 21366 3576 128 25070 61ee drivers/pinctrl/pinctrl-st.o Signed-off-by: -
Hans de Goede authored
WARN_ON causes a backtrace to get logged which is only useful for kernel bugs. For signalling a firmware bug dev_warn(dev, FW_BUG "...") should be used. This fixes users running userspace software to monitor kernel oopses getting a false positive bug-report every boot because of the wrong use of WARN_ON. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
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Dong Aisheng authored
Add gpio_set_direction support. This makes the driver support GPIO input/output dynamically change from userspace. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Acked-by:
Shawn Guo <shawnguo@kernel.org> Signed-off-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
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Dong Aisheng authored
Various IMX platforms may have different imx_pmx_ops.gpio_set_direction implementations, so let's make it platform specific callbacks instead of the fixed common one. Currently only VF610 platform implements it. No function level changes. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Acked-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
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Dong Aisheng authored
gpio_request_enable/disable_free actually are not quite necessary as standard IMX pinctrl binding already sets GPIO mux from device tree, e.g. VF610_PAD_PTB20__GPIO_42 or MX7D_PAD_SD2_CD_B__GPIO5_IO9 No need to do it again in gpio_request_enable. And according to Stefan: "For all GPIO I checked in upstream device trees we assign a pinctrl to the same node, so in all cases gpio_request_enable/disable is really unnecessary." So it should be safe to simply remove it. Note that this changes semantics for Vybrid, e.g. "The two functions have been introduced for Vybrid (through SHARE_MUX_CONF_REG) and mux pins as GPIOs automatically when a GPIO gets requested. The automatic mux is optional by the pinmux/gpio subsystem semantics, and other NXP devices do not use it, instead an explicit pinctrl node is added in the device tree to mux GPIOs where required. Hence this change aligns Vybrid to other NXP (i.MX) devices. Note that all upstream device tree assign proper pinctrl properties where GPIOs are used so no change is necessary for device trees." Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Acked-by:
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Dong Aisheng authored
i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7 ports and IOMUXC DDR for DDR interface. This patch adds the IOMUXC1 support for A7. It only supports generic pin config. Cc: Bai Ping <ping.bai@nxp.com> Acked-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
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Dong Aisheng authored
The generic pinmux property seems to be more suitable for IMX. So we change to use 'pinmux' instead of 'pins'. Cc: Bai Ping <ping.bai@nxp.com> Acked-by:
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Dong Aisheng authored
i.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7 ports and IOMUXC DDR for DDR interface. This patch adds the IOMUXC1 support for A7. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Acked-by:
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Masahiro Yamada authored
Add pin configuration and pinmux support for UniPhier PXs3 SoC. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Masahiro Yamada authored
Save registers lost in the sleep when suspending, and restore them when resuming. Signed-off-by:
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Masahiro Yamada authored
For LD11/20 SoCs (capable of per-pin input enable), the iectrl bit number matches its pin number. So, this is redundant information. Instead, we just need a flag to know if the iectrl gating exists or not. With this refactoring, 5 bits in pin data will be saved. Signed-off-by:
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Masahiro Yamada authored
There are a bunch of GPIO muxing data, but most of them are actually unneeded because GPIO-to-pin mapping can be specified by "gpio-ranges" DT properties. Tables that contain a set of GPIO pins are still needed for the named mapping by "gpio-ranges-group-names". This is a much cleaner way for UniPhier SoC family where GPIO numbers are not straight mapped to pin numbers. Signed-off-by:
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Masahiro Yamada authored
For LD11/LD20 SoCs (capable of per-pin input enable), iectrl bits are located across multiple registers. So, the register offset must be taken into account. Otherwise, wrong input-enable status is displayed. While we here, rename the macro because it is a base address. Fixes: aa543888 ("pinctrl: uniphier: support per-pin input enable for new SoCs") Signed-off-by:
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Masahiro Yamada authored
All UniPhier pinctrl drivers are built-in. Exporting the symbol is meaningless. Signed-off-by:
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Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 13129 2808 192 16129 3f01 drivers/pinctrl/qcom/pinctrl-msm.o after: text data bss dec hex filename 12839 2720 192 15751 3d87 drivers/pinctrl/qcom/pinctrl-msm.o Signed-off-by: -
Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 17061 6992 0 24053 5df5 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.o after: text data bss dec hex filename 16777 6904 0 23681 5c81 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.o Signed-off-by: -
Gustavo A. R. Silva authored
This structure is only used to copy into another structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 12775 3696 64 16535 4097 drivers/pinctrl/pinctrl-coh901.o after: bss dec hex filename 12440 3640 64 16144 3f10 drivers/pinctrl/pinctrl-coh901.o Signed-off-by: -
Gustavo A. R. Silva authored
This structure is only used to copy into another structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 17545 5376 0 22921 5989 drivers/pinctrl/nomadik/pinctrl-abx500.o after: bss dec hex filename 17273 5320 0 22593 5841 drivers/pinctrl/nomadik/pinctrl-abx500.o Signed-off-by: -
Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 7754 2328 0 10082 2762 drivers/pinctrl/vt8500/pinctrl-wmt.o after: text data bss dec hex filename 7472 2272 0 9744 2610 drivers/pinctrl/vt8500/pinctrl-wmt.o Signed-off-by: -
Gustavo A. R. Silva authored
This structure is only used to copy into other structure, so declare it as const. This issue was detected using Coccinelle and the following semantic patch: @r disable optional_qualifier@ identifier i; position p; @@ static struct gpio_chip i@p = { ... }; @ok@ identifier r.i; expression e; position p; @@ e = i@p; @bad@ position p != {r.p,ok.p}; identifier r.i; struct gpio_chip e; @@ e@i@p @depends on !bad disable optional_qualifier@ identifier r.i; @@ static +const struct gpio_chip i = { ... }; In the following log you can see a significant difference in the code size and data segment, hence in the dec segment. This log is the output of the size command, before and after the code change: before: text data bss dec hex filename 11866 3520 128 15514 3c9a drivers/pinctrl/pinctrl-rza1.o after: text data bss dec hex filename 11539 3464 128 15131 3b1b drivers/pinctrl/pinctrl-rza1.o Signed-off-by: -
Icenowy Zheng authored
The I2C pin functions in R_PIO used to be named "s_twi". As we usually use the name "i2c" instead of "twi" in the mainline kernel, change these names to "s_i2c" for consistency. The "s_twi" functions are not yet referenced by any device trees in mainline kernel so I think it's safe to change the name. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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Icenowy Zheng authored
R40 is said to be an upgrade of A20, and its pin configuration is also similar to A20 (and thus similar to A10). Add support for R40 to the A10 pinctrl driver. Signed-off-by:
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Ram Chandra Jangir authored
GPIO_PULL bits configurations in TLMM_GPIO_CFG register differs for IPQ40xx from rest of the other qcom SoCs. As it does not support the keeper state and therefore can't support bias-bus-hold property. This patch adds a pull_no_keeper setting which configures the msm_gpio_pull bits for ipq40xx. This is required to fix the proper configurations of gpio-pull bits for nand pins mux. IPQ40xx SoC: 2'b10: Internal pull up enable. 2'b11: Unsupport For other SoC's: 2'b10: Keeper 2'b11: Pull-Up Note: Due to pull_no_keeper length, all kerneldoc entries in the msm_pinctrl_soc_data struct had to be realigned. Reviewed-by:
Ram Chandra Jangir <rjangir@codeaurora.org> Signed-off-by:
Christian Lamparter <chunkeey@googlemail.com> Signed-off-by:
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