Some chargers try to put the charged device into device data
role. Before this commit this condition caused the tcpm state machine to
issue a hard reset due to a capability missmatch.
Signed-off-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20210805220426.2693062-1-strit@manjaro.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Dumo is another variant of Scarlet, also known as the ASUS Chromebook
Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a
board-specific calibration variant for the WiFi module.

Add a new device tree for it.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210812094753.2359087-3-wenst@chromium.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Dumo is another variant of Scarlet, also known as the ASUS Chromebook
Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a
specific calibration variant for the WiFi module.

Add an entry for the board compatibles.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210812094753.2359087-2-wenst@chromium.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210729093913.8917-3-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

While both RK3566 and RK3568 feature the gmac1 node, the gmac0
node is exclusive to the RK3568.
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210729093913.8917-2-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Enable the gmac controller on the Pine64 Quartz64 Model A.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-8-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

gpll boots at 1188mhz, but to get most accurate dividers for all
gpll_dividers it needs to run at 1200mhz, otherwise everyone downstream
isn't quite right.

ppll feeds the combophys, which has a divide by 2 clock, so 200mhz is
required to reach a 100mhz clock input for them.

The vendor-kernel also makes this fix.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
[pulled deeper explanation from discussion into commit message]
Link: https://lore.kernel.org/r/20210728180034.717953-7-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the gmac1 controller to the rk356x device tree.
This is the controller common to both the rk3568 and rk3566.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-5-pgwipeout@gmail.com
[adjusted sorting a bit]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The mbi-alias incorrectly points to 0xfd100000 when it should point to
0xfd410000.
This fixes MSIs on rk3568.

Fixes: a3adc0b9 ("arm64: dts: rockchip: add core dtsi for RK3568 SoC")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-2-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The PX30 has a VPU (both decoder and encoder) with a dedicated IOMMU.
Describe these two entities in device-tree.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20210728230040.17368-1-ezequiel@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the watchdog node to rk3568.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20210622102907.99242-2-heiko@sntech.de

ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

This enables variant a of the clkout signal for camera applications
and also the cifclkin pinctrl setting.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-6-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The dsi controller includes access to the dphy which might be used
not only for dsi output but also for csi input on dsi1, so add the
necessary #phy-cells to allow it to be used as phy.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-5-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add a basic dts for the Pine64 Quartz64 Model A Single Board Computer.
This board outputs on uart2 for debug.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210710151034.32857-5-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the rk3566 dtsi which includes the soc specific changes for this
chip.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-4-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

In preparation for the rk3566 inclusion, split apart the rk3568 specific
nodes into a separate device tree.
This allows us to create the rk3566 device tree without deleting nodes.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-3-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

In preparation for separating the rk3568 and rk3566 device trees, move
the base rk3568 dtsi to rk356x dtsi.
This will allow us to strip out the rk3568 specific nodes.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-2-pgwipeout@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the CSI dphy node to the core px30 devicetree for later use
with the rkisp.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20210722073955.1192168-1-heiko@sntech.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add a SPDIF audio-graph-card to ROCK Pi 4 device tree.

It's not enabled by default since all dma channels are used by
the (already) enabled i2s0/1/2 and the pin is muxed with GPIO4_C5
which might be in use already.
If enabled SPDIF_TX will be available at pin #15.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-6-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROCK Pi 4 boards have the codec connected to i2s0 and it is accessible
via i2c1 address 0x11.
Add an audio-graph-card for it.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-5-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROCK Pi 4B+ board is the successor of ROCK Pi 4B board.

Differences to the original version are
- has RK3399 OP1 SoC revision
- has eMMC (16 or 32 GB) soldered on board (no changes required,
  since it is enabled in rk3399-rock-pi-4.dtsi)
- dev boards have SPI flash soldered, but as per manufacturer response,
  this won't be the case for mass production boards
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-4-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROCK Pi 4A+ board is the successor of ROCK Pi 4A board.

Differences to the original version are
- has RK3399 OP1 SoC revision
- has eMMC (16 or 32 GB) soldered on board (no changes required,
  since it is enabled in rk3399-rock-pi-4.dtsi)
- dev boards have SPI flash soldered, but as per manufacturer response,
  this won't be the case for mass production boards
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-3-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROCK Pi 4 got 2 more variants called A+ and B+.
Add the dt-bindings documentation for it.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210618181256.27992-2-knaerzche@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The CDN DP needs a PHY and a extcon to work correctly. But no extcon is
provided by the device-tree, which leads to an error:
cdn-dp fec00000.dp: [drm:cdn_dp_probe [rockchipdrm]] *ERROR* missing extcon or phy
cdn-dp: probe of fec00000.dp failed with error -22

Disable the CDN DP to make graphic work on the Pinebook Pro.
Reported-by: Guillaume Gardet <guillaume.gardet@arm.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Link: https://lore.kernel.org/r/20210715164101.11486-1-matthias.bgg@kernel.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the core dt-node for the rk3568's saradc.
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Link: https://lore.kernel.org/r/20210705012610.3831-1-xxm@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Enable the tsadc thermal controller on the helios64
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-4-dgilmore@redhat.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

add SPI support for the helios64, u-boot can live in spi1, spi2 is user
accessible, spi5 is for the sata controller rom.
https://wiki.kobol.io/helios64/spi/Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-3-dgilmore@redhat.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

set the default output path to uart2
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-2-dgilmore@redhat.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROC-RK3399-PC-PLUS is the board inside the portable Firefly Station P1 Geek
PC. As a redesign after the ROC-RK3399-PC, it uses DC-12V as power input
and spares a USB 3 host port. It is also equipped with a USB WiFi chip and
audio codec without the mezzanine board.

- Rockchip RK3399 SoC
- 4GB LPDDR4 RAM
- 16MB SPI-Flash
- eMMC slot
- TF card slot
- USB 3.0 Port x 1, USB 2.0 Port x 1, TypeC Port x 1
- HDMI
- Gigabit Ethernet
- WiFi: RTL8723DU
- Audio: ES8388
- Key: Recovery
- LED: WORK, DIY
- IR
Signed-off-by: Kongxin Deng <dkx@t-chip.com.cn>
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Link: https://lore.kernel.org/r/20210628035402.16812-3-djw@t-chip.com.cnSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add devicetree binding documentation for the Firefly ROC-RK3399-PC-PLUS.
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210628035402.16812-2-djw@t-chip.com.cnSigned-off-by: Heiko Stuebner <heiko@sntech.de>

ROC-RK3328-PC is the board inside the portable Firefly Station M1
Geek PC. As a redesign after the ROC-RK3328-CC, it uses TypeC as
power input and OTG port, embedded with eMMC 5.1 storage and a
SDIO WiFi/BT chip (RTL8723DS).

- Rockchip RK3328 SoC
- 2/4GB LPDDR3 RAM
- 16/32/64/128GB eMMC 5.1
- TF card slot
- USB 3.0 Port x 1, USB 2.0 Port x 1, TypeC Port x 1 (Power/OTG)
- HDMI
- Gigabit Ethernet
- WiFi: RTL8723DS
- Audio: RK3328
- Key: Power, Reset, Recovery
- LED: POWER, USER
- IR
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Link: https://lore.kernel.org/r/20210709080126.17045-3-djw@t-chip.com.cnSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add devicetree binding documentation for the Firefly ROC-RK3328-PC.
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210709080126.17045-2-djw@t-chip.com.cnSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the power-management and QoS nodes to the core rk3568 dtsi.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Link: https://lore.kernel.org/r/20210624131027.3719-1-cl@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

add "rockchip,rk3568-pmu", "syscon", "simple-mfd" for pmu nodes on a
rk3568 platform to pmu.ymal.
Signed-off-by: Liang Chen <cl@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210624114719.1685-2-cl@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The ddc-i2c-scl-* properties in the hdmi node are
not in use in the mainline kernel, so remove them.
Reported-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210701144110.12333-2-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Recently a clock_in_out property was added to the gmac2phy node
in rk3328.dtsi, so now the clock_in_out in rk3318-a95x-z2.dts
can be removed.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210701144110.12333-1-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Nodes with compatible "jedec,spi-nor" are now checked with
jedec,spi-nor.yaml and mtd.yaml. The pattern is now
"^flash(@.*)?$", so change that for the boards with a
Rockchip SoC.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210711145900.15443-1-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The iommu driver gets the interrupts by platform_get_irq(),
so remove interrupt-names property from iommu nodes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210711143430.14347-2-jbx6244@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>