Merge tag 'samsung-pm-1' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers

Merge "Samsung S2R PM updates for v3.15" from Kukjin Kim:

From Tomasz Figa:
This series reworks suspend/resume handling of Samsung clock drivers
to cover more SoC specific aspects that are beyond simple register
save and restore. The goal is to have all the suspend/resume code
that touches the clock controller in single place, which is the clock
driver.

* tag 'samsung-pm-1' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Drop legacy Exynos4 clock suspend/resume code
  clk: samsung: exynos4: Add remaining suspend/resume handling
  clk: samsung: Drop old suspend/resume code
  clk: samsung: s3c64xx: Move suspend/resume handling to SoC driver
  clk: samsung: exynos5420: Move suspend/resume handling to SoC driver
  clk: samsung: exynos5250: Move suspend/resume handling to SoC driver
  clk: samsung: exynos4: Move suspend/resume handling to SoC driver
  clk: samsung: Provide common helpers for register save/restore
  clk: exynos4: Remove remnants of non-DT support
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge "reset controller fixes and updates" from Philipp Zabel:

* 'reset/for_v3.15' of git://git.pengutronix.de/git/pza/linux:
  reset: Add optional resets and stubs
  reset: Add of_reset_control_get
  reset: Mark function as static and remove unused function in core.c
  reset: allow drivers to request probe deferral
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

This reverts commit 7e0b4cd0.

The binding changes need to be done differently as well, let's
take them through netdev, and merge the dts changes in a new
patch here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

This reverts commit 2d237c06.

The driver needs other changes, which unfortunately conflict
with patches in the netdev tree. Revert it here so it can
get merged on top of the other driver through netdev.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-3.15-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Merge "ARM: tegra: driver changes for 3.15" from Stephen Warren:

A single cleanup for the Tegra AHB driver.

* tag 'tegra-for-3.15-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  drivers/amba: don't check resource with devm_ioremap_resource
Signed-off-by: Olof Johansson <olof@lixom.net>

This resolves a conflict between the new sti reset
controller driver and the Kconfig cleanup.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge "STi Reset controller support" from Srinivas Kandagatla:

* tag 'sti-reset-for-v3.15' of git://git.stlinux.com/devel/kernel/linux-sti:
  ARM: STi: Add reset controller support to mach-sti Kconfig
  drivers: reset: stih416: add softreset controller
  drivers: reset: stih415: add softreset controller
  drivers: reset: Reset controller driver for STiH416
  drivers: reset: Reset controller driver for STiH415
  drivers: reset: STi SoC system configuration reset controller support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

This is apparently a dependency for the STi reset controller driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge "mvebu drivers for v3.15" from Jason Cooper:

pull request #1:

 - mvebu mbus
    - use of_find_matching_node_and_match

 - rtc
    - use PTR_ERR_OR_ZERO in isl12057
    - work around issue in mv where date returned is 2038

 - kirkwood -> mach-mvebu
    - various Kconfig oneliners to allow building kirkwood in -mvebu/

pull request #2:

 - reset
    - re-use qnap-poweroff driver for Synology NASs

* tag 'mvebu-drivers-3.15-2' of git://git.infradead.org/linux-mvebu:
  Power: Reset: Generalize qnap-poweroff to work on Synology devices.
  drivers: Enable building of Kirkwood drivers for mach-mvebu
  rtc: mv: reset date if after year 2038
  rtc: isl12057: use PTR_ERR_OR_ZERO to fix coccinelle warnings
  bus: mvebu-mbus: make use of of_find_matching_node_and_match
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next into next/drivers

Merge "SOCFPGA updates for 3.15 version 2" from Dinh Nguyen:

*Update SOCFPGA DTS to include ethernet, sd/mmc, and clock fixes
*Add stmmac ethernet glue layer
*Update socfpga_defconfig to include sd/mmc, and micrel_phy

* tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next:
  dts: socfpga: Add sysmgr node so the gmac can use to reference
  dts: socfpga: Add support for SD/MMC on the SOCFPGA platform
  dts: socfpga: Update clock entry to support multiple parents
  ARM: socfpga: Update socfpga_defconfig
  dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
  net: stmmac: Add SOCFPGA glue driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'renesas-clock4-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Merge "Fourth Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:

r8a7791 (R-Car M2) SoC
* Correct SCIFA3-5 clocks

* tag 'renesas-clock4-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-clock3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon
Horman:

r7s72100 (RZ/A1H) SoC
* Correct bus clock calculation

* tag 'renesas-clock3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r7s72100: fix bus clock calculation
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-clock2-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.15" from
Simon Horman:

r8a7790 (R-Car H2) SoC
- Add sound SCU clock support

r8a7791 (R-Car M2) SoC
- Remove legacy clock aliases for DT devices

* tag 'renesas-clock2-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7790: add sound SCU clock support
  ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devices
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman:

* r7s72100 SoC (RZ/A1H)
  - Add clock for SH Ethernet
  - Add RSPI clocks

* r8a7791 (R-Car M2)
  - Add QSPI and SDHI clocks

* r8a7790 (R-Car H2)
  - Add audio clock
  - Remove legacy DT clocks
  - Correct SYS DMAC clock defines

* tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Remove legacy r8a7790 DT clocks
  ARM: shmobile: Add r8a7791 legacy SDHI clocks
  ARM: shmobile: r8a7790: Correct SYS DMAC clock defines
  ARM: shmobile: r7s72100: Add clock for r7s72100-ether
  ARM: shmobile: r8a7791 clock: add QSPI clocks
  ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT
  ARM: shmobile: r7s72100 clock: Add RSPI clocks
  ARM: shmobile: r8a7790: add audio clock
  ARM: shmobile: r8a7778: add audio clock in new style
Signed-off-by: Olof Johansson <olof@lixom.net>

The MSTP clocks for SCIFA3-5 are MSTP1106-1108, not MSTP1105-1107

Also reinsert them at the correct position to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch selects reset controller support for ARCH_STI and
selects the reset controllers for STiH415 and STiH416 SoCs.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds softreset controller for STiH416 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih416-softreset" is
registered with system configuration registers based reset controller
that controls the softreset state of the hardware such as Ethernet, IRB.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds softreset controller for STiH415 SOC, soft reset
controller is based on system configuration registers which are mapped
via regmap. This reset controller does not have any feedback or
acknowledgement. With this patch a new device "st,stih415-softreset" is
registered with system configuration registers based reset controller
that controls the softreset state of the hardware such as Ethernet, IRB.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds a reset controller platform driver for the STiH416
SoC. This initial version provides a compatible driver for the
"st,stih416-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
hardware such as the on-chip USB host controllers.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds a reset controller platform driver for the STiH415
SoC. This initial version provides a compatible driver for the
"st,stih415-powerdown" device, which registers a system configuration
register based reset controller that controls the powerdown state of
hardware such as the on-chip USB host controllers.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds a reset controller implementation for STMicroelectronics
STi family SoCs; it allows a group of related reset like controls found
in multiple system configuration registers to be represented by a single
controller device. System configuration registers are accessed through
the regmap framework and the mfd/syscon driver.

The implementation optionally supports waiting for the reset action to
be acknowledged in a separate status register and supports both
active high and active low reset lines. These properties are common across
all the reset channels in a specific reset controller instance, hence
all channels in a paritcular controller are expected to behave in the
same way.
Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>

This patch adds IRB support to STiH416 platforms.

Tested on B2000 and B2020 development board
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds IRB support to STiH415 platforms.

Tested on B2000 and B2020 development boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds support to STiH416 SOC, which has two ethernet
snps,dwmac controllers version 3.710. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.

Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds support to STiH415 SOC, which has two ethernet
snps,dwmac controllers version 3.610. With this patch B2000 and B2020
boards can boot with ethernet in MII and RGMII modes.

Tested on both B2020 and B2000.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds a reset controller node to the SOC device tree and also
adds new header files with reset lines required for other device tree
nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds interrupt support for STiH415 pin controllers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

This patch adds interrupt support for STiH416 pin controllers.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

commit[7e0b4cd0 dts: socfpga: Add DTS entry for adding the stmmac glue
layer for stmmac.] references the sysmgr through its phandle. This patch
adds the appropriate sysmgr node for the gmac to use.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.

Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.

Finally, fix an indentation error for the sysmgr node.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Chris Ball <chris@printf.net>

This patch adds device_reset_optional and (devm_)reset_control_get_optional
variants that drivers can use to indicate they can function without control
over the reset line. For those functions, stubs are added so the drivers can
be compiled with CONFIG_RESET_CONTROLLER disabled.
Also, device_reset is annotated with __must_check. Drivers ignoring the return
value should use device_reset_optional instead.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>

Merge tag 'omap-for-v3.15/crossbar-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

Merge OMAP crossbar support from Tony Lindgren:

Add support for GIC crossbar that routes interrupts on newer omaps.

Looks like people wanted these merged via the omap tree as it's
the only user for the GIC crossbar.

* tag 'omap-for-v3.15/crossbar-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: DRA: Enable Crossbar IP support for DRA7XX
  ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number
  DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP
  DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
Signed-off-by: Olof Johansson <olof@lixom.net>

mvebu watchdog driver changes for v3.15 (incremental #2)
- remove warnings by using %pa for phys_addr_t

* tag 'mvebu-watchdog-3.15-2' of git://git.infradead.org/linux-mvebu:
  watchdog: orion_wdt: Use %pa to print 'phys_addr_t'
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge "ARM: mach-bcm: bcm281xx clock driver" from Matt Porter:

This pull request contains the Broadcom bcm281xx
clock driver series. This series is being merged
through the arm-soc tree because there is an
ordering dependency where the driver *must* be
merged before the related dts changes. This is
a result of the bcm281xx dts already containing
dummy fixed clock nodes that must be updated.

* tag 'armsoc/for-3.15/drivers' of git://github.com/broadcom/mach-bcm:
  clk: bcm281xx: don't disable unused peripheral clocks
  clk: bcm281xx: add initial clock framework support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

The picture in the datasheet is a little misleading, yet the divider of
the bus_clk is 1/3 and not 2/3.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The Synology NAS devices use a very similar mechanism to QNAP NAS
devices to power off. Both send a single charactor command to a PIC,
over the second serial port. However the baud rate and the command
differ. Generalize the driver to support this.
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Anton Vorontsov <anton@enomsg.org>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The periph_pll and sdram_pll can have multiple parents. Update the device tree
to list all the possible parents for the PLLs. Add an entry for the the
f2s_sdram_ref_clk, which is a possible parent for the sdram_pll.

Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this
property should be placed in dts file.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>